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kernel_samsung_a53x/drivers/clk
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Jay Buddhabhatti d6e198a47b drivers: clk: zynqmp: calculate closest mux rate 
[ Upstream commit b782921ddd7f84f524723090377903f399fdbbcb ]

Currently zynqmp clock driver is not calculating closest mux rate and
because of that Linux is not setting proper frequency for CPU and
not able to set given frequency for dynamic frequency scaling.

E.g., In current logic initial acpu clock parent and frequency as below
apll1                  0    0    0  2199999978    0     0  50000      Y
    acpu0_mux          0    0    0  2199999978    0     0  50000      Y
        acpu0_idiv1    0    0    0  2199999978    0     0  50000      Y
            acpu0      0    0    0  2199999978    0     0  50000      Y

After changing acpu frequency to 549999994 Hz using CPU freq scaling its
selecting incorrect parent which is not closest frequency.
rpll_to_xpd            0    0    0  1599999984    0     0  50000      Y
    acpu0_mux          0    0    0  1599999984    0     0  50000      Y
        acpu0_div1     0    0    0   533333328    0     0  50000      Y
            acpu0      0    0    0   533333328    0     0  50000      Y

Parent should remain same since 549999994 = 2199999978 / 4.

So use __clk_mux_determine_rate_closest() generic function to calculate
closest rate for mux clock. After this change its selecting correct
parent and correct clock rate.
apll1                  0    0    0  2199999978    0     0  50000      Y
    acpu0_mux          0    0    0  2199999978    0     0  50000      Y
        acpu0_div1     0    0    0   549999995    0     0  50000      Y
            acpu0      0    0    0   549999995    0     0  50000      Y

Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Link: https://lore.kernel.org/r/20231129112916.23125-2-jay.buddhabhatti@amd.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-18 12:12:42 +01:00
..
actions Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
analogbits Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
at91 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
axis Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
axs10x Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
baikal-t1 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
bcm Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
berlin Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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hisilicon Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
imgtec Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
imx clk: imx: imx8mq: correct error handling path 2024-11-18 11:42:53 +01:00
ingenic Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
keystone clk: keystone: pll: fix a couple NULL vs IS_ERR() checks 2024-11-18 11:42:53 +01:00
loongson1 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mediatek clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data 2024-11-18 11:42:54 +01:00
meson Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
microchip Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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pistachio Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pxa Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
qcom clk: qcom: videocc-sm8150: Add missing PLL config property 2024-11-18 12:12:42 +01:00
renesas Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
rockchip clk: rockchip: rk3128: Fix HCLK_OTG gate register 2024-11-18 12:12:16 +01:00
samsung Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
sifive Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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sunxi-ng Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
tegra Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
ti clk: ti: fix double free in of_ti_divider_clk_setup() 2024-11-18 11:42:54 +01:00
uniphier Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
ux500 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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zte Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
zynq Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
zynqmp drivers: clk: zynqmp: calculate closest mux rate 2024-11-18 12:12:42 +01:00
clk-asm9260.c clk: asm9260: use parent index to link the reference clock 2024-11-18 11:42:53 +01:00
clk-aspeed.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-aspeed.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-ast2600.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-axi-clkgen.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-axm5516.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-bd718x7.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-bm1880.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-bulk.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-cdce706.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-cdce925.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-clps711x.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-composite.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-conf.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-cs2000-cp.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-devres.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-divider.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-efm32gg.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-fixed-factor.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-fixed-mmio.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-fixed-rate.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-fractional-divider.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-fsl-sai.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-gate.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-gemini.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-gpio.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-hi655x.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-highbank.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-hsdk-pll.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-lochnagar.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-max9485.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-max77686.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-milbeaut.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-moxart.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-multiplier.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-mux.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-nomadik.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-npcm7xx.c clk: npcm7xx: Fix incorrect kfree 2024-11-18 11:42:54 +01:00
clk-nspire.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-oxnas.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-palmas.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-plldig.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-pwm.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-qoriq.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-rk808.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-s2mps11.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-scmi.c clk: scmi: Free scmi_clk allocated when the clocks with invalid info are skipped 2024-11-18 11:43:02 +01:00
clk-scpi.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-si514.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-si544.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-si570.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-si5341.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-si5351.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-si5351.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-sparx5.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-stm32f4.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-stm32h7.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-stm32mp1.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-tango4.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-twl6040.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-u300.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-versaclock5.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-vt8500.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-wm831x.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk-xgene.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clk.c clk: Sanitize possible_parent_show to Handle Return Value of of_clk_get_parent_name 2024-11-18 10:58:31 +01:00
clk.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
clkdev.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Kconfig Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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