clk: imx: imx8mq: correct error handling path
[ Upstream commit 577ad169966e6e75b10e004389a3f79813e84b5d ] Avoid memory leak in error handling path. It does not make much sense for the SoC without clk driver, to make program behavior correct, let's fix it. Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <error27@gmail.com> Closes: https://lore.kernel.org/r/202309240551.e46NllPa-lkp@intel.com/ Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20231001122618.194498-1-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 10 additions and 7 deletions
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@ -280,8 +280,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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void __iomem *base;
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int err;
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clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
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IMX8MQ_CLK_END), GFP_KERNEL);
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clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, IMX8MQ_CLK_END), GFP_KERNEL);
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if (WARN_ON(!clk_hw_data))
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return -ENOMEM;
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@ -298,10 +297,12 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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hws[IMX8MQ_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
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np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");
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base = of_iomap(np, 0);
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base = devm_of_iomap(dev, np, 0, NULL);
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of_node_put(np);
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if (WARN_ON(!base))
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return -ENOMEM;
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if (WARN_ON(IS_ERR(base))) {
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err = PTR_ERR(base);
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goto unregister_hws;
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}
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hws[IMX8MQ_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x28, 16, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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hws[IMX8MQ_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x18, 16, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
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@ -373,8 +374,10 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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np = dev->of_node;
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base = devm_platform_ioremap_resource(pdev, 0);
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if (WARN_ON(IS_ERR(base)))
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return PTR_ERR(base);
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if (WARN_ON(IS_ERR(base))) {
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err = PTR_ERR(base);
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goto unregister_hws;
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}
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/* CORE */
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hws[IMX8MQ_CLK_A53_DIV] = imx8m_clk_hw_composite_core("arm_a53_div", imx8mq_a53_sels, base + 0x8000);
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