614 lines
14 KiB
Text
Executable file
614 lines
14 KiB
Text
Executable file
/dts-v1/;
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/ {
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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interrupt-parent = <0x01>;
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model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
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compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
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clocks {
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sleep-clk {
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compatible = "fixed-clock";
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clock-frequency = <0x7d00>;
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#clock-cells = <0x00>;
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phandle = <0x0d>;
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};
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xo {
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compatible = "fixed-clock";
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clock-frequency = <0x16e3600>;
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#clock-cells = <0x00>;
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phandle = <0x0c>;
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};
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};
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cpus {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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phandle = <0x18>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x00>;
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enable-method = "psci";
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next-level-cache = <0x02>;
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clocks = <0x03 0x01>;
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clock-names = "cpu";
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operating-points-v2 = <0x04>;
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cpu-supply = <0x05>;
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phandle = <0x19>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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enable-method = "psci";
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reg = <0x01>;
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next-level-cache = <0x02>;
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clocks = <0x03 0x01>;
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clock-names = "cpu";
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operating-points-v2 = <0x04>;
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cpu-supply = <0x05>;
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phandle = <0x1a>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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enable-method = "psci";
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reg = <0x02>;
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next-level-cache = <0x02>;
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clocks = <0x03 0x01>;
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clock-names = "cpu";
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operating-points-v2 = <0x04>;
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cpu-supply = <0x05>;
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phandle = <0x1b>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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enable-method = "psci";
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reg = <0x03>;
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next-level-cache = <0x02>;
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clocks = <0x03 0x01>;
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clock-names = "cpu";
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operating-points-v2 = <0x04>;
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cpu-supply = <0x05>;
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phandle = <0x1c>;
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};
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l2-cache {
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compatible = "cache";
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cache-level = <0x02>;
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phandle = <0x02>;
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};
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};
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cpu_opp_table {
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compatible = "operating-points-v2";
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opp-shared;
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phandle = <0x04>;
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opp-864000000 {
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opp-hz = <0x00 0x337f9800>;
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opp-microvolt = <0xb1008>;
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clock-latency-ns = <0x30d40>;
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};
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opp-1056000000 {
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opp-hz = <0x00 0x3ef14800>;
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opp-microvolt = <0xc042c>;
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clock-latency-ns = <0x30d40>;
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};
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opp-1320000000 {
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opp-hz = <0x00 0x4ead9a00>;
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opp-microvolt = <0xd2924>;
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clock-latency-ns = <0x30d40>;
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};
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opp-1440000000 {
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opp-hz = <0x00 0x55d4a800>;
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opp-microvolt = <0xe1d48>;
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clock-latency-ns = <0x30d40>;
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};
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opp-1608000000 {
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opp-hz = <0x00 0x5fd82200>;
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opp-microvolt = <0xf116c>;
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clock-latency-ns = <0x30d40>;
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};
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opp-1800000000 {
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opp-hz = <0x00 0x6b49d200>;
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opp-microvolt = <0x103664>;
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clock-latency-ns = <0x30d40>;
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};
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};
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firmware {
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scm {
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compatible = "qcom,scm";
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};
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};
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hwlock {
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compatible = "qcom,tcsr-mutex";
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syscon = <0x06 0x00 0x80>;
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#hwlock-cells = <0x01>;
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phandle = <0x08>;
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};
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pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <0x01 0x07 0xf04>;
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phandle = <0x1d>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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phandle = <0x1e>;
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};
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reserved-memory {
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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ranges;
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memory@60000 {
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reg = <0x00 0x60000 0x00 0x6000>;
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no-map;
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phandle = <0x17>;
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};
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memory@4a600000 {
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reg = <0x00 0x4a600000 0x00 0x400000>;
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no-map;
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phandle = <0x1f>;
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};
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memory@4aa00000 {
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reg = <0x00 0x4aa00000 0x00 0x100000>;
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no-map;
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phandle = <0x07>;
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};
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memory@4ab00000 {
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reg = <0x00 0x4ab00000 0x00 0x5500000>;
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no-map;
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phandle = <0x16>;
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};
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <0x07>;
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hwlocks = <0x08 0x00>;
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};
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soc {
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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ranges = <0x00 0x00 0x00 0x00 0x00 0xffffffff>;
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dma-ranges;
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compatible = "simple-bus";
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phandle = <0x20>;
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qrng@e1000 {
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compatible = "qcom,prng-ee";
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reg = <0x00 0xe3000 0x00 0x1000>;
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clocks = <0x09 0x88>;
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clock-names = "core";
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phandle = <0x21>;
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};
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dma@704000 {
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compatible = "qcom,bam-v1.7.0";
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reg = <0x00 0x704000 0x00 0x20000>;
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interrupts = <0x00 0xcf 0x04>;
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clocks = <0x09 0x56>;
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clock-names = "bam_clk";
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#dma-cells = <0x01>;
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qcom,ee = <0x01>;
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qcom,controlled-remotely;
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qcom,config-pipe-trust-reg = <0x00>;
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phandle = <0x0a>;
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};
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crypto@73a000 {
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compatible = "qcom,crypto-v5.1";
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reg = <0x00 0x73a000 0x00 0x6000>;
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clocks = <0x09 0x56 0x09 0x57 0x09 0x58>;
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clock-names = "iface", "bus", "core";
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dmas = <0x0a 0x02 0x0a 0x03>;
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dma-names = "rx", "tx";
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phandle = <0x22>;
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};
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pinctrl@1000000 {
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compatible = "qcom,ipq6018-pinctrl";
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reg = <0x00 0x1000000 0x00 0x300000>;
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interrupts = <0x00 0xd0 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x0b 0x00 0x00 0x50>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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phandle = <0x0b>;
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serial3-pinmux {
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pins = "gpio44", "gpio45";
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function = "blsp2_uart";
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drive-strength = <0x08>;
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bias-pull-down;
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phandle = <0x0e>;
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};
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i2c-1-pins {
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pins = "gpio42", "gpio43";
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function = "blsp2_i2c";
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drive-strength = <0x08>;
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phandle = <0x11>;
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};
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spi-0-pins {
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pins = "gpio38", "gpio39", "gpio40", "gpio41";
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function = "blsp0_spi";
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drive-strength = <0x08>;
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bias-pull-down;
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phandle = <0x10>;
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};
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};
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gcc@1800000 {
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compatible = "qcom,gcc-ipq6018";
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reg = <0x00 0x1800000 0x00 0x80000>;
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clocks = <0x0c 0x0d>;
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clock-names = "xo", "sleep_clk";
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#clock-cells = <0x01>;
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#reset-cells = <0x01>;
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phandle = <0x09>;
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};
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syscon@1905000 {
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compatible = "syscon";
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reg = <0x00 0x1905000 0x00 0x8000>;
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phandle = <0x06>;
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};
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syscon@1945000 {
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compatible = "syscon";
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reg = <0x00 0x1945000 0x00 0xe000>;
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phandle = <0x14>;
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};
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dma@7884000 {
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compatible = "qcom,bam-v1.7.0";
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reg = <0x00 0x7884000 0x00 0x2b000>;
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interrupts = <0x00 0xee 0x04>;
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clocks = <0x09 0x43>;
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clock-names = "bam_clk";
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#dma-cells = <0x01>;
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qcom,ee = <0x00>;
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phandle = <0x0f>;
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};
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serial@78b1000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0x00 0x78b1000 0x00 0x200>;
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interrupts = <0x00 0x132 0x04>;
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clocks = <0x09 0x52 0x09 0x43>;
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clock-names = "core", "iface";
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status = "okay";
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pinctrl-0 = <0x0e>;
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pinctrl-names = "default";
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phandle = <0x23>;
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};
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spi@78b5000 {
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compatible = "qcom,spi-qup-v2.2.1";
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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reg = <0x00 0x78b5000 0x00 0x600>;
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interrupts = <0x00 0x5f 0x04>;
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spi-max-frequency = <0x2faf080>;
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clocks = <0x09 0x45 0x09 0x43>;
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clock-names = "core", "iface";
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dmas = <0x0f 0x0c 0x0f 0x0d>;
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dma-names = "tx", "rx";
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status = "okay";
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cs-select = <0x00>;
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pinctrl-0 = <0x10>;
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pinctrl-names = "default";
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phandle = <0x24>;
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m25p80@0 {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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reg = <0x00>;
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compatible = "n25q128a11";
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spi-max-frequency = <0x2faf080>;
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};
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};
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spi@78b6000 {
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compatible = "qcom,spi-qup-v2.2.1";
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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reg = <0x00 0x78b6000 0x00 0x600>;
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interrupts = <0x00 0x60 0x04>;
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spi-max-frequency = <0x2faf080>;
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clocks = <0x09 0x47 0x09 0x43>;
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clock-names = "core", "iface";
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dmas = <0x0f 0x0e 0x0f 0x0f>;
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dma-names = "tx", "rx";
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status = "disabled";
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phandle = <0x25>;
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};
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i2c@78b6000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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reg = <0x00 0x78b6000 0x00 0x600>;
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interrupts = <0x00 0x60 0x04>;
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clocks = <0x09 0x43 0x09 0x46>;
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clock-names = "iface", "core";
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clock-frequency = <0x61a80>;
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dmas = <0x0f 0x0f 0x0f 0x0e>;
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dma-names = "rx", "tx";
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status = "disabled";
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phandle = <0x26>;
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};
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i2c@78b7000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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reg = <0x00 0x78b7000 0x00 0x600>;
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interrupts = <0x00 0x61 0x04>;
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clocks = <0x09 0x43 0x09 0x48>;
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clock-names = "iface", "core";
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clock-frequency = <0x61a80>;
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dmas = <0x0f 0x11 0x0f 0x10>;
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dma-names = "rx", "tx";
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status = "okay";
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pinctrl-0 = <0x11>;
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pinctrl-names = "default";
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phandle = <0x27>;
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};
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interrupt-controller@b000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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#interrupt-cells = <0x03>;
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reg = <0x00 0xb000000 0x00 0x1000 0x00 0xb002000 0x00 0x1000 0x00 0xb001000 0x00 0x1000 0x00 0xb004000 0x00 0x1000>;
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interrupts = <0x01 0x09 0x04>;
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phandle = <0x01>;
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};
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watchdog@b017000 {
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compatible = "qcom,kpss-wdt";
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interrupts = <0x00 0x03 0x01>;
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reg = <0x00 0xb017000 0x00 0x40>;
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clocks = <0x0d>;
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timeout-sec = <0x0a>;
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};
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mailbox@b111000 {
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compatible = "qcom,ipq6018-apcs-apps-global";
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reg = <0x00 0xb111000 0x00 0x1000>;
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#clock-cells = <0x01>;
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clocks = <0x12 0x0c>;
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clock-names = "pll", "xo";
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#mbox-cells = <0x01>;
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phandle = <0x03>;
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};
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clock@b116000 {
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compatible = "qcom,ipq6018-a53pll";
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reg = <0x00 0xb116000 0x00 0x40>;
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#clock-cells = <0x00>;
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clocks = <0x0c>;
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clock-names = "xo";
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phandle = <0x12>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <0x01 0x02 0xf08 0x01 0x03 0xf08 0x01 0x04 0xf08 0x01 0x01 0xf08>;
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};
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timer@b120000 {
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0x00 0xb120000 0x00 0x1000>;
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clock-frequency = <0x124f800>;
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frame@b120000 {
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frame-number = <0x00>;
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interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>;
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reg = <0x00 0xb121000 0x00 0x1000 0x00 0xb122000 0x00 0x1000>;
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};
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frame@b123000 {
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frame-number = <0x01>;
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interrupts = <0x00 0x09 0x04>;
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reg = <0x00 0xb123000 0x00 0x1000>;
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status = "disabled";
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};
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frame@b124000 {
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frame-number = <0x02>;
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interrupts = <0x00 0x0a 0x04>;
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reg = <0x00 0xb124000 0x00 0x1000>;
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status = "disabled";
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};
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frame@b125000 {
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frame-number = <0x03>;
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interrupts = <0x00 0x0b 0x04>;
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reg = <0x00 0xb125000 0x00 0x1000>;
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status = "disabled";
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};
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frame@b126000 {
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frame-number = <0x04>;
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interrupts = <0x00 0x0c 0x04>;
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reg = <0x00 0xb126000 0x00 0x1000>;
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status = "disabled";
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};
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frame@b127000 {
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frame-number = <0x05>;
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interrupts = <0x00 0x0d 0x04>;
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reg = <0x00 0xb127000 0x00 0x1000>;
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status = "disabled";
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};
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frame@b128000 {
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frame-number = <0x06>;
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interrupts = <0x00 0x0e 0x04>;
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reg = <0x00 0xb128000 0x00 0x1000>;
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status = "disabled";
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};
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};
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remoteproc@cd00000 {
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compatible = "qcom,ipq8074-wcss-pil";
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reg = <0x00 0xcd00000 0x00 0x4040 0x00 0x4ab000 0x00 0x20>;
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reg-names = "qdsp6", "rmb";
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interrupts-extended = <0x01 0x00 0x145 0x01 0x13 0x00 0x00 0x13 0x01 0x00 0x13 0x02 0x00 0x13 0x03 0x00>;
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interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
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resets = <0x09 0x7f 0x09 0x16 0x09 0x17>;
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reset-names = "wcss_aon_reset", "wcss_reset", "wcss_q6_reset";
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clocks = <0x09 0x88>;
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clock-names = "prng";
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qcom,halt-regs = <0x14 0xa000 0xd000 0x00>;
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qcom,smem-states = <0x15 0x00 0x15 0x01>;
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qcom,smem-state-names = "shutdown", "stop";
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memory-region = <0x16>;
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phandle = <0x28>;
|
|
|
|
glink-edge {
|
|
interrupts = <0x00 0x141 0x01>;
|
|
qcom,remote-pid = <0x01>;
|
|
mboxes = <0x03 0x08>;
|
|
|
|
qrtr_requests {
|
|
qcom,glink-channels = "IPCRTR";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
wcss-smp2p {
|
|
compatible = "qcom,smp2p";
|
|
qcom,smem = <0x1b3 0x1ac>;
|
|
interrupt-parent = <0x01>;
|
|
interrupts = <0x00 0x142 0x01>;
|
|
mboxes = <0x03 0x09>;
|
|
qcom,local-pid = <0x00>;
|
|
qcom,remote-pid = <0x01>;
|
|
phandle = <0x29>;
|
|
|
|
master-kernel {
|
|
qcom,entry-name = "master-kernel";
|
|
#qcom,smem-state-cells = <0x01>;
|
|
phandle = <0x15>;
|
|
};
|
|
|
|
slave-kernel {
|
|
qcom,entry-name = "slave-kernel";
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
phandle = <0x13>;
|
|
};
|
|
};
|
|
|
|
rpm-glink {
|
|
compatible = "qcom,glink-rpm";
|
|
interrupts = <0x00 0xa8 0x01>;
|
|
qcom,rpm-msg-ram = <0x17>;
|
|
mboxes = <0x03 0x00>;
|
|
|
|
glink-channel {
|
|
compatible = "qcom,rpm-ipq6018";
|
|
qcom,glink-channels = "rpm_requests";
|
|
phandle = <0x2a>;
|
|
|
|
regulators {
|
|
compatible = "qcom,rpm-mp5496-regulators";
|
|
|
|
s2 {
|
|
regulator-min-microvolt = <0xb1008>;
|
|
regulator-max-microvolt = <0x103664>;
|
|
regulator-always-on;
|
|
phandle = <0x05>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
serial0 = "/soc/serial@78b1000";
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
bootargs-append = " swiotlb=1";
|
|
};
|
|
|
|
__symbols__ {
|
|
sleep_clk = "/clocks/sleep-clk";
|
|
xo = "/clocks/xo";
|
|
cpus = "/cpus";
|
|
CPU0 = "/cpus/cpu@0";
|
|
CPU1 = "/cpus/cpu@1";
|
|
CPU2 = "/cpus/cpu@2";
|
|
CPU3 = "/cpus/cpu@3";
|
|
L2_0 = "/cpus/l2-cache";
|
|
cpu_opp_table = "/cpu_opp_table";
|
|
tcsr_mutex = "/hwlock";
|
|
pmuv8 = "/pmu";
|
|
psci = "/psci";
|
|
rpm_msg_ram = "/reserved-memory/memory@60000";
|
|
tz = "/reserved-memory/memory@4a600000";
|
|
smem_region = "/reserved-memory/memory@4aa00000";
|
|
q6_region = "/reserved-memory/memory@4ab00000";
|
|
soc = "/soc";
|
|
prng = "/soc/qrng@e1000";
|
|
cryptobam = "/soc/dma@704000";
|
|
crypto = "/soc/crypto@73a000";
|
|
tlmm = "/soc/pinctrl@1000000";
|
|
serial_3_pins = "/soc/pinctrl@1000000/serial3-pinmux";
|
|
i2c_1_pins = "/soc/pinctrl@1000000/i2c-1-pins";
|
|
spi_0_pins = "/soc/pinctrl@1000000/spi-0-pins";
|
|
gcc = "/soc/gcc@1800000";
|
|
tcsr_mutex_regs = "/soc/syscon@1905000";
|
|
tcsr_q6 = "/soc/syscon@1945000";
|
|
blsp_dma = "/soc/dma@7884000";
|
|
blsp1_uart3 = "/soc/serial@78b1000";
|
|
spi_0 = "/soc/spi@78b5000";
|
|
spi_1 = "/soc/spi@78b6000";
|
|
i2c_0 = "/soc/i2c@78b6000";
|
|
i2c_1 = "/soc/i2c@78b7000";
|
|
intc = "/soc/interrupt-controller@b000000";
|
|
apcs_glb = "/soc/mailbox@b111000";
|
|
a53pll = "/soc/clock@b116000";
|
|
q6v5_wcss = "/soc/remoteproc@cd00000";
|
|
wcss = "/wcss-smp2p";
|
|
wcss_smp2p_out = "/wcss-smp2p/master-kernel";
|
|
wcss_smp2p_in = "/wcss-smp2p/slave-kernel";
|
|
rpm_requests = "/rpm-glink/glink-channel";
|
|
ipq6018_s2 = "/rpm-glink/glink-channel/regulators/s2";
|
|
};
|
|
};
|