/dts-v1/;

/ {
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	interrupt-parent = <0x01>;
	model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
	compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";

	clocks {

		sleep-clk {
			compatible = "fixed-clock";
			clock-frequency = <0x7d00>;
			#clock-cells = <0x00>;
			phandle = <0x0d>;
		};

		xo {
			compatible = "fixed-clock";
			clock-frequency = <0x16e3600>;
			#clock-cells = <0x00>;
			phandle = <0x0c>;
		};
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		phandle = <0x18>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x00>;
			enable-method = "psci";
			next-level-cache = <0x02>;
			clocks = <0x03 0x01>;
			clock-names = "cpu";
			operating-points-v2 = <0x04>;
			cpu-supply = <0x05>;
			phandle = <0x19>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			enable-method = "psci";
			reg = <0x01>;
			next-level-cache = <0x02>;
			clocks = <0x03 0x01>;
			clock-names = "cpu";
			operating-points-v2 = <0x04>;
			cpu-supply = <0x05>;
			phandle = <0x1a>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			enable-method = "psci";
			reg = <0x02>;
			next-level-cache = <0x02>;
			clocks = <0x03 0x01>;
			clock-names = "cpu";
			operating-points-v2 = <0x04>;
			cpu-supply = <0x05>;
			phandle = <0x1b>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			enable-method = "psci";
			reg = <0x03>;
			next-level-cache = <0x02>;
			clocks = <0x03 0x01>;
			clock-names = "cpu";
			operating-points-v2 = <0x04>;
			cpu-supply = <0x05>;
			phandle = <0x1c>;
		};

		l2-cache {
			compatible = "cache";
			cache-level = <0x02>;
			phandle = <0x02>;
		};
	};

	cpu_opp_table {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x04>;

		opp-864000000 {
			opp-hz = <0x00 0x337f9800>;
			opp-microvolt = <0xb1008>;
			clock-latency-ns = <0x30d40>;
		};

		opp-1056000000 {
			opp-hz = <0x00 0x3ef14800>;
			opp-microvolt = <0xc042c>;
			clock-latency-ns = <0x30d40>;
		};

		opp-1320000000 {
			opp-hz = <0x00 0x4ead9a00>;
			opp-microvolt = <0xd2924>;
			clock-latency-ns = <0x30d40>;
		};

		opp-1440000000 {
			opp-hz = <0x00 0x55d4a800>;
			opp-microvolt = <0xe1d48>;
			clock-latency-ns = <0x30d40>;
		};

		opp-1608000000 {
			opp-hz = <0x00 0x5fd82200>;
			opp-microvolt = <0xf116c>;
			clock-latency-ns = <0x30d40>;
		};

		opp-1800000000 {
			opp-hz = <0x00 0x6b49d200>;
			opp-microvolt = <0x103664>;
			clock-latency-ns = <0x30d40>;
		};
	};

	firmware {

		scm {
			compatible = "qcom,scm";
		};
	};

	hwlock {
		compatible = "qcom,tcsr-mutex";
		syscon = <0x06 0x00 0x80>;
		#hwlock-cells = <0x01>;
		phandle = <0x08>;
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <0x01 0x07 0xf04>;
		phandle = <0x1d>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
		phandle = <0x1e>;
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		memory@60000 {
			reg = <0x00 0x60000 0x00 0x6000>;
			no-map;
			phandle = <0x17>;
		};

		memory@4a600000 {
			reg = <0x00 0x4a600000 0x00 0x400000>;
			no-map;
			phandle = <0x1f>;
		};

		memory@4aa00000 {
			reg = <0x00 0x4aa00000 0x00 0x100000>;
			no-map;
			phandle = <0x07>;
		};

		memory@4ab00000 {
			reg = <0x00 0x4ab00000 0x00 0x5500000>;
			no-map;
			phandle = <0x16>;
		};
	};

	smem {
		compatible = "qcom,smem";
		memory-region = <0x07>;
		hwlocks = <0x08 0x00>;
	};

	soc {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges = <0x00 0x00 0x00 0x00 0x00 0xffffffff>;
		dma-ranges;
		compatible = "simple-bus";
		phandle = <0x20>;

		qrng@e1000 {
			compatible = "qcom,prng-ee";
			reg = <0x00 0xe3000 0x00 0x1000>;
			clocks = <0x09 0x88>;
			clock-names = "core";
			phandle = <0x21>;
		};

		dma@704000 {
			compatible = "qcom,bam-v1.7.0";
			reg = <0x00 0x704000 0x00 0x20000>;
			interrupts = <0x00 0xcf 0x04>;
			clocks = <0x09 0x56>;
			clock-names = "bam_clk";
			#dma-cells = <0x01>;
			qcom,ee = <0x01>;
			qcom,controlled-remotely;
			qcom,config-pipe-trust-reg = <0x00>;
			phandle = <0x0a>;
		};

		crypto@73a000 {
			compatible = "qcom,crypto-v5.1";
			reg = <0x00 0x73a000 0x00 0x6000>;
			clocks = <0x09 0x56 0x09 0x57 0x09 0x58>;
			clock-names = "iface", "bus", "core";
			dmas = <0x0a 0x02 0x0a 0x03>;
			dma-names = "rx", "tx";
			phandle = <0x22>;
		};

		pinctrl@1000000 {
			compatible = "qcom,ipq6018-pinctrl";
			reg = <0x00 0x1000000 0x00 0x300000>;
			interrupts = <0x00 0xd0 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x0b 0x00 0x00 0x50>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x0b>;

			serial3-pinmux {
				pins = "gpio44", "gpio45";
				function = "blsp2_uart";
				drive-strength = <0x08>;
				bias-pull-down;
				phandle = <0x0e>;
			};

			i2c-1-pins {
				pins = "gpio42", "gpio43";
				function = "blsp2_i2c";
				drive-strength = <0x08>;
				phandle = <0x11>;
			};

			spi-0-pins {
				pins = "gpio38", "gpio39", "gpio40", "gpio41";
				function = "blsp0_spi";
				drive-strength = <0x08>;
				bias-pull-down;
				phandle = <0x10>;
			};
		};

		gcc@1800000 {
			compatible = "qcom,gcc-ipq6018";
			reg = <0x00 0x1800000 0x00 0x80000>;
			clocks = <0x0c 0x0d>;
			clock-names = "xo", "sleep_clk";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x09>;
		};

		syscon@1905000 {
			compatible = "syscon";
			reg = <0x00 0x1905000 0x00 0x8000>;
			phandle = <0x06>;
		};

		syscon@1945000 {
			compatible = "syscon";
			reg = <0x00 0x1945000 0x00 0xe000>;
			phandle = <0x14>;
		};

		dma@7884000 {
			compatible = "qcom,bam-v1.7.0";
			reg = <0x00 0x7884000 0x00 0x2b000>;
			interrupts = <0x00 0xee 0x04>;
			clocks = <0x09 0x43>;
			clock-names = "bam_clk";
			#dma-cells = <0x01>;
			qcom,ee = <0x00>;
			phandle = <0x0f>;
		};

		serial@78b1000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x00 0x78b1000 0x00 0x200>;
			interrupts = <0x00 0x132 0x04>;
			clocks = <0x09 0x52 0x09 0x43>;
			clock-names = "core", "iface";
			status = "okay";
			pinctrl-0 = <0x0e>;
			pinctrl-names = "default";
			phandle = <0x23>;
		};

		spi@78b5000 {
			compatible = "qcom,spi-qup-v2.2.1";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			reg = <0x00 0x78b5000 0x00 0x600>;
			interrupts = <0x00 0x5f 0x04>;
			spi-max-frequency = <0x2faf080>;
			clocks = <0x09 0x45 0x09 0x43>;
			clock-names = "core", "iface";
			dmas = <0x0f 0x0c 0x0f 0x0d>;
			dma-names = "tx", "rx";
			status = "okay";
			cs-select = <0x00>;
			pinctrl-0 = <0x10>;
			pinctrl-names = "default";
			phandle = <0x24>;

			m25p80@0 {
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				reg = <0x00>;
				compatible = "n25q128a11";
				spi-max-frequency = <0x2faf080>;
			};
		};

		spi@78b6000 {
			compatible = "qcom,spi-qup-v2.2.1";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			reg = <0x00 0x78b6000 0x00 0x600>;
			interrupts = <0x00 0x60 0x04>;
			spi-max-frequency = <0x2faf080>;
			clocks = <0x09 0x47 0x09 0x43>;
			clock-names = "core", "iface";
			dmas = <0x0f 0x0e 0x0f 0x0f>;
			dma-names = "tx", "rx";
			status = "disabled";
			phandle = <0x25>;
		};

		i2c@78b6000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			reg = <0x00 0x78b6000 0x00 0x600>;
			interrupts = <0x00 0x60 0x04>;
			clocks = <0x09 0x43 0x09 0x46>;
			clock-names = "iface", "core";
			clock-frequency = <0x61a80>;
			dmas = <0x0f 0x0f 0x0f 0x0e>;
			dma-names = "rx", "tx";
			status = "disabled";
			phandle = <0x26>;
		};

		i2c@78b7000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			reg = <0x00 0x78b7000 0x00 0x600>;
			interrupts = <0x00 0x61 0x04>;
			clocks = <0x09 0x43 0x09 0x48>;
			clock-names = "iface", "core";
			clock-frequency = <0x61a80>;
			dmas = <0x0f 0x11 0x0f 0x10>;
			dma-names = "rx", "tx";
			status = "okay";
			pinctrl-0 = <0x11>;
			pinctrl-names = "default";
			phandle = <0x27>;
		};

		interrupt-controller@b000000 {
			compatible = "qcom,msm-qgic2";
			interrupt-controller;
			#interrupt-cells = <0x03>;
			reg = <0x00 0xb000000 0x00 0x1000 0x00 0xb002000 0x00 0x1000 0x00 0xb001000 0x00 0x1000 0x00 0xb004000 0x00 0x1000>;
			interrupts = <0x01 0x09 0x04>;
			phandle = <0x01>;
		};

		watchdog@b017000 {
			compatible = "qcom,kpss-wdt";
			interrupts = <0x00 0x03 0x01>;
			reg = <0x00 0xb017000 0x00 0x40>;
			clocks = <0x0d>;
			timeout-sec = <0x0a>;
		};

		mailbox@b111000 {
			compatible = "qcom,ipq6018-apcs-apps-global";
			reg = <0x00 0xb111000 0x00 0x1000>;
			#clock-cells = <0x01>;
			clocks = <0x12 0x0c>;
			clock-names = "pll", "xo";
			#mbox-cells = <0x01>;
			phandle = <0x03>;
		};

		clock@b116000 {
			compatible = "qcom,ipq6018-a53pll";
			reg = <0x00 0xb116000 0x00 0x40>;
			#clock-cells = <0x00>;
			clocks = <0x0c>;
			clock-names = "xo";
			phandle = <0x12>;
		};

		timer {
			compatible = "arm,armv8-timer";
			interrupts = <0x01 0x02 0xf08 0x01 0x03 0xf08 0x01 0x04 0xf08 0x01 0x01 0xf08>;
		};

		timer@b120000 {
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0x00 0xb120000 0x00 0x1000>;
			clock-frequency = <0x124f800>;

			frame@b120000 {
				frame-number = <0x00>;
				interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>;
				reg = <0x00 0xb121000 0x00 0x1000 0x00 0xb122000 0x00 0x1000>;
			};

			frame@b123000 {
				frame-number = <0x01>;
				interrupts = <0x00 0x09 0x04>;
				reg = <0x00 0xb123000 0x00 0x1000>;
				status = "disabled";
			};

			frame@b124000 {
				frame-number = <0x02>;
				interrupts = <0x00 0x0a 0x04>;
				reg = <0x00 0xb124000 0x00 0x1000>;
				status = "disabled";
			};

			frame@b125000 {
				frame-number = <0x03>;
				interrupts = <0x00 0x0b 0x04>;
				reg = <0x00 0xb125000 0x00 0x1000>;
				status = "disabled";
			};

			frame@b126000 {
				frame-number = <0x04>;
				interrupts = <0x00 0x0c 0x04>;
				reg = <0x00 0xb126000 0x00 0x1000>;
				status = "disabled";
			};

			frame@b127000 {
				frame-number = <0x05>;
				interrupts = <0x00 0x0d 0x04>;
				reg = <0x00 0xb127000 0x00 0x1000>;
				status = "disabled";
			};

			frame@b128000 {
				frame-number = <0x06>;
				interrupts = <0x00 0x0e 0x04>;
				reg = <0x00 0xb128000 0x00 0x1000>;
				status = "disabled";
			};
		};

		remoteproc@cd00000 {
			compatible = "qcom,ipq8074-wcss-pil";
			reg = <0x00 0xcd00000 0x00 0x4040 0x00 0x4ab000 0x00 0x20>;
			reg-names = "qdsp6", "rmb";
			interrupts-extended = <0x01 0x00 0x145 0x01 0x13 0x00 0x00 0x13 0x01 0x00 0x13 0x02 0x00 0x13 0x03 0x00>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			resets = <0x09 0x7f 0x09 0x16 0x09 0x17>;
			reset-names = "wcss_aon_reset", "wcss_reset", "wcss_q6_reset";
			clocks = <0x09 0x88>;
			clock-names = "prng";
			qcom,halt-regs = <0x14 0xa000 0xd000 0x00>;
			qcom,smem-states = <0x15 0x00 0x15 0x01>;
			qcom,smem-state-names = "shutdown", "stop";
			memory-region = <0x16>;
			phandle = <0x28>;

			glink-edge {
				interrupts = <0x00 0x141 0x01>;
				qcom,remote-pid = <0x01>;
				mboxes = <0x03 0x08>;

				qrtr_requests {
					qcom,glink-channels = "IPCRTR";
				};
			};
		};
	};

	wcss-smp2p {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1b3 0x1ac>;
		interrupt-parent = <0x01>;
		interrupts = <0x00 0x142 0x01>;
		mboxes = <0x03 0x09>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x01>;
		phandle = <0x29>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x15>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x13>;
		};
	};

	rpm-glink {
		compatible = "qcom,glink-rpm";
		interrupts = <0x00 0xa8 0x01>;
		qcom,rpm-msg-ram = <0x17>;
		mboxes = <0x03 0x00>;

		glink-channel {
			compatible = "qcom,rpm-ipq6018";
			qcom,glink-channels = "rpm_requests";
			phandle = <0x2a>;

			regulators {
				compatible = "qcom,rpm-mp5496-regulators";

				s2 {
					regulator-min-microvolt = <0xb1008>;
					regulator-max-microvolt = <0x103664>;
					regulator-always-on;
					phandle = <0x05>;
				};
			};
		};
	};

	aliases {
		serial0 = "/soc/serial@78b1000";
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs-append = " swiotlb=1";
	};

	__symbols__ {
		sleep_clk = "/clocks/sleep-clk";
		xo = "/clocks/xo";
		cpus = "/cpus";
		CPU0 = "/cpus/cpu@0";
		CPU1 = "/cpus/cpu@1";
		CPU2 = "/cpus/cpu@2";
		CPU3 = "/cpus/cpu@3";
		L2_0 = "/cpus/l2-cache";
		cpu_opp_table = "/cpu_opp_table";
		tcsr_mutex = "/hwlock";
		pmuv8 = "/pmu";
		psci = "/psci";
		rpm_msg_ram = "/reserved-memory/memory@60000";
		tz = "/reserved-memory/memory@4a600000";
		smem_region = "/reserved-memory/memory@4aa00000";
		q6_region = "/reserved-memory/memory@4ab00000";
		soc = "/soc";
		prng = "/soc/qrng@e1000";
		cryptobam = "/soc/dma@704000";
		crypto = "/soc/crypto@73a000";
		tlmm = "/soc/pinctrl@1000000";
		serial_3_pins = "/soc/pinctrl@1000000/serial3-pinmux";
		i2c_1_pins = "/soc/pinctrl@1000000/i2c-1-pins";
		spi_0_pins = "/soc/pinctrl@1000000/spi-0-pins";
		gcc = "/soc/gcc@1800000";
		tcsr_mutex_regs = "/soc/syscon@1905000";
		tcsr_q6 = "/soc/syscon@1945000";
		blsp_dma = "/soc/dma@7884000";
		blsp1_uart3 = "/soc/serial@78b1000";
		spi_0 = "/soc/spi@78b5000";
		spi_1 = "/soc/spi@78b6000";
		i2c_0 = "/soc/i2c@78b6000";
		i2c_1 = "/soc/i2c@78b7000";
		intc = "/soc/interrupt-controller@b000000";
		apcs_glb = "/soc/mailbox@b111000";
		a53pll = "/soc/clock@b116000";
		q6v5_wcss = "/soc/remoteproc@cd00000";
		wcss = "/wcss-smp2p";
		wcss_smp2p_out = "/wcss-smp2p/master-kernel";
		wcss_smp2p_in = "/wcss-smp2p/slave-kernel";
		rpm_requests = "/rpm-glink/glink-channel";
		ipq6018_s2 = "/rpm-glink/glink-channel/regulators/s2";
	};
};