Commit graph

213 commits

Author SHA1 Message Date
Abhinav Kumar
7301b0ff09 drm/msm/dsi: skip the wait for video mode done if not applicable
[ Upstream commit ab483e3adcc178254eb1ce0fbdfbea65f86f1006 ]

dsi_wait4video_done() API waits for the DSI video mode engine to
become idle so that we can transmit the DCS commands in the
beginning of BLLP. However, with the current sequence, the MDP
timing engine is turned on after the panel's pre_enable() callback
which can send out the DCS commands needed to power up the panel.

During those cases, this API will always timeout and print out the
error spam leading to long bootup times and log flooding.

Fix this by checking if the DSI video engine was actually busy before
waiting for it to become idle otherwise this is a redundant wait.

changes in v2:
	- move the reg read below the video mode check
	- minor fixes in commit text

Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/34
Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support")
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/557853/
Link: https://lore.kernel.org/r/20230915204426.19011-1-quic_abhinavk@quicinc.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-08 11:25:44 +01:00
Kuogee Hsieh
7c37618eab drm/msm/dp: do not reinitialize phy unless retry during link training
[ Upstream commit 0c1a2e69bcb506f48ebf94bd199bab0b93f66da2 ]

DP PHY re-initialization done using dp_ctrl_reinitialize_mainlink() will
cause PLL unlocked initially and then PLL gets locked at the end of
initialization. PLL_UNLOCKED interrupt will fire during this time if the
interrupt mask is enabled.

However currently DP driver link training implementation incorrectly
re-initializes PHY unconditionally during link training as the PHY was
already configured in dp_ctrl_enable_mainlink_clocks().

Fix this by re-initializing the PHY only if the previous link training
failed.

[drm:dp_aux_isr] *ERROR* Unexpected DP AUX IRQ 0x01000000 when not busy

Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support")
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/30
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/551847/
Link: https://lore.kernel.org/r/1691533190-19335-1-git-send-email-quic_khsieh@quicinc.com
[quic_abhinavk@quicinc.com: added line break in commit text]
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-08 11:25:44 +01:00
Gabriel2392
5ea09e31c9 gpu: exynos: Allow 2093MHz memory frequency 2024-10-17 12:53:13 -03:00
Gabriel2392
9e6b7e114f gpu/exynos: Make 'gpu_mm_min_clock' readonly too 2024-10-04 20:09:29 -03:00
Gabriel2392
f2e3b984f5 gpu/exynos: Create sysfs 'gpu_unlock' to control such feature 2024-10-04 20:09:29 -03:00
Gabriel2392
9b8f55709b gpu: exynos: imprison userspace requests for changing min/max frequencies
> RIP OneUI desires
2024-10-04 20:09:13 -03:00
Gabriel2392
fdef7b54c3 exynos_gpu: Don't allow userspace to control freqs 2024-06-15 16:28:49 -03:00
Gabriel2392
2de2633674 gpu: exynos: don't read dvfs table from dtb
-> Hardcode in kernel module
-> Unlock all frequencies up to 1.2GHz

Signed-off-by: Gabriel2392 <gabriel824m@gmail.com>
2024-06-15 16:28:49 -03:00
roynatech2544
0db070a424 Fix clang 16 errors treewide
- misleading indentation
- strict prototypes [1]

[1]
int foo(void) {...}
instead of
int foo() {...}

drivers: usb: Fix misleading indentation
2024-06-15 16:28:48 -03:00
Gabriel2392
2efbd45726 configs: Disable Mali debugging 2024-06-15 16:21:18 -03:00
Gabriel2392
5b70558bfb configs: Enable r38 Mali driver 2024-06-15 16:21:18 -03:00
Gabriel2392
9418752122 treewide: fix build errors 2024-06-15 16:21:17 -03:00
Gabriel2392
7ed7ee9edf Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00