235 lines
8.3 KiB
C
235 lines
8.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later
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* sound/soc/samsung/vts/vts_soc_v1.h
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*
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* ALSA SoC - Samsung VTS driver
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*
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* Copyright (c) 2021 Samsung Electronics Co. Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __SND_SOC_VTS_DEP_SOC_V1_H
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#define __SND_SOC_VTS_DEP_SOC_V1_H
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/* SYSREG_VTS */
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#define VTS_DEBUG (0x0404)
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#define VTS_DMIC_CLK_CTRL (0x0408)
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#define VTS_HWACG_CM4_CLKREQ (0x0428)
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#define VTS_DMIC_CLK_CON (0x0434)
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#define VTS_SYSPOWER_CTRL (0x0500)
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#define VTS_SYSPOWER_STATUS (0x0504)
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#define VTS_MIF_REQ_OUT (0x0200)
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#define VTS_MIF_REQ_ACK_IN (0x0204)
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/* VTS_DEBUG */
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#define VTS_NMI_EN_BY_WDT_OFFSET (0)
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#define VTS_NMI_EN_BY_WDT_SIZE (1)
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/* VTS_DMIC_CLK_CTRL */
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#define VTS_CG_STATUS_OFFSET (5)
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#define VTS_CG_STATUS_SIZE (1)
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#define VTS_CLK_ENABLE_OFFSET (4)
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#define VTS_CLK_ENABLE_SIZE (1)
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#define VTS_CLK_SEL_OFFSET (0)
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#define VTS_CLK_SEL_SIZE (1)
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/* VTS_HWACG_CM4_CLKREQ */
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#define VTS_MASK_OFFSET (0)
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#define VTS_MASK_SIZE (32)
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/* VTS_DMIC_CLK_CON */
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#define VTS_ENABLE_CLK_GEN_OFFSET (0)
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#define VTS_ENABLE_CLK_GEN_SIZE (1)
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#define VTS_SEL_EXT_DMIC_CLK_OFFSET (1)
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#define VTS_SEL_EXT_DMIC_CLK_SIZE (1)
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#define VTS_ENABLE_CLK_CLK_GEN_OFFSET (14)
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#define VTS_ENABLE_CLK_CLK_GEN_SIZE (1)
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/* VTS_SYSPOWER_CTRL */
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#define VTS_SYSPOWER_CTRL_OFFSET (0)
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#define VTS_SYSPOWER_CTRL_SIZE (1)
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/* VTS_SYSPOWER_STATUS */
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#define VTS_SYSPOWER_STATUS_OFFSET (0)
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#define VTS_SYSPOWER_STATUS_SIZE (1)
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#define VTS_DMIC_ENABLE_DMIC_IF (0x0000)
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#define VTS_DMIC_CONTROL_DMIC_IF (0x0004)
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/* VTS_DMIC_ENABLE_DMIC_IF */
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#define VTS_DMIC_ENABLE_DMIC_IF_OFFSET (31)
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#define VTS_DMIC_ENABLE_DMIC_IF_SIZE (1)
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#define VTS_DMIC_PERIOD_DATA2REQ_OFFSET (16)
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#define VTS_DMIC_PERIOD_DATA2REQ_SIZE (2)
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/* VTS_DMIC_CONTROL_DMIC_IF */
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#define VTS_DMIC_HPF_EN_OFFSET (31)
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#define VTS_DMIC_HPF_EN_SIZE (1)
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#define VTS_DMIC_HPF_SEL_OFFSET (28)
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#define VTS_DMIC_HPF_SEL_SIZE (1)
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#define VTS_DMIC_CPS_SEL_OFFSET (27)
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#define VTS_DMIC_CPS_SEL_SIZE (1)
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#define VTS_DMIC_GAIN_OFFSET (24)
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#define VTS_DMIC_1DB_GAIN_OFFSET (21)
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#define VTS_DMIC_GAIN_SIZE (3)
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#define VTS_DMIC_DMIC_SEL_OFFSET (18)
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#define VTS_DMIC_DMIC_SEL_SIZE (1)
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#define VTS_DMIC_RCH_EN_OFFSET (17)
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#define VTS_DMIC_RCH_EN_SIZE (1)
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#define VTS_DMIC_LCH_EN_OFFSET (16)
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#define VTS_DMIC_LCH_EN_SIZE (1)
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#define VTS_DMIC_SYS_SEL_OFFSET (12)
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#define VTS_DMIC_SYS_SEL_SIZE (2)
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#define VTS_DMIC_POLARITY_CLK_OFFSET (10)
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#define VTS_DMIC_POLARITY_CLK_SIZE (1)
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#define VTS_DMIC_POLARITY_OUTPUT_OFFSET (9)
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#define VTS_DMIC_POLARITY_OUTPUT_SIZE (1)
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#define VTS_DMIC_POLARITY_INPUT_OFFSET (8)
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#define VTS_DMIC_POLARITY_INPUT_SIZE (1)
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#define VTS_DMIC_OVFW_CTRL_OFFSET (4)
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#define VTS_DMIC_OVFW_CTRL_SIZE (1)
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#define VTS_DMIC_CIC_SEL_OFFSET (0)
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#define VTS_DMIC_CIC_SEL_SIZE (1)
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/* CM4 */
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#define VTS_CM4_R(x) (0x0010 + (x * 0x4))
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#define VTS_CM4_PC (0x0004)
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#define VTS_BAAW_BASE (0x60000000)
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#define VTS_BAAW_SRC_START_ADDRESS (0x10000)
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#define VTS_BAAW_SRC_END_ADDRESS (0x10004)
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#define VTS_BAAW_REMAPPED_ADDRESS (0x10008)
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#define VTS_BAAW_INIT_DONE (0x1000C)
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#define SICD_SOC_DOWN_OFFSET (0x18C)
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#define SICD_MIF_DOWN_OFFSET (0x19C)
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#if IS_ENABLED(CONFIG_SOC_EXYNOS8895) || \
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IS_ENABLED(CONFIG_SOC_EXYNOS9810)
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#define VTS_IRQ_VTS_ERROR (16)
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#define VTS_IRQ_VTS_BOOT_COMPLETED (17)
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#define VTS_IRQ_VTS_IPC_RECEIVED (18)
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#define VTS_IRQ_VTS_VOICE_TRIGGERED (19)
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#define VTS_IRQ_VTS_PERIOD_ELAPSED (20)
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#define VTS_IRQ_VTS_REC_PERIOD_ELAPSED (21)
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#define VTS_IRQ_VTS_DBGLOG_BUFZERO (22)
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#define VTS_IRQ_VTS_DBGLOG_BUFONE (23)
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#define VTS_IRQ_VTS_AUDIO_DUMP (24)
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#define VTS_IRQ_VTS_LOG_DUMP (25)
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#define VTS_IRQ_COUNT (26)
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#define VTS_IRQ_AP_IPC_RECEIVED (0)
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#define VTS_IRQ_AP_SET_DRAM_BUFFER (1)
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#define VTS_IRQ_AP_START_RECOGNITION (2)
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#define VTS_IRQ_AP_STOP_RECOGNITION (3)
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#define VTS_IRQ_AP_START_COPY (4)
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#define VTS_IRQ_AP_STOP_COPY (5)
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#define VTS_IRQ_AP_SET_MODE (6)
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#define VTS_IRQ_AP_POWER_DOWN (7)
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#define VTS_IRQ_AP_TARGET_SIZE (8)
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#define VTS_IRQ_AP_SET_REC_BUFFER (9)
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#define VTS_IRQ_AP_START_REC (10)
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#define VTS_IRQ_AP_STOP_REC (11)
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#define VTS_IRQ_AP_RESTART_RECOGNITION (13)
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#define VTS_IRQ_AP_COMMAND (15)
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#else
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#define VTS_IRQ_VTS_ERROR (0)
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#define VTS_IRQ_VTS_BOOT_COMPLETED (1)
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#define VTS_IRQ_VTS_IPC_RECEIVED (2)
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#define VTS_IRQ_VTS_VOICE_TRIGGERED (3)
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#define VTS_IRQ_VTS_PERIOD_ELAPSED (4)
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#define VTS_IRQ_VTS_REC_PERIOD_ELAPSED (5)
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#define VTS_IRQ_VTS_DBGLOG_BUFZERO (6)
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#define VTS_IRQ_VTS_DBGLOG_BUFONE (7)
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#define VTS_IRQ_VTS_AUDIO_DUMP (8)
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#define VTS_IRQ_VTS_LOG_DUMP (9)
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#define VTS_IRQ_COUNT (10)
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#define VTS_IRQ_VTS_SLIF_DUMP (11)
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#define VTS_IRQ_VTS_CP_WAKEUP (15)
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#define VTS_IRQ_AP_IPC_RECEIVED (16)
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#define VTS_IRQ_AP_SET_DRAM_BUFFER (17)
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#define VTS_IRQ_AP_START_RECOGNITION (18)
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#define VTS_IRQ_AP_STOP_RECOGNITION (19)
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#define VTS_IRQ_AP_START_COPY (20)
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#define VTS_IRQ_AP_STOP_COPY (21)
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#define VTS_IRQ_AP_SET_MODE (22)
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#define VTS_IRQ_AP_POWER_DOWN (23)
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#define VTS_IRQ_AP_TARGET_SIZE (24)
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#define VTS_IRQ_AP_SET_REC_BUFFER (25)
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#define VTS_IRQ_AP_START_REC (26)
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#define VTS_IRQ_AP_STOP_REC (27)
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#define VTS_IRQ_AP_GET_VERSION (28)
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#define VTS_IRQ_AP_RESTART_RECOGNITION (29)
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#define VTS_IRQ_AP_COMMAND (31)
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#endif
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#if (IS_ENABLED(CONFIG_SOC_EXYNOS9830) || IS_ENABLED(CONFIG_SOC_EXYNOS2100))
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#define VTS_DMIC_IF_ENABLE_DMIC_IF (0x1000)
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#define VTS_DMIC_IF_ENABLE_DMIC_AUD0 (0x6)
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#define VTS_DMIC_IF_ENABLE_DMIC_AUD1 (0x7)
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#define VTS_DMIC_IF_ENABLE_DMIC_AUD2 (0x8)
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#endif
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#if (IS_ENABLED(CONFIG_SOC_EXYNOS9820) || \
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IS_ENABLED(CONFIG_SOC_EXYNOS9830) || \
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IS_ENABLED(CONFIG_SOC_EXYNOS2100))
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#define SOUND_MODEL_SVOICE_OFFSET (0xAA800)
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#define SOUND_MODEL_GOOGLE_OFFSET (0xB2B00)
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#else
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#define SOUND_MODEL_SVOICE_OFFSET (0x2A800)
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#define SOUND_MODEL_SVOICE_OFFSET (0x32B00)
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#endif
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/* VTS firmware version information offset */
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#if IS_ENABLED(CONFIG_SOC_EXYNOS2100)
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#define VTSFW_VERSION_OFFSET (0xac)
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#define DETLIB_VERSION_OFFSET (0xa8)
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#elif IS_ENABLED(CONFIG_SOC_EXYNOS9830)
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#define VTSFW_VERSION_OFFSET (0x9c)
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#define DETLIB_VERSION_OFFSET (0x98)
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#else
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#define VTSFW_VERSION_OFFSET (0x7c)
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#define DETLIB_VERSION_OFFSET (0x78)
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#endif
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#ifdef CONFIG_SOC_EXYNOS8895
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#define PAD_RETENTION_VTS_OPTION (0x3148)
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#define VTS_CPU_CONFIGURATION (0x24E0)
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#define VTS_CPU_LOCAL_PWR_CFG (0x00000001)
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#define VTS_CPU_STATUS (0x24E4)
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#define VTS_CPU_STATUS_STATUS_MASK (0x00000001)
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#define VTS_CPU_STANDBY VTS_CPU_STATUS
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#define VTS_CPU_STANDBY_STANDBYWFI_MASK (0x10000000)
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#define VTS_CPU_OPTION (0x24E8)
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#define VTS_CPU_OPTION_USE_STANDBYWFI_MASK (0x00010000)
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#define VTS_CPU_RESET_OPTION VTS_CPU_OPTION
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#define VTS_CPU_RESET_OPTION_ENABLE_CPU_MASK (0x00008000)
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#elif defined(CONFIG_SOC_EXYNOS9810)
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#define PAD_RETENTION_VTS_OPTION (0x4AD8)
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#define VTS_CPU_CONFIGURATION (0x4AC4)
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#define VTS_CPU_LOCAL_PWR_CFG (0x00000001)
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#define VTS_CPU_STATUS (0x4AC8)
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#define VTS_CPU_STATUS_STATUS_MASK (0x00000001)
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#define VTS_CPU_STANDBY (0x3814)
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#define VTS_CPU_STANDBY_STANDBYWFI_MASK (0x10000000)
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#define VTS_CPU_OPTION (0x3818)
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#define VTS_CPU_OPTION_USE_STANDBYWFI_MASK (0x00010000)
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#define VTS_CPU_RESET_OPTION (0x4ACC)
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#define VTS_CPU_RESET_OPTION_ENABLE_CPU_MASK (0x10000000)
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#elif defined(CONFIG_SOC_EXYNOS9820)
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#define PAD_RETENTION_VTS_OPTION (0x2AA0)
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#define VTS_CPU_CONFIGURATION (0x2C80)
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#define VTS_CPU_LOCAL_PWR_CFG (0x00000001)
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#define VTS_CPU_IN (0x2CA4)
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#define VTS_CPU_IN_SLEEPING_MASK (0x00000002)
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#elif defined(CONFIG_SOC_EXYNOS9830)
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#define PAD_RETENTION_VTS_OPTION (0x2D20) /* VTS_OUT:PAD__RTO */
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#define VTS_CPU_CONFIGURATION (0x3080)
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#define VTS_CPU_LOCAL_PWR_CFG (0x00000001)
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#define VTS_CPU_IN (0x30A4)
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#define VTS_CPU_IN_SLEEPING_MASK (0x00000002)
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#elif IS_ENABLED(CONFIG_SOC_EXYNOS2100)
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#define PAD_RETENTION_VTS_OPTION (0x32A0) // VTS_OUT : PAD__RTO
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#define VTS_CPU_CONFIGURATION (0x3640)
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#define VTS_CPU_LOCAL_PWR_CFG (0x00000001)
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#define VTS_CPU_IN (0x3664)
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#define VTS_CPU_IN_SLEEPING_MASK (0x00000002)
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#endif
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#endif /* __SND_SOC_VTS_DEP_SOC_V1_H */
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