/* SPDX-License-Identifier: GPL-2.0-or-later * sound/soc/samsung/vts/vts_soc_v1.h * * ALSA SoC - Samsung VTS driver * * Copyright (c) 2021 Samsung Electronics Co. Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #ifndef __SND_SOC_VTS_DEP_SOC_V1_H #define __SND_SOC_VTS_DEP_SOC_V1_H /* SYSREG_VTS */ #define VTS_DEBUG (0x0404) #define VTS_DMIC_CLK_CTRL (0x0408) #define VTS_HWACG_CM4_CLKREQ (0x0428) #define VTS_DMIC_CLK_CON (0x0434) #define VTS_SYSPOWER_CTRL (0x0500) #define VTS_SYSPOWER_STATUS (0x0504) #define VTS_MIF_REQ_OUT (0x0200) #define VTS_MIF_REQ_ACK_IN (0x0204) /* VTS_DEBUG */ #define VTS_NMI_EN_BY_WDT_OFFSET (0) #define VTS_NMI_EN_BY_WDT_SIZE (1) /* VTS_DMIC_CLK_CTRL */ #define VTS_CG_STATUS_OFFSET (5) #define VTS_CG_STATUS_SIZE (1) #define VTS_CLK_ENABLE_OFFSET (4) #define VTS_CLK_ENABLE_SIZE (1) #define VTS_CLK_SEL_OFFSET (0) #define VTS_CLK_SEL_SIZE (1) /* VTS_HWACG_CM4_CLKREQ */ #define VTS_MASK_OFFSET (0) #define VTS_MASK_SIZE (32) /* VTS_DMIC_CLK_CON */ #define VTS_ENABLE_CLK_GEN_OFFSET (0) #define VTS_ENABLE_CLK_GEN_SIZE (1) #define VTS_SEL_EXT_DMIC_CLK_OFFSET (1) #define VTS_SEL_EXT_DMIC_CLK_SIZE (1) #define VTS_ENABLE_CLK_CLK_GEN_OFFSET (14) #define VTS_ENABLE_CLK_CLK_GEN_SIZE (1) /* VTS_SYSPOWER_CTRL */ #define VTS_SYSPOWER_CTRL_OFFSET (0) #define VTS_SYSPOWER_CTRL_SIZE (1) /* VTS_SYSPOWER_STATUS */ #define VTS_SYSPOWER_STATUS_OFFSET (0) #define VTS_SYSPOWER_STATUS_SIZE (1) #define VTS_DMIC_ENABLE_DMIC_IF (0x0000) #define VTS_DMIC_CONTROL_DMIC_IF (0x0004) /* VTS_DMIC_ENABLE_DMIC_IF */ #define VTS_DMIC_ENABLE_DMIC_IF_OFFSET (31) #define VTS_DMIC_ENABLE_DMIC_IF_SIZE (1) #define VTS_DMIC_PERIOD_DATA2REQ_OFFSET (16) #define VTS_DMIC_PERIOD_DATA2REQ_SIZE (2) /* VTS_DMIC_CONTROL_DMIC_IF */ #define VTS_DMIC_HPF_EN_OFFSET (31) #define VTS_DMIC_HPF_EN_SIZE (1) #define VTS_DMIC_HPF_SEL_OFFSET (28) #define VTS_DMIC_HPF_SEL_SIZE (1) #define VTS_DMIC_CPS_SEL_OFFSET (27) #define VTS_DMIC_CPS_SEL_SIZE (1) #define VTS_DMIC_GAIN_OFFSET (24) #define VTS_DMIC_1DB_GAIN_OFFSET (21) #define VTS_DMIC_GAIN_SIZE (3) #define VTS_DMIC_DMIC_SEL_OFFSET (18) #define VTS_DMIC_DMIC_SEL_SIZE (1) #define VTS_DMIC_RCH_EN_OFFSET (17) #define VTS_DMIC_RCH_EN_SIZE (1) #define VTS_DMIC_LCH_EN_OFFSET (16) #define VTS_DMIC_LCH_EN_SIZE (1) #define VTS_DMIC_SYS_SEL_OFFSET (12) #define VTS_DMIC_SYS_SEL_SIZE (2) #define VTS_DMIC_POLARITY_CLK_OFFSET (10) #define VTS_DMIC_POLARITY_CLK_SIZE (1) #define VTS_DMIC_POLARITY_OUTPUT_OFFSET (9) #define VTS_DMIC_POLARITY_OUTPUT_SIZE (1) #define VTS_DMIC_POLARITY_INPUT_OFFSET (8) #define VTS_DMIC_POLARITY_INPUT_SIZE (1) #define VTS_DMIC_OVFW_CTRL_OFFSET (4) #define VTS_DMIC_OVFW_CTRL_SIZE (1) #define VTS_DMIC_CIC_SEL_OFFSET (0) #define VTS_DMIC_CIC_SEL_SIZE (1) /* CM4 */ #define VTS_CM4_R(x) (0x0010 + (x * 0x4)) #define VTS_CM4_PC (0x0004) #define VTS_BAAW_BASE (0x60000000) #define VTS_BAAW_SRC_START_ADDRESS (0x10000) #define VTS_BAAW_SRC_END_ADDRESS (0x10004) #define VTS_BAAW_REMAPPED_ADDRESS (0x10008) #define VTS_BAAW_INIT_DONE (0x1000C) #define SICD_SOC_DOWN_OFFSET (0x18C) #define SICD_MIF_DOWN_OFFSET (0x19C) #if IS_ENABLED(CONFIG_SOC_EXYNOS8895) || \ IS_ENABLED(CONFIG_SOC_EXYNOS9810) #define VTS_IRQ_VTS_ERROR (16) #define VTS_IRQ_VTS_BOOT_COMPLETED (17) #define VTS_IRQ_VTS_IPC_RECEIVED (18) #define VTS_IRQ_VTS_VOICE_TRIGGERED (19) #define VTS_IRQ_VTS_PERIOD_ELAPSED (20) #define VTS_IRQ_VTS_REC_PERIOD_ELAPSED (21) #define VTS_IRQ_VTS_DBGLOG_BUFZERO (22) #define VTS_IRQ_VTS_DBGLOG_BUFONE (23) #define VTS_IRQ_VTS_AUDIO_DUMP (24) #define VTS_IRQ_VTS_LOG_DUMP (25) #define VTS_IRQ_COUNT (26) #define VTS_IRQ_AP_IPC_RECEIVED (0) #define VTS_IRQ_AP_SET_DRAM_BUFFER (1) #define VTS_IRQ_AP_START_RECOGNITION (2) #define VTS_IRQ_AP_STOP_RECOGNITION (3) #define VTS_IRQ_AP_START_COPY (4) #define VTS_IRQ_AP_STOP_COPY (5) #define VTS_IRQ_AP_SET_MODE (6) #define VTS_IRQ_AP_POWER_DOWN (7) #define VTS_IRQ_AP_TARGET_SIZE (8) #define VTS_IRQ_AP_SET_REC_BUFFER (9) #define VTS_IRQ_AP_START_REC (10) #define VTS_IRQ_AP_STOP_REC (11) #define VTS_IRQ_AP_RESTART_RECOGNITION (13) #define VTS_IRQ_AP_COMMAND (15) #else #define VTS_IRQ_VTS_ERROR (0) #define VTS_IRQ_VTS_BOOT_COMPLETED (1) #define VTS_IRQ_VTS_IPC_RECEIVED (2) #define VTS_IRQ_VTS_VOICE_TRIGGERED (3) #define VTS_IRQ_VTS_PERIOD_ELAPSED (4) #define VTS_IRQ_VTS_REC_PERIOD_ELAPSED (5) #define VTS_IRQ_VTS_DBGLOG_BUFZERO (6) #define VTS_IRQ_VTS_DBGLOG_BUFONE (7) #define VTS_IRQ_VTS_AUDIO_DUMP (8) #define VTS_IRQ_VTS_LOG_DUMP (9) #define VTS_IRQ_COUNT (10) #define VTS_IRQ_VTS_SLIF_DUMP (11) #define VTS_IRQ_VTS_CP_WAKEUP (15) #define VTS_IRQ_AP_IPC_RECEIVED (16) #define VTS_IRQ_AP_SET_DRAM_BUFFER (17) #define VTS_IRQ_AP_START_RECOGNITION (18) #define VTS_IRQ_AP_STOP_RECOGNITION (19) #define VTS_IRQ_AP_START_COPY (20) #define VTS_IRQ_AP_STOP_COPY (21) #define VTS_IRQ_AP_SET_MODE (22) #define VTS_IRQ_AP_POWER_DOWN (23) #define VTS_IRQ_AP_TARGET_SIZE (24) #define VTS_IRQ_AP_SET_REC_BUFFER (25) #define VTS_IRQ_AP_START_REC (26) #define VTS_IRQ_AP_STOP_REC (27) #define VTS_IRQ_AP_GET_VERSION (28) #define VTS_IRQ_AP_RESTART_RECOGNITION (29) #define VTS_IRQ_AP_COMMAND (31) #endif #if (IS_ENABLED(CONFIG_SOC_EXYNOS9830) || IS_ENABLED(CONFIG_SOC_EXYNOS2100)) #define VTS_DMIC_IF_ENABLE_DMIC_IF (0x1000) #define VTS_DMIC_IF_ENABLE_DMIC_AUD0 (0x6) #define VTS_DMIC_IF_ENABLE_DMIC_AUD1 (0x7) #define VTS_DMIC_IF_ENABLE_DMIC_AUD2 (0x8) #endif #if (IS_ENABLED(CONFIG_SOC_EXYNOS9820) || \ IS_ENABLED(CONFIG_SOC_EXYNOS9830) || \ IS_ENABLED(CONFIG_SOC_EXYNOS2100)) #define SOUND_MODEL_SVOICE_OFFSET (0xAA800) #define SOUND_MODEL_GOOGLE_OFFSET (0xB2B00) #else #define SOUND_MODEL_SVOICE_OFFSET (0x2A800) #define SOUND_MODEL_SVOICE_OFFSET (0x32B00) #endif /* VTS firmware version information offset */ #if IS_ENABLED(CONFIG_SOC_EXYNOS2100) #define VTSFW_VERSION_OFFSET (0xac) #define DETLIB_VERSION_OFFSET (0xa8) #elif IS_ENABLED(CONFIG_SOC_EXYNOS9830) #define VTSFW_VERSION_OFFSET (0x9c) #define DETLIB_VERSION_OFFSET (0x98) #else #define VTSFW_VERSION_OFFSET (0x7c) #define DETLIB_VERSION_OFFSET (0x78) #endif #ifdef CONFIG_SOC_EXYNOS8895 #define PAD_RETENTION_VTS_OPTION (0x3148) #define VTS_CPU_CONFIGURATION (0x24E0) #define VTS_CPU_LOCAL_PWR_CFG (0x00000001) #define VTS_CPU_STATUS (0x24E4) #define VTS_CPU_STATUS_STATUS_MASK (0x00000001) #define VTS_CPU_STANDBY VTS_CPU_STATUS #define VTS_CPU_STANDBY_STANDBYWFI_MASK (0x10000000) #define VTS_CPU_OPTION (0x24E8) #define VTS_CPU_OPTION_USE_STANDBYWFI_MASK (0x00010000) #define VTS_CPU_RESET_OPTION VTS_CPU_OPTION #define VTS_CPU_RESET_OPTION_ENABLE_CPU_MASK (0x00008000) #elif defined(CONFIG_SOC_EXYNOS9810) #define PAD_RETENTION_VTS_OPTION (0x4AD8) #define VTS_CPU_CONFIGURATION (0x4AC4) #define VTS_CPU_LOCAL_PWR_CFG (0x00000001) #define VTS_CPU_STATUS (0x4AC8) #define VTS_CPU_STATUS_STATUS_MASK (0x00000001) #define VTS_CPU_STANDBY (0x3814) #define VTS_CPU_STANDBY_STANDBYWFI_MASK (0x10000000) #define VTS_CPU_OPTION (0x3818) #define VTS_CPU_OPTION_USE_STANDBYWFI_MASK (0x00010000) #define VTS_CPU_RESET_OPTION (0x4ACC) #define VTS_CPU_RESET_OPTION_ENABLE_CPU_MASK (0x10000000) #elif defined(CONFIG_SOC_EXYNOS9820) #define PAD_RETENTION_VTS_OPTION (0x2AA0) #define VTS_CPU_CONFIGURATION (0x2C80) #define VTS_CPU_LOCAL_PWR_CFG (0x00000001) #define VTS_CPU_IN (0x2CA4) #define VTS_CPU_IN_SLEEPING_MASK (0x00000002) #elif defined(CONFIG_SOC_EXYNOS9830) #define PAD_RETENTION_VTS_OPTION (0x2D20) /* VTS_OUT:PAD__RTO */ #define VTS_CPU_CONFIGURATION (0x3080) #define VTS_CPU_LOCAL_PWR_CFG (0x00000001) #define VTS_CPU_IN (0x30A4) #define VTS_CPU_IN_SLEEPING_MASK (0x00000002) #elif IS_ENABLED(CONFIG_SOC_EXYNOS2100) #define PAD_RETENTION_VTS_OPTION (0x32A0) // VTS_OUT : PAD__RTO #define VTS_CPU_CONFIGURATION (0x3640) #define VTS_CPU_LOCAL_PWR_CFG (0x00000001) #define VTS_CPU_IN (0x3664) #define VTS_CPU_IN_SLEEPING_MASK (0x00000002) #endif #endif /* __SND_SOC_VTS_DEP_SOC_V1_H */