415 lines
12 KiB
C
Executable file
415 lines
12 KiB
C
Executable file
/*
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* s2mps23-irq.c - Interrupt controller support for S2MPS23
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*
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* Copyright (C) 2020 Samsung Electronics Co.Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/err.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/of_irq.h>
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#include <linux/gpio.h>
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#include <linux/mfd/samsung/s2mps23.h>
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#include <linux/mfd/samsung/s2mps23-regulator.h>
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#define S2MPS23_IBI_CNT 4
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static u8 irq_reg[S2MPS23_IRQ_GROUP_NR] = {0};
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static const u8 s2mps23_mask_reg[] = {
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/* TODO: Need to check other INTMASK */
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[S2MPS23_PMIC_INT1] = S2MPS23_PMIC_REG_INT1M,
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[S2MPS23_PMIC_INT2] = S2MPS23_PMIC_REG_INT2M,
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[S2MPS23_PMIC_INT3] = S2MPS23_PMIC_REG_INT3M,
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[S2MPS23_PMIC_INT4] = S2MPS23_PMIC_REG_INT4M,
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[S2MPS23_PMIC_INT5] = S2MPS23_PMIC_REG_INT5M,
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[S2MPS23_PMIC_INT6] = S2MPS23_PMIC_REG_INT6M,
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[S2MPS23_PMIC_INT7] = S2MPS23_PMIC_REG_INT7M,
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};
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static struct i2c_client *get_i2c(struct s2mps23_dev *s2mps23,
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enum s2mps23_irq_source src)
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{
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switch (src) {
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case S2MPS23_PMIC_INT1 ... S2MPS23_PMIC_INT7:
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return s2mps23->pmic;
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default:
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return ERR_PTR(-EINVAL);
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}
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}
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struct s2mps23_irq_data {
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int mask;
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enum s2mps23_irq_source group;
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};
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#define DECLARE_IRQ(idx, _group, _mask) \
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[(idx)] = { .group = (_group), .mask = (_mask) }
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static const struct s2mps23_irq_data s2mps23_irqs[] = {
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_PWRONR_INT1, S2MPS23_PMIC_INT1, 1 << 1),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_PWRONF_INT1, S2MPS23_PMIC_INT1, 1 << 0),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_JIGONBF_INT1, S2MPS23_PMIC_INT1, 1 << 2),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_JIGONBR_INT1, S2MPS23_PMIC_INT1, 1 << 3),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_ACOKBF_INT1, S2MPS23_PMIC_INT1, 1 << 4),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_ACOKBR_INT1, S2MPS23_PMIC_INT1, 1 << 5),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_PWRON1S_INT1, S2MPS23_PMIC_INT1, 1 << 6),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_MRB_INT1, S2MPS23_PMIC_INT1, 1 << 7),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_RTC60S_INT2, S2MPS23_PMIC_INT2, 1 << 0),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_RTCA1_INT2, S2MPS23_PMIC_INT2, 1 << 1),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_RTCA0_INT2, S2MPS23_PMIC_INT2, 1 << 2),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_SMPL_INT2, S2MPS23_PMIC_INT2, 1 << 3),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_RTC1S_INT2, S2MPS23_PMIC_INT2, 1 << 4),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_WTSR_INT2, S2MPS23_PMIC_INT2, 1 << 5),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_WRSTB_INT2, S2MPS23_PMIC_INT2, 1 << 7),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_120C_INT3, S2MPS23_PMIC_INT3, 1 << 0),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_140C_INT3, S2MPS23_PMIC_INT3, 1 << 1),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_TSD_INT3, S2MPS23_PMIC_INT3, 1 << 2),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OVP_INT3, S2MPS23_PMIC_INT3, 1 << 3),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_TIMEOUT2_INT3, S2MPS23_PMIC_INT3, 1 << 5),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_TIMEOUT3_INT3, S2MPS23_PMIC_INT3, 1 << 6),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_SUB_SMPL_INT3, S2MPS23_PMIC_INT3, 1 << 7),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B1M_INT4, S2MPS23_PMIC_INT4, 1 << 0),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B2M_INT4, S2MPS23_PMIC_INT4, 1 << 1),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B3M_INT4, S2MPS23_PMIC_INT4, 1 << 2),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B4M_INT4, S2MPS23_PMIC_INT4, 1 << 3),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B5M_INT4, S2MPS23_PMIC_INT4, 1 << 4),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B6M_INT4, S2MPS23_PMIC_INT4, 1 << 5),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B7M_INT4, S2MPS23_PMIC_INT4, 1 << 6),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B8M_INT4, S2MPS23_PMIC_INT4, 1 << 7),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OCP_B9M_INT5, S2MPS23_PMIC_INT5, 1 << 0),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_PARITY_ERR0_INT5, S2MPS23_PMIC_INT5, 1 << 1),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_PARITY_ERR1_INT5, S2MPS23_PMIC_INT5, 1 << 2),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_PARITY_ERR2_INT5, S2MPS23_PMIC_INT5, 1 << 3),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_LDO28_SCP_INT5, S2MPS23_PMIC_INT5, 1 << 7),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B1M_INT6, S2MPS23_PMIC_INT6, 1 << 0),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B2M_INT6, S2MPS23_PMIC_INT6, 1 << 1),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B3M_INT6, S2MPS23_PMIC_INT6, 1 << 2),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B4M_INT6, S2MPS23_PMIC_INT6, 1 << 3),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B5M_INT6, S2MPS23_PMIC_INT6, 1 << 4),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B6M_INT6, S2MPS23_PMIC_INT6, 1 << 5),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B7M_INT6, S2MPS23_PMIC_INT6, 1 << 6),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B8M_INT6, S2MPS23_PMIC_INT6, 1 << 7),
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DECLARE_IRQ(S2MPS23_PMIC_IRQ_OI_B9M_INT7, S2MPS23_PMIC_INT7, 1 << 0),
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};
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static void s2mps23_irq_lock(struct irq_data *data)
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{
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struct s2mps23_dev *s2mps23 = irq_get_chip_data(data->irq);
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mutex_lock(&s2mps23->irqlock);
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}
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static void s2mps23_irq_sync_unlock(struct irq_data *data)
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{
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struct s2mps23_dev *s2mps23 = irq_get_chip_data(data->irq);
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int i;
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for (i = 0; i < S2MPS23_IRQ_GROUP_NR; i++) {
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u8 mask_reg = s2mps23_mask_reg[i];
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struct i2c_client *i2c = get_i2c(s2mps23, i);
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if (mask_reg == S2MPS23_REG_INVALID ||
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IS_ERR_OR_NULL(i2c))
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continue;
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s2mps23->irq_masks_cache[i] = s2mps23->irq_masks_cur[i];
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s2mps23_write_reg(i2c, s2mps23_mask_reg[i],
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s2mps23->irq_masks_cur[i]);
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}
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mutex_unlock(&s2mps23->irqlock);
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}
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static const inline struct s2mps23_irq_data *
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irq_to_s2mps23_irq(struct s2mps23_dev *s2mps23, int irq)
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{
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return &s2mps23_irqs[irq - s2mps23->irq_base];
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}
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static void s2mps23_irq_mask(struct irq_data *data)
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{
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struct s2mps23_dev *s2mps23 = irq_get_chip_data(data->irq);
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const struct s2mps23_irq_data *irq_data =
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irq_to_s2mps23_irq(s2mps23, data->irq);
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if (irq_data->group >= S2MPS23_IRQ_GROUP_NR)
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return;
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s2mps23->irq_masks_cur[irq_data->group] |= irq_data->mask;
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}
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static void s2mps23_irq_unmask(struct irq_data *data)
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{
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struct s2mps23_dev *s2mps23 = irq_get_chip_data(data->irq);
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const struct s2mps23_irq_data *irq_data =
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irq_to_s2mps23_irq(s2mps23, data->irq);
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if (irq_data->group >= S2MPS23_IRQ_GROUP_NR)
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return;
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s2mps23->irq_masks_cur[irq_data->group] &= ~irq_data->mask;
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}
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static struct irq_chip s2mps23_irq_chip = {
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.name = MFD_DEV_NAME,
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.irq_bus_lock = s2mps23_irq_lock,
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.irq_bus_sync_unlock = s2mps23_irq_sync_unlock,
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.irq_mask = s2mps23_irq_mask,
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.irq_unmask = s2mps23_irq_unmask,
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};
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static void s2mps23_report_irq(struct s2mps23_dev *s2mps23)
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{
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int i;
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/* Apply masking */
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for (i = 0; i < S2MPS23_IRQ_GROUP_NR; i++)
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irq_reg[i] &= ~s2mps23->irq_masks_cur[i];
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/* Report */
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for (i = 0; i < S2MPS23_IRQ_NR; i++)
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if (irq_reg[s2mps23_irqs[i].group] & s2mps23_irqs[i].mask)
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handle_nested_irq(s2mps23->irq_base + i);
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}
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static int s2mps23_power_key_detection(struct s2mps23_dev *s2mps23)
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{
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int ret, i;
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u8 val;
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/* Determine falling/rising edge for PWR_ON key */
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if ((irq_reg[S2MPS23_PMIC_INT1] & 0x3) == 0x3) {
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ret = s2mps23_read_reg(s2mps23->i2c,
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S2MPS23_PMIC_REG_STATUS1, &val);
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if (ret) {
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pr_err("%s: fail to read register\n", __func__);
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goto power_key_err;
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}
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irq_reg[S2MPS23_PMIC_INT1] &= 0xFC;
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if (val & S2MPS23_STATUS1_PWRON) {
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irq_reg[S2MPS23_PMIC_INT1] = S2MPS23_FALLING_EDGE;
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s2mps23_report_irq(s2mps23);
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/* clear irq */
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for (i = 0; i < S2MPS23_IRQ_GROUP_NR; i++)
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irq_reg[i] &= 0x00;
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irq_reg[S2MPS23_PMIC_INT1] = S2MPS23_RISING_EDGE;
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} else {
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irq_reg[S2MPS23_PMIC_INT1] = S2MPS23_RISING_EDGE;
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s2mps23_report_irq(s2mps23);
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/* clear irq */
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for (i = 0; i < S2MPS23_IRQ_GROUP_NR; i++)
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irq_reg[i] &= 0x00;
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irq_reg[S2MPS23_PMIC_INT1] = S2MPS23_FALLING_EDGE;
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}
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}
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return 0;
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power_key_err:
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return 1;
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}
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static void s2mps23_irq_work_func(struct work_struct *work)
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{
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pr_info("%s: master pmic interrupt(0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx, 0x%02hhx)\n",
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__func__, irq_reg[S2MPS23_PMIC_INT1], irq_reg[S2MPS23_PMIC_INT2], irq_reg[S2MPS23_PMIC_INT3],
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irq_reg[S2MPS23_PMIC_INT4], irq_reg[S2MPS23_PMIC_INT5], irq_reg[S2MPS23_PMIC_INT6],
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irq_reg[S2MPS23_PMIC_INT7]);
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}
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static void s2mps23_pending_clear(void)
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{
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void __iomem *sysreg_pending;
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u32 val;
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sysreg_pending = ioremap(SYSREG_VGPIO2AP + INTC0_IPRIO_PEND, SZ_32);
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val = readl(sysreg_pending);
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writel(val, sysreg_pending);
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}
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static irqreturn_t s2mps23_irq_thread(int irq, void *data)
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{
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struct s2mps23_dev *s2mps23 = data;
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u8 ibi_src[S2MPS23_IBI_CNT] = {0};
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u32 val;
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int i, ret;
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/* Clear interrupt pending bit */
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s2mps23_pending_clear();
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/* Read VGPIO_RX_MONITOR */
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val = readl(s2mps23->mem_base);
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for (i = 0; i < S2MPS23_IBI_CNT; i++) {
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ibi_src[i] = val & 0xFF;
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val = (val >> 8);
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}
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/* notify Master PMIC */
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if (ibi_src[0] & S2MPS23_IBI0_PMIC_M) {
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ret = s2mps23_bulk_read(s2mps23->pmic, S2MPS23_PMIC_REG_INT1,
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S2MPS23_NUM_IRQ_PMIC_REGS, &irq_reg[S2MPS23_PMIC_INT1]);
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if (ret) {
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pr_err("%s:%s Failed to read pmic interrupt: %d\n",
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MFD_DEV_NAME, __func__, ret);
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return IRQ_HANDLED;
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}
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queue_delayed_work(s2mps23->irq_wqueue, &s2mps23->irq_work, 0);
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/* Power-key W/A */
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ret = s2mps23_power_key_detection(s2mps23);
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if (ret)
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pr_err("%s: POWER-KEY detection error\n", __func__);
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/* Report IRQ */
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s2mps23_report_irq(s2mps23);
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}
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/* notify Slave PMIC */
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if (ibi_src[0] & S2MPS23_IBI0_PMIC_S) {
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pr_info("%s: IBI from slave pmic\n", __func__);
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s2mps24_call_notifier();
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}
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return IRQ_HANDLED;
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}
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static int s2mps23_set_wqueue(struct s2mps23_dev *s2mps23)
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{
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s2mps23->irq_wqueue = create_singlethread_workqueue("s2mps23-wqueue");
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if (!s2mps23->irq_wqueue) {
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pr_err("%s: fail to create workqueue\n", __func__);
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return 1;
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}
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INIT_DELAYED_WORK(&s2mps23->irq_work, s2mps23_irq_work_func);
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return 0;
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}
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static void s2mps23_set_vgpio_monitor(struct s2mps23_dev *s2mps23)
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{
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s2mps23->mem_base = ioremap(VGPIO_I3C_BASE + VGPIO_MONITOR_ADDR, SZ_32);
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if (s2mps23->mem_base == NULL)
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pr_info("%s: fail to allocate memory\n", __func__);
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}
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int s2mps23_irq_init(struct s2mps23_dev *s2mps23)
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{
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int i;
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int ret;
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u8 i2c_data;
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int cur_irq;
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if (!s2mps23->irq_base) {
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dev_err(s2mps23->dev, "No interrupt base specified.\n");
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return 0;
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}
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mutex_init(&s2mps23->irqlock);
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/* Set VGPIO monitor */
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s2mps23_set_vgpio_monitor(s2mps23);
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/* Set workqueue */
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s2mps23_set_wqueue(s2mps23);
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/* Mask individual interrupt sources */
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for (i = 0; i < S2MPS23_IRQ_GROUP_NR; i++) {
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struct i2c_client *i2c;
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s2mps23->irq_masks_cur[i] = 0xff;
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s2mps23->irq_masks_cache[i] = 0xff;
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i2c = get_i2c(s2mps23, i);
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if (IS_ERR_OR_NULL(i2c))
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continue;
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if (s2mps23_mask_reg[i] == S2MPS23_REG_INVALID)
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continue;
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s2mps23_write_reg(i2c, s2mps23_mask_reg[i], 0xff);
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}
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/* Register with genirq */
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for (i = 0; i < S2MPS23_IRQ_NR; i++) {
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cur_irq = i + s2mps23->irq_base;
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irq_set_chip_data(cur_irq, s2mps23);
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irq_set_chip_and_handler(cur_irq, &s2mps23_irq_chip,
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handle_level_irq);
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irq_set_nested_thread(cur_irq, 1);
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#if IS_ENABLED(CONFIG_ARM)
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set_irq_flags(cur_irq, IRQF_VALID);
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#else
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irq_set_noprobe(cur_irq);
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#endif
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}
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s2mps23_write_reg(s2mps23->i2c, S2MPS23_PMIC_REG_IRQM, 0xff);
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/* Unmask s2mps23 interrupt */
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ret = s2mps23_read_reg(s2mps23->i2c, S2MPS23_PMIC_REG_IRQM,
|
|
&i2c_data);
|
|
if (ret) {
|
|
pr_err("%s:%s fail to read intsrc mask reg\n",
|
|
MFD_DEV_NAME, __func__);
|
|
return ret;
|
|
}
|
|
|
|
i2c_data &= ~(S2MPS23_PMIC_PM_IRQM); /* Unmask pmic interrupt */
|
|
s2mps23_write_reg(s2mps23->i2c, S2MPS23_PMIC_REG_IRQM, i2c_data);
|
|
|
|
pr_info("%s:%s S2MPS23_PMIC_REG_IRQM=0x%02hhx\n",
|
|
MFD_DEV_NAME, __func__, i2c_data);
|
|
|
|
s2mps23->irq = irq_of_parse_and_map(s2mps23->dev->of_node, 0);
|
|
ret = request_threaded_irq(s2mps23->irq, NULL, s2mps23_irq_thread,
|
|
IRQF_ONESHOT, "s2mps23-irq", s2mps23);
|
|
|
|
if (ret) {
|
|
dev_err(s2mps23->dev, "Failed to request IRQ %d: %d\n",
|
|
s2mps23->irq, ret);
|
|
destroy_workqueue(s2mps23->irq_wqueue);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(s2mps23_irq_init);
|
|
|
|
void s2mps23_irq_exit(struct s2mps23_dev *s2mps23)
|
|
{
|
|
if (s2mps23->irq)
|
|
free_irq(s2mps23->irq, s2mps23);
|
|
|
|
iounmap(s2mps23->mem_base);
|
|
|
|
cancel_delayed_work_sync(&s2mps23->irq_work);
|
|
destroy_workqueue(s2mps23->irq_wqueue);
|
|
}
|
|
EXPORT_SYMBOL_GPL(s2mps23_irq_exit);
|