kernel_samsung_a53x/arch/x86/kernel/cpu
Paolo Bonzini eee06f31ee x86/cpu/intel: Detect TME keyid bits before setting MTRR mask registers
commit 6890cb1ace350b4386c8aee1343dc3b3ddd214da upstream.

MKTME repurposes the high bit of physical address to key id for encryption
key and, even though MAXPHYADDR in CPUID[0x80000008] remains the same,
the valid bits in the MTRR mask register are based on the reduced number
of physical address bits.

detect_tme() in arch/x86/kernel/cpu/intel.c detects TME and subtracts
it from the total usable physical bits, but it is called too late.
Move the call to early_init_intel() so that it is called in setup_arch(),
before MTRRs are setup.

This fixes boot on TDX-enabled systems, which until now only worked with
"disable_mtrr_cleanup".  Without the patch, the values written to the
MTRRs mask registers were 52-bit wide (e.g. 0x000fffff_80000800) and
the writes failed; with the patch, the values are 46-bit wide, which
matches the reduced MAXPHYADDR that is shown in /proc/cpuinfo.

Reported-by: Zixi Chen <zixchen@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc:stable@vger.kernel.org
Link: https://lore.kernel.org/all/20240131230902.1867092-3-pbonzini%40redhat.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-18 23:18:30 +01:00
..
mce x86/mce: Mark fatal MCE's page as poison to avoid panic in the kdump kernel 2024-11-18 12:13:08 +01:00
microcode Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mtrr Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
resctrl Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
acrn.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
amd.c x86/CPU/AMD: Check vendor in the AMD microcode callback 2024-11-18 12:11:46 +01:00
aperfmperf.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
bugs.c x86/alternative: Make custom return thunk unconditional 2024-11-18 22:25:38 +01:00
cacheinfo.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
centaur.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
common.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
cpu.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
cpuid-deps.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
cyrix.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
feat_ctl.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
hygon.c x86/cpu/hygon: Fix the CPU topology evaluation for real 2024-11-18 11:43:21 +01:00
hypervisor.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
intel.c x86/cpu/intel: Detect TME keyid bits before setting MTRR mask registers 2024-11-18 23:18:30 +01:00
intel_epb.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
intel_pconfig.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Makefile Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
match.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mkcapflags.sh Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mshyperv.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
perfctr-watchdog.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
powerflags.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
proc.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
rdrand.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
scattered.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
topology.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
transmeta.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
tsx.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
umc.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
umwait.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
vmware.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
zhaoxin.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00