kernel_samsung_a53x/arch/x86/events/intel
Marco Cavenati e17436440f perf/x86/intel/pt: Fix topa_entry base length
commit 5638bd722a44bbe97c1a7b3fae5b9efddb3e70ff upstream.

topa_entry->base needs to store a pfn.  It obviously needs to be
large enough to store the largest possible x86 pfn which is
MAXPHYADDR-PAGE_SIZE (52-12).  So it is 4 bits too small.

Increase the size of topa_entry->base from 36 bits to 40 bits.

Note, systems where physical addresses can be 256TiB or more are affected.

[ Adrian: Amend commit message as suggested by Dave Hansen ]

Fixes: 52ca9ced3f70 ("perf/x86/intel/pt: Add Intel PT PMU driver")
Signed-off-by: Marco Cavenati <cavenati.marco@gmail.com>
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240624201101.60186-2-adrian.hunter@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-23 23:20:15 +01:00
..
bts.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
core.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
cstate.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
ds.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
knc.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
lbr.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Makefile Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
p4.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
p6.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pt.c perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation 2024-11-23 23:20:07 +01:00
pt.h perf/x86/intel/pt: Fix topa_entry base length 2024-11-23 23:20:15 +01:00
uncore.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
uncore.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
uncore_nhmex.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
uncore_snb.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
uncore_snbep.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00