kernel_samsung_a53x/arch
Adrian Hunter 499332775e x86/insn: Fix PUSH instruction in x86 instruction decoder opcode map
[ Upstream commit 59162e0c11d7257cde15f907d19fefe26da66692 ]

The x86 instruction decoder is used not only for decoding kernel
instructions. It is also used by perf uprobes (user space probes) and by
perf tools Intel Processor Trace decoding. Consequently, it needs to
support instructions executed by user space also.

Opcode 0x68 PUSH instruction is currently defined as 64-bit operand size
only i.e. (d64). That was based on Intel SDM Opcode Map. However that is
contradicted by the Instruction Set Reference section for PUSH in the
same manual.

Remove 64-bit operand size only annotation from opcode 0x68 PUSH
instruction.

Example:

  $ cat pushw.s
  .global  _start
  .text
  _start:
          pushw   $0x1234
          mov     $0x1,%eax   # system call number (sys_exit)
          int     $0x80
  $ as -o pushw.o pushw.s
  $ ld -s -o pushw pushw.o
  $ objdump -d pushw | tail -4
  0000000000401000 <.text>:
    401000:       66 68 34 12             pushw  $0x1234
    401004:       b8 01 00 00 00          mov    $0x1,%eax
    401009:       cd 80                   int    $0x80
  $ perf record -e intel_pt//u ./pushw
  [ perf record: Woken up 1 times to write data ]
  [ perf record: Captured and wrote 0.014 MB perf.data ]

 Before:

  $ perf script --insn-trace=disasm
  Warning:
  1 instruction trace errors
           pushw   10349 [000] 10586.869237014:            401000 [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           pushw $0x1234
           pushw   10349 [000] 10586.869237014:            401006 [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           addb %al, (%rax)
           pushw   10349 [000] 10586.869237014:            401008 [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           addb %cl, %ch
           pushw   10349 [000] 10586.869237014:            40100a [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           addb $0x2e, (%rax)
   instruction trace error type 1 time 10586.869237224 cpu 0 pid 10349 tid 10349 ip 0x40100d code 6: Trace doesn't match instruction

 After:

  $ perf script --insn-trace=disasm
             pushw   10349 [000] 10586.869237014:            401000 [unknown] (./pushw)           pushw $0x1234
             pushw   10349 [000] 10586.869237014:            401004 [unknown] (./pushw)           movl $1, %eax

Fixes: eb13296cfaf6 ("x86: Instruction decoder API")
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20240502105853.5338-3-adrian.hunter@intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-19 12:26:59 +01:00
..
alpha Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
arc ARC: [plat-hsdk]: Remove misplaced interrupt-cells property 2024-11-19 11:32:36 +01:00
arm arm: dts: marvell: Fix maxium->maxim typo in brownstone dts 2024-11-19 09:22:14 +01:00
arm64 KVM: arm64: vgic-v2: Check for non-NULL vCPU in vgic_v2_parse_attr() 2024-11-19 11:32:43 +01:00
c6x Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
csky Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
h8300 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
hexagon hexagon: vmlinux.lds.S: handle attributes section 2024-11-19 09:22:41 +01:00
ia64 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
m68k m68k: mac: Fix reboot hang on Mac IIci 2024-11-19 12:26:56 +01:00
microblaze Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mips MIPS: scall: Save thread_info.syscall unconditionally on entry 2024-11-19 11:32:44 +01:00
nds32 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
nios2 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
openrisc Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
parisc parisc: add missing export of __cmpxchg_u8() 2024-11-19 12:26:52 +01:00
powerpc powerpc/fsl-soc: hide unused const variable 2024-11-19 12:26:57 +01:00
riscv riscv: Disable STACKPROTECTOR_PER_TASK if GCC_PLUGIN_RANDSTRUCT is enabled 2024-11-19 11:32:40 +01:00
s390 s390/vdso: Add CFI for RA register to asm macro vdso_func 2024-11-19 11:32:42 +01:00
sh Revert "sh: Handle calling csum_partial with misaligned data" 2024-11-19 12:26:56 +01:00
sparc sparc: vDSO: fix return value of __setup handler 2024-11-19 09:22:15 +01:00
um um: allow not setting extra rpaths in the linux binary 2024-11-18 23:19:35 +01:00
x86 x86/insn: Fix PUSH instruction in x86 instruction decoder opcode map 2024-11-19 12:26:59 +01:00
xtensa Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Kconfig cpu: Re-enable CPU mitigations by default for !X86 architectures 2024-11-19 11:32:38 +01:00