1121 lines
31 KiB
Text
Executable file
1121 lines
31 KiB
Text
Executable file
/dts-v1/;
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/ {
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compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
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interrupt-parent = <0x01>;
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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model = "HiKey970";
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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cpus {
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#address-cells = <0x02>;
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#size-cells = <0x00>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <0x02>;
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};
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core1 {
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cpu = <0x03>;
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};
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core2 {
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cpu = <0x04>;
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};
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core3 {
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cpu = <0x05>;
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};
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};
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cluster1 {
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core0 {
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cpu = <0x06>;
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};
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core1 {
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cpu = <0x07>;
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};
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core2 {
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cpu = <0x08>;
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};
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core3 {
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cpu = <0x09>;
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};
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};
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};
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cpu@0 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x00>;
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enable-method = "psci";
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phandle = <0x02>;
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};
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cpu@1 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x01>;
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enable-method = "psci";
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phandle = <0x03>;
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};
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cpu@2 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x02>;
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enable-method = "psci";
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phandle = <0x04>;
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};
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cpu@3 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x03>;
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enable-method = "psci";
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phandle = <0x05>;
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};
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cpu@100 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x100>;
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enable-method = "psci";
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phandle = <0x06>;
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};
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cpu@101 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x101>;
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enable-method = "psci";
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phandle = <0x07>;
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};
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cpu@102 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x102>;
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enable-method = "psci";
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phandle = <0x08>;
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};
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cpu@103 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x103>;
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enable-method = "psci";
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phandle = <0x09>;
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};
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};
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interrupt-controller@e82b0000 {
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compatible = "arm,gic-400";
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reg = <0x00 0xe82b1000 0x00 0x1000 0x00 0xe82b2000 0x00 0x2000 0x00 0xe82b4000 0x00 0x2000 0x00 0xe82b6000 0x00 0x2000>;
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#interrupt-cells = <0x03>;
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#address-cells = <0x00>;
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interrupts = <0x01 0x09 0xff04>;
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interrupt-controller;
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phandle = <0x01>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <0x01>;
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interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
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clock-frequency = <0x1d4c00>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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ranges;
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crg_ctrl@fff35000 {
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compatible = "hisilicon,hi3670-crgctrl", "syscon";
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reg = <0x00 0xfff35000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x0a>;
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};
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crg_rst_controller {
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compatible = "hisilicon,hi3670-reset", "hisilicon,hi3660-reset";
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#reset-cells = <0x02>;
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hisi,rst-syscon = <0x0a>;
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phandle = <0x1a>;
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};
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pctrl@e8a09000 {
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compatible = "hisilicon,hi3670-pctrl", "syscon";
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reg = <0x00 0xe8a09000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x28>;
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};
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crg_ctrl@fff34000 {
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compatible = "hisilicon,hi3670-pmuctrl", "syscon";
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reg = <0x00 0xfff34000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x29>;
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};
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sctrl@fff0a000 {
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compatible = "hisilicon,hi3670-sctrl", "syscon";
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reg = <0x00 0xfff0a000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x18>;
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};
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iomcu@ffd7e000 {
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compatible = "hisilicon,hi3670-iomcu", "syscon";
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reg = <0x00 0xffd7e000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x2a>;
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};
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media1_crgctrl@e87ff000 {
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compatible = "hisilicon,hi3670-media1-crg", "syscon";
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reg = <0x00 0xe87ff000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x2b>;
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};
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media2_crgctrl@e8900000 {
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compatible = "hisilicon,hi3670-media2-crg", "syscon";
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reg = <0x00 0xe8900000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x2c>;
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};
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serial@fdf02000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xfdf02000 0x00 0x1000>;
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interrupts = <0x00 0x4a 0x04>;
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clocks = <0x0a 0xb2 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-0 = <0x0b 0x0c>;
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status = "okay";
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label = "HS-UART0";
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phandle = <0x2d>;
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};
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serial@fdf00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xfdf00000 0x00 0x1000>;
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interrupts = <0x00 0x4b 0x04>;
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clocks = <0x0a 0xaa 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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status = "disabled";
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phandle = <0x2e>;
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};
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serial@fdf03000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xfdf03000 0x00 0x1000>;
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interrupts = <0x00 0x4c 0x04>;
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clocks = <0x0a 0xae 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-0 = <0x0d 0x0e>;
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status = "okay";
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label = "LS-UART0";
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phandle = <0x2f>;
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};
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serial@ffd74000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xffd74000 0x00 0x1000>;
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interrupts = <0x00 0x72 0x04>;
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clocks = <0x0a 0x05 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-0 = <0x0f 0x10>;
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status = "disabled";
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phandle = <0x30>;
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};
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serial@fdf01000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xfdf01000 0x00 0x1000>;
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interrupts = <0x00 0x4d 0x04>;
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clocks = <0x0a 0xab 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-0 = <0x11 0x12>;
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status = "disabled";
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phandle = <0x31>;
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};
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serial@fdf05000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xfdf05000 0x00 0x1000>;
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interrupts = <0x00 0x4e 0x04>;
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clocks = <0x0a 0xaf 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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status = "disabled";
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phandle = <0x32>;
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};
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serial@fff32000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x00 0xfff32000 0x00 0x1000>;
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interrupts = <0x00 0x4f 0x04>;
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clocks = <0x0a 0x0f 0x0a 0x0d>;
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clock-names = "uartclk", "apb_pclk";
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pinctrl-names = "default";
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pinctrl-0 = <0x13 0x14>;
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status = "okay";
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label = "LS-UART1";
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phandle = <0x33>;
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};
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gpio@e8a0b000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a0b000 0x00 0x1000>;
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interrupts = <0x00 0x54 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x01 0x00 0x01 0x15 0x03 0x01 0x05>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x7d>;
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clock-names = "apb_pclk";
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gpio-line-names = "", "TP901", "", "GPIO_003_USB_HUB_RESET_N", "NC", "[AP_GPS_REF_CLK]", "[I2C3_SCL]", "[I2C3_SDA]";
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phandle = <0x34>;
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};
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gpio@e8a0c000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a0c000 0x00 0x1000>;
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interrupts = <0x00 0x55 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x7e>;
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clock-names = "apb_pclk";
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gpio-line-names = "[UART0_CTS]", "[UART0_RTS]", "[UART0_TXD]", "[UART0_RXD]", "[USER_LED5]", "GPIO-I", "[USER_LED3]", "[USER_LED4]";
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phandle = <0x35>;
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};
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gpio@e8a0d000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a0d000 0x00 0x1000>;
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interrupts = <0x00 0x56 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x01 0x06 0x07>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x7f>;
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clock-names = "apb_pclk";
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gpio-line-names = "GPIO-G", "[CSI0_MCLK]", "[CSI1_MCLK]", "GPIO_019_BT_ACTIVE", "[I2C2_SCL]", "[I2C2_SDA]", "[I2C3_SCL]", "[I2C3_SDA]";
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phandle = <0x36>;
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};
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gpio@e8a0e000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a0e000 0x00 0x1000>;
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interrupts = <0x00 0x57 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x0d 0x04 0x15 0x07 0x11 0x01>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x80>;
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clock-names = "apb_pclk";
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gpio-line-names = "GPIO_024_WIFI_ACTIVE", "GPIO_025_PERST_M.2", "[I2C4_SCL]", "[I2C4_SDA]", "NC", "GPIO-H", "[USER_LED1]", "GPIO-L";
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phandle = <0x37>;
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};
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gpio@e8a0f000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a0f000 0x00 0x1000>;
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interrupts = <0x00 0x58 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x12 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x81>;
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clock-names = "apb_pclk";
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gpio-line-names = "GPIO-K", "GPIO_033_PMU1_EN", "GPIO_034_USBSW_SEL", "[SD_DAT1]", "[SD_DAT2]", "[UART1_RXD]", "[UART1_TXD]", "[SOC_GPS_UART3_CTS_N]";
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phandle = <0x38>;
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};
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gpio@e8a10000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a10000 0x00 0x1000>;
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interrupts = <0x00 0x59 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x1a 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x82>;
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clock-names = "apb_pclk";
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gpio-line-names = "[SOC_GPS_UART3_RTS_N]", "[SOC_GPS_UART3_RXD]", "[SOC_GPS_UART3_TXD]", "[SOC_BT_UART4_CTS_N]", "[SOC_BT_UART4_RTS_N]", "[SOC_BT_UART4_RXD]", "[SOC_BT_UART4_TXD]", "NC";
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phandle = <0x39>;
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};
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gpio@e8a11000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a11000 0x00 0x1000>;
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interrupts = <0x00 0x5a 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x01 0x22 0x07>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x83>;
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clock-names = "apb_pclk";
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gpio-line-names = "NC", "GPIO_049_USER_LED6", "GPIO_050_CAN_RST", "GPIO_051_WIFI_EN", "GPIO-D", "GPIO-J", "GPIO_054_BT_EN", "[GPIO_055_SEL]";
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phandle = <0x27>;
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};
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gpio@e8a12000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a12000 0x00 0x1000>;
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interrupts = <0x00 0x5b 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x29 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x84>;
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clock-names = "apb_pclk";
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gpio-line-names = "[PCIE_PERST_L]", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
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phandle = <0x3a>;
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};
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gpio@e8a13000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a13000 0x00 0x1000>;
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interrupts = <0x00 0x5c 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x31 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x85>;
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clock-names = "apb_pclk";
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gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
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phandle = <0x3b>;
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};
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gpio@e8a14000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a14000 0x00 0x1000>;
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interrupts = <0x00 0x5d 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x39 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x86>;
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clock-names = "apb_pclk";
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gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
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phandle = <0x3c>;
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};
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gpio@e8a15000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a15000 0x00 0x1000>;
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interrupts = <0x00 0x5e 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x41 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x87>;
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clock-names = "apb_pclk";
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gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
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phandle = <0x3d>;
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};
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gpio@e8a16000 {
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compatible = "arm,pl061", "arm,primecell";
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reg = <0x00 0xe8a16000 0x00 0x1000>;
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interrupts = <0x00 0x5f 0x04>;
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gpio-controller;
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#gpio-cells = <0x02>;
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gpio-ranges = <0x15 0x00 0x49 0x08>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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clocks = <0x0a 0x88>;
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clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
|
|
phandle = <0x3e>;
|
|
};
|
|
|
|
gpio@e8a17000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a17000 0x00 0x1000>;
|
|
interrupts = <0x00 0x60 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x15 0x00 0x51 0x01>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x89>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = [4e 43 00 00 00 00 00 00 00 00];
|
|
phandle = <0x3f>;
|
|
};
|
|
|
|
gpio@e8a18000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a18000 0x00 0x1000>;
|
|
interrupts = <0x00 0x61 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x8a>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0x40>;
|
|
};
|
|
|
|
gpio@e8a19000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a19000 0x00 0x1000>;
|
|
interrupts = <0x00 0x62 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x8b>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0x41>;
|
|
};
|
|
|
|
gpio@e8a1a000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1a000 0x00 0x1000>;
|
|
interrupts = <0x00 0x63 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x8c>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0x42>;
|
|
};
|
|
|
|
gpio@e8a1b000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1b000 0x00 0x1000>;
|
|
interrupts = <0x00 0x64 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x16 0x00 0x00 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x8d>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[WL_SDIO_CLK]", "[WL_SDIO_CMD]", "[WL_SDIO_DATA0]", "[WL_SDIO_DATA1]", "[WL_SDIO_DATA2]", "[WL_SDIO_DATA3]", "[ETH_ISOLATE]", "NC";
|
|
phandle = <0x43>;
|
|
};
|
|
|
|
gpio@e8a1c000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1c000 0x00 0x1000>;
|
|
interrupts = <0x00 0x65 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x16 0x00 0x08 0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x8e>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[MINI1CLK_EN]", "NC", "", "", "", "", "", "";
|
|
phandle = <0x44>;
|
|
};
|
|
|
|
gpio@fff28000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff28000 0x00 0x1000>;
|
|
interrupts = <0x00 0x66 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x04 0x2a 0x04>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x12>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SPI1_SCLK]", "[SPI1_DIN]", "[SPI1_DOUT]", "[SPI1_CS]", "[POWER_INT_N]", "[CDMA_GPS_SYNC]", "GPIO_150_PEX_INTA", "GPIO_151_CAN_INT";
|
|
phandle = <0x45>;
|
|
};
|
|
|
|
gpio@fff29000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff29000 0x00 0x1000>;
|
|
interrupts = <0x00 0x67 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x00 0x3d 0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x13>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0x46>;
|
|
};
|
|
|
|
gpio@e8a1f000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1f000 0x00 0x1000>;
|
|
interrupts = <0x00 0x68 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x19 0x00 0x00 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x8f>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SD_CLK]", "[SD_CMD]", "[SD_DATA0]", "[SD_DATA1]", "[SD_DATA2]", "[SD_DATA3]", "GPIO_166_ETHCLK_EN", "GPIO_167_USER_LED2";
|
|
phandle = <0x47>;
|
|
};
|
|
|
|
gpio@e8a20000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a20000 0x00 0x1000>;
|
|
interrupts = <0x00 0x69 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x19 0x00 0x08 0x04>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x0a 0x90>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "GPIO_168_GPS_EN", "GPIO-C", "GPIO-E", "GPIO-B", "", "", "", "", "";
|
|
phandle = <0x48>;
|
|
};
|
|
|
|
gpio@fff0b000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0b000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6a 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x02 0x00 0x06>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x18>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[PMU_PWR_HOLD]", "GPIO_177_WL_WAKEUP_AP", "[JTAG_TCK]", "[JTAG_TMS]", "[JTAG_TDI]", "[JTAG_TMS]", "GPIO_182_FATAL_ERR", "NC";
|
|
phandle = <0x25>;
|
|
};
|
|
|
|
gpio@fff0c000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0c000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6b 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x00 0x06 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x19>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "GPIO_184_JTAG_SEL", "GPIO-F", "[I2C0_SCL]", "[I2C0_SDA]", "[GPIO_188_I2C1_SCL]", "[GPIO_189_I2C1_SDA]", "[I2C1_SCL]", "[I2C2_SDA]";
|
|
phandle = <0x49>;
|
|
};
|
|
|
|
gpio@fff0d000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0d000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6c 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x00 0x0e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x1a>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SD_LED]", "NC", "[PCM_DI]", "[PCM_DO]", "[PCM_CLK]", "[PCM_FS]", "", "[I2S2_DO]";
|
|
phandle = <0x4a>;
|
|
};
|
|
|
|
gpio@fff0e000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0e000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6d 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x00 0x16 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x1b>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[I2S2_XCLK]", "[I2S2_XFS]", "GPIO_202_PERST_ETH", "GPIO_203_PWRON_DET", "GPIO_204_PMU1_IRQ_N", "GPIO_205_SD_DET", "GPIO_206_GPS_MOTION_INT", "GPIO_207_HDMI_SEL";
|
|
phandle = <0x1b>;
|
|
};
|
|
|
|
gpio@fff0f000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0f000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6e 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x00 0x1e 0x01>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x1c>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "GPIO-A", "GPIO_209_VBUS_TYPEC", "NC", "NC", "NC", "[SPI0_SCLK]", "[SPI0_DIN]", "[SPI0_DOUT]";
|
|
phandle = <0x4b>;
|
|
};
|
|
|
|
gpio@fff10000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff10000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6f 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x04 0x1f 0x04>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x1d>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SPI0_CS]", "GPIO_217_HDMI_PD", "GPIO_218_GPS_WAKEUP_AP", "GPIO_219_M.2CLK_EN", "GPIO_220_PERST_MINI", "GPIO_221_CC_INT", "[PCIE_CLKREQ_L]", "NC";
|
|
phandle = <0x4c>;
|
|
};
|
|
|
|
gpio@fff1d000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff1d000 0x00 0x1000>;
|
|
interrupts = <0x00 0x8d 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x17 0x01 0x23 0x07>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x18 0x1e>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[PMU0_INT]", "[SPMI_DATA]", "[SPMI_CLK]", "[CAN_SPI_CLK]", "[CAN_SPI_DI]", "[CAN_SPI_DO]", "[CAN_SPI_CS]", "GPIO_231_HDMI_INT";
|
|
phandle = <0x4d>;
|
|
};
|
|
|
|
ufs@ff3c0000 {
|
|
compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
|
|
reg = <0x00 0xff3c0000 0x00 0x1000 0x00 0xff3e0000 0x00 0x1000>;
|
|
interrupt-parent = <0x01>;
|
|
interrupts = <0x00 0x116 0x04>;
|
|
clocks = <0x0a 0x17 0x0a 0x16>;
|
|
clock-names = "ref_clk", "phy_clk";
|
|
freq-table-hz = <0x00 0x00 0x00 0x00>;
|
|
resets = <0x1a 0x84 0x0c>;
|
|
reset-names = "rst";
|
|
phandle = <0x4e>;
|
|
};
|
|
|
|
dwmmc1@ff37f000 {
|
|
compatible = "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc";
|
|
reg = <0x00 0xff37f000 0x00 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
interrupts = <0x00 0x8b 0x04>;
|
|
clocks = <0x0a 0x9f 0x0a 0xa0>;
|
|
clock-names = "ciu", "biu";
|
|
clock-frequency = <0x30d400>;
|
|
resets = <0x1a 0x94 0x12>;
|
|
reset-names = "reset";
|
|
hisilicon,peripheral-syscon = <0x18>;
|
|
card-detect-delay = <0xc8>;
|
|
status = "okay";
|
|
bus-width = <0x04>;
|
|
sd-uhs-sdr12;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
cd-inverted;
|
|
cd-gpios = <0x1b 0x05 0x00>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x1c 0x1d 0x1e>;
|
|
vmmc-supply = <0x1f>;
|
|
vqmmc-supply = <0x20>;
|
|
phandle = <0x4f>;
|
|
};
|
|
|
|
dwmmc2@fc183000 {
|
|
compatible = "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc";
|
|
reg = <0x00 0xfc183000 0x00 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
interrupts = <0x00 0x8c 0x04>;
|
|
clocks = <0x0a 0xa1 0x0a 0x95>;
|
|
clock-names = "ciu", "biu";
|
|
clock-frequency = <0x30d400>;
|
|
resets = <0x1a 0x94 0x14>;
|
|
reset-names = "reset";
|
|
card-detect-delay = <0xc8>;
|
|
status = "okay";
|
|
bus-width = <0x04>;
|
|
non-removable;
|
|
broken-cd;
|
|
cap-power-off-card;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x21 0x22 0x23>;
|
|
vmmc-supply = <0x24>;
|
|
phandle = <0x50>;
|
|
|
|
wlcore@2 {
|
|
compatible = "ti,wl1837";
|
|
reg = <0x02>;
|
|
interrupt-parent = <0x25>;
|
|
interrupts = <0x01 0x01>;
|
|
phandle = <0x51>;
|
|
};
|
|
};
|
|
|
|
gpio-range {
|
|
#pinctrl-single,gpio-range-cells = <0x03>;
|
|
phandle = <0x26>;
|
|
};
|
|
|
|
pinmux@e896c000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xe896c000 0x00 0x72c>;
|
|
#pinctrl-cells = <0x01>;
|
|
#gpio-range-cells = <0x03>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x26 0x00 0x52 0x00>;
|
|
phandle = <0x15>;
|
|
|
|
uart0_pmx_func {
|
|
pinctrl-single,pins = <0x54 0x02 0x58 0x02>;
|
|
phandle = <0x0b>;
|
|
};
|
|
|
|
uart2_pmx_func {
|
|
pinctrl-single,pins = <0x700 0x02 0x704 0x02 0x708 0x02 0x70c 0x02>;
|
|
phandle = <0x0d>;
|
|
};
|
|
|
|
uart3_pmx_func {
|
|
pinctrl-single,pins = <0x64 0x01 0x68 0x01 0x6c 0x01 0x70 0x01>;
|
|
phandle = <0x0f>;
|
|
};
|
|
|
|
uart4_pmx_func {
|
|
pinctrl-single,pins = <0x74 0x01 0x78 0x01 0x7c 0x01 0x80 0x01>;
|
|
phandle = <0x11>;
|
|
};
|
|
|
|
uart6_pmx_func {
|
|
pinctrl-single,pins = <0x5c 0x01 0x60 0x01>;
|
|
phandle = <0x13>;
|
|
};
|
|
};
|
|
|
|
pinmux@e896c800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xe896c800 0x00 0x72c>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0x52>;
|
|
|
|
uart0_cfg_func {
|
|
pinctrl-single,pins = <0x58 0x00 0x5c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0x0c>;
|
|
};
|
|
|
|
uart2_cfg_func {
|
|
pinctrl-single,pins = <0x700 0x00 0x704 0x00 0x708 0x00 0x70c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0x0e>;
|
|
};
|
|
|
|
uart3_cfg_func {
|
|
pinctrl-single,pins = <0x68 0x00 0x6c 0x00 0x70 0x00 0x74 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0x10>;
|
|
};
|
|
|
|
uart4_cfg_func {
|
|
pinctrl-single,pins = <0x78 0x00 0x7c 0x00 0x80 0x00 0x84 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0x12>;
|
|
};
|
|
|
|
uart6_cfg_func {
|
|
pinctrl-single,pins = <0x60 0x00 0x64 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x14>;
|
|
};
|
|
};
|
|
|
|
pinmux@fc182000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xfc182000 0x00 0x28>;
|
|
#gpio-range-cells = <0x03>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x26 0x00 0x0a 0x00>;
|
|
phandle = <0x16>;
|
|
|
|
sdio_pmx_func {
|
|
pinctrl-single,pins = <0x00 0x01 0x04 0x01 0x08 0x01 0x0c 0x01 0x10 0x01 0x14 0x01>;
|
|
phandle = <0x21>;
|
|
};
|
|
};
|
|
|
|
pinmux@fc182800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xfc182800 0x00 0x28>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0x53>;
|
|
|
|
sdio_clk_cfg_func {
|
|
pinctrl-single,pins = <0x00 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0xf0 0xf0>;
|
|
phandle = <0x22>;
|
|
};
|
|
|
|
sdio_cfg_func {
|
|
pinctrl-single,pins = <0x04 0x00 0x08 0x00 0x0c 0x00 0x10 0x00 0x14 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x80 0xf0>;
|
|
phandle = <0x23>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff37e000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xff37e000 0x00 0x30>;
|
|
#gpio-range-cells = <0x03>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x26 0x00 0x0c 0x00>;
|
|
phandle = <0x19>;
|
|
|
|
sd_pmx_func {
|
|
pinctrl-single,pins = <0x00 0x01 0x04 0x01 0x08 0x01 0x0c 0x01 0x10 0x01 0x14 0x01>;
|
|
phandle = <0x1c>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff37e800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xff37e800 0x00 0x30>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0x54>;
|
|
|
|
sd_clk_cfg_func {
|
|
pinctrl-single,pins = <0x00 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0xf0 0xf0>;
|
|
phandle = <0x1d>;
|
|
};
|
|
|
|
sd_cfg_func {
|
|
pinctrl-single,pins = <0x04 0x00 0x08 0x00 0x0c 0x00 0x10 0x00 0x14 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x80 0xf0>;
|
|
phandle = <0x1e>;
|
|
};
|
|
};
|
|
|
|
pinmux@fff11000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xfff11000 0x00 0x73c>;
|
|
#gpio-range-cells = <0x03>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x26 0x00 0x2e 0x00>;
|
|
phandle = <0x17>;
|
|
};
|
|
|
|
pinmux@fff11800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xfff11800 0x00 0x73c>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0x55>;
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
mshc1 = "/soc/dwmmc1@ff37f000";
|
|
mshc2 = "/soc/dwmmc2@fc183000";
|
|
serial0 = "/soc/serial@fdf02000";
|
|
serial1 = "/soc/serial@fdf00000";
|
|
serial2 = "/soc/serial@fdf03000";
|
|
serial3 = "/soc/serial@ffd74000";
|
|
serial4 = "/soc/serial@fdf01000";
|
|
serial5 = "/soc/serial@fdf05000";
|
|
serial6 = "/soc/serial@fff32000";
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial6:115200n8";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x00 0x00 0x00 0x00>;
|
|
};
|
|
|
|
regulator-1v8 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-1.8V";
|
|
regulator-min-microvolt = <0x1b7740>;
|
|
regulator-max-microvolt = <0x1b7740>;
|
|
regulator-always-on;
|
|
phandle = <0x20>;
|
|
};
|
|
|
|
regulator-3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-3.3V";
|
|
regulator-min-microvolt = <0x325aa0>;
|
|
regulator-max-microvolt = <0x325aa0>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
phandle = <0x1f>;
|
|
};
|
|
|
|
wlan-en-1-8v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "wlan-en-regulator";
|
|
regulator-min-microvolt = <0x1b7740>;
|
|
regulator-max-microvolt = <0x1b7740>;
|
|
gpio = <0x27 0x03 0x00>;
|
|
startup-delay-us = <0x11170>;
|
|
enable-active-high;
|
|
phandle = <0x24>;
|
|
};
|
|
|
|
__symbols__ {
|
|
cpu0 = "/cpus/cpu@0";
|
|
cpu1 = "/cpus/cpu@1";
|
|
cpu2 = "/cpus/cpu@2";
|
|
cpu3 = "/cpus/cpu@3";
|
|
cpu4 = "/cpus/cpu@100";
|
|
cpu5 = "/cpus/cpu@101";
|
|
cpu6 = "/cpus/cpu@102";
|
|
cpu7 = "/cpus/cpu@103";
|
|
gic = "/interrupt-controller@e82b0000";
|
|
crg_ctrl = "/soc/crg_ctrl@fff35000";
|
|
crg_rst = "/soc/crg_rst_controller";
|
|
pctrl = "/soc/pctrl@e8a09000";
|
|
pmuctrl = "/soc/crg_ctrl@fff34000";
|
|
sctrl = "/soc/sctrl@fff0a000";
|
|
iomcu = "/soc/iomcu@ffd7e000";
|
|
media1_crg = "/soc/media1_crgctrl@e87ff000";
|
|
media2_crg = "/soc/media2_crgctrl@e8900000";
|
|
uart0 = "/soc/serial@fdf02000";
|
|
uart1 = "/soc/serial@fdf00000";
|
|
uart2 = "/soc/serial@fdf03000";
|
|
uart3 = "/soc/serial@ffd74000";
|
|
uart4 = "/soc/serial@fdf01000";
|
|
uart5 = "/soc/serial@fdf05000";
|
|
uart6 = "/soc/serial@fff32000";
|
|
gpio0 = "/soc/gpio@e8a0b000";
|
|
gpio1 = "/soc/gpio@e8a0c000";
|
|
gpio2 = "/soc/gpio@e8a0d000";
|
|
gpio3 = "/soc/gpio@e8a0e000";
|
|
gpio4 = "/soc/gpio@e8a0f000";
|
|
gpio5 = "/soc/gpio@e8a10000";
|
|
gpio6 = "/soc/gpio@e8a11000";
|
|
gpio7 = "/soc/gpio@e8a12000";
|
|
gpio8 = "/soc/gpio@e8a13000";
|
|
gpio9 = "/soc/gpio@e8a14000";
|
|
gpio10 = "/soc/gpio@e8a15000";
|
|
gpio11 = "/soc/gpio@e8a16000";
|
|
gpio12 = "/soc/gpio@e8a17000";
|
|
gpio13 = "/soc/gpio@e8a18000";
|
|
gpio14 = "/soc/gpio@e8a19000";
|
|
gpio15 = "/soc/gpio@e8a1a000";
|
|
gpio16 = "/soc/gpio@e8a1b000";
|
|
gpio17 = "/soc/gpio@e8a1c000";
|
|
gpio18 = "/soc/gpio@fff28000";
|
|
gpio19 = "/soc/gpio@fff29000";
|
|
gpio20 = "/soc/gpio@e8a1f000";
|
|
gpio21 = "/soc/gpio@e8a20000";
|
|
gpio22 = "/soc/gpio@fff0b000";
|
|
gpio23 = "/soc/gpio@fff0c000";
|
|
gpio24 = "/soc/gpio@fff0d000";
|
|
gpio25 = "/soc/gpio@fff0e000";
|
|
gpio26 = "/soc/gpio@fff0f000";
|
|
gpio27 = "/soc/gpio@fff10000";
|
|
gpio28 = "/soc/gpio@fff1d000";
|
|
ufs = "/soc/ufs@ff3c0000";
|
|
dwmmc1 = "/soc/dwmmc1@ff37f000";
|
|
dwmmc2 = "/soc/dwmmc2@fc183000";
|
|
wlcore = "/soc/dwmmc2@fc183000/wlcore@2";
|
|
range = "/soc/gpio-range";
|
|
pmx0 = "/soc/pinmux@e896c000";
|
|
uart0_pmx_func = "/soc/pinmux@e896c000/uart0_pmx_func";
|
|
uart2_pmx_func = "/soc/pinmux@e896c000/uart2_pmx_func";
|
|
uart3_pmx_func = "/soc/pinmux@e896c000/uart3_pmx_func";
|
|
uart4_pmx_func = "/soc/pinmux@e896c000/uart4_pmx_func";
|
|
uart6_pmx_func = "/soc/pinmux@e896c000/uart6_pmx_func";
|
|
pmx2 = "/soc/pinmux@e896c800";
|
|
uart0_cfg_func = "/soc/pinmux@e896c800/uart0_cfg_func";
|
|
uart2_cfg_func = "/soc/pinmux@e896c800/uart2_cfg_func";
|
|
uart3_cfg_func = "/soc/pinmux@e896c800/uart3_cfg_func";
|
|
uart4_cfg_func = "/soc/pinmux@e896c800/uart4_cfg_func";
|
|
uart6_cfg_func = "/soc/pinmux@e896c800/uart6_cfg_func";
|
|
pmx5 = "/soc/pinmux@fc182000";
|
|
sdio_pmx_func = "/soc/pinmux@fc182000/sdio_pmx_func";
|
|
pmx6 = "/soc/pinmux@fc182800";
|
|
sdio_clk_cfg_func = "/soc/pinmux@fc182800/sdio_clk_cfg_func";
|
|
sdio_cfg_func = "/soc/pinmux@fc182800/sdio_cfg_func";
|
|
pmx7 = "/soc/pinmux@ff37e000";
|
|
sd_pmx_func = "/soc/pinmux@ff37e000/sd_pmx_func";
|
|
pmx8 = "/soc/pinmux@ff37e800";
|
|
sd_clk_cfg_func = "/soc/pinmux@ff37e800/sd_clk_cfg_func";
|
|
sd_cfg_func = "/soc/pinmux@ff37e800/sd_cfg_func";
|
|
pmx1 = "/soc/pinmux@fff11000";
|
|
pmx16 = "/soc/pinmux@fff11800";
|
|
sd_1v8 = "/regulator-1v8";
|
|
sd_3v3 = "/regulator-3v3";
|
|
wlan_en = "/wlan-en-1-8v";
|
|
};
|
|
};
|