182 lines
4.6 KiB
C
Executable file
182 lines
4.6 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) COPYRIGHT 2021 Samsung Electronics Inc. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*/
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#ifndef _GPEXBE_DEVICETREE_H_
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#define _GPEXBE_DEVICETREE_H_
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#include <linux/device.h>
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/**
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* gpexbe_devicetree_get_int() - get int value from dt stored by var field
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* @var: field name
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* Return: int value stored in devicetree
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*/
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#define gpexbe_devicetree_get_int(var) \
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gpexbe_devicetree_get_int_internal(offsetof(gpu_dt, var), #var)
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/**
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* gpexbe_devicetree_get_str() - get string value from dt stored by var field
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* @var: field name
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* Return: string value stored in devicetree
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*/
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#define gpexbe_devicetree_get_str(var) \
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gpexbe_devicetree_get_str_internal(offsetof(gpu_dt, var), #var)
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typedef struct _dt_clock_item {
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int clock;
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int min_threshold;
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int max_threshold;
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int down_staycount;
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int mem_freq;
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int cpu_little_min_freq;
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int cpu_middle_min_freq;
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int cpu_big_max_freq;
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int llc_ways;
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} dt_clock_item;
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typedef struct _dt_clqos_item {
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int clock;
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int mif_min;
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int little_min;
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int middle_min;
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int big_max;
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} dt_clqos_item;
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typedef struct _dt_info {
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struct device *dev;
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int initialized;
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/* SOME EXCEPTIONS! clock table row and col num are stored as an array which is hard to access
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* So I've made an exception and stored them as two u32 values instead of one array[2] */
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//u32 clk_table_row_cnt;
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//u32 clk_table_col_cnt;
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struct gpu_dvfs_table_size {
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u32 row;
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u32 col;
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} gpu_dvfs_table_size;
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dt_clock_item *gpu_dvfs_table;
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struct gpu_cl_pmqos_table_size {
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u32 row;
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u32 col;
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} gpu_cl_pmqos_table_size;
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dt_clqos_item *gpu_cl_pmqos_table;
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/* values from interactive_info field */
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struct interactive_info {
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u32 highspeed_clock;
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u32 highspeed_load;
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u32 highspeed_delay;
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} interactive_info;
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/* pm backend */
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const char *g3d_genpd_name;
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u32 gpu_pmu_status_reg_offset;
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u32 gpu_pmu_status_local_pwr_mask;
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/* clock backend */
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u32 g3d_cmu_cal_id;
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/* debug backend */
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u32 gpu_ess_id_type;
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/* PM */
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u32 gpu_runtime_pm_delay_time;
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/* IFPO */
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u32 gpu_inter_frame_pm;
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/* CLOCK */
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u32 gpu_max_clock;
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u32 gpu_min_clock;
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u32 gpu_pmqos_cpu_cluster_num;
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/* LEGACY DVFS */
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const char *governor;
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u32 gpu_dvfs_bl_config_clock;
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u32 gpu_dvfs_polling_time;
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/* QOS */
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u32 gpu_bts_support;
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u32 gpu_mo_min_clock;
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/* DEBUG */
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u32 gpu_debug_level;
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/* HCM */
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int gpu_heavy_compute_cpu0_min_clock;
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int gpu_heavy_compute_vk_cpu0_min_clock;
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/* TSG */
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uint32_t gpu_weight_table_idx_0;
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uint32_t gpu_weight_table_idx_1;
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} gpu_dt;
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/**
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* gpexbe_devicetree_get_int_internal() - internal function used by gpexbe_devicetree_get_int
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* @offset: offset of field that need to be returned
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* @str: unused
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* Return: int value stored in devicetree
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*/
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int gpexbe_devicetree_get_int_internal(size_t offset, const char *str);
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/**
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* gpexbe_devicetree_get_str_internal() - internal function used by gpexbe_devicetree_get_str
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* @offset: offset of field that need to be returned
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* @str: unused
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* Return: string value stored in devicetree
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*/
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char *gpexbe_devicetree_get_str_internal(size_t offset, const char *str);
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/**
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* gpexbe_devicetree_get_clock_table() - get gpu clock table array containing pmqos info
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* Return: pmqos table
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*/
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dt_clock_item *gpexbe_devicetree_get_clock_table(void);
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/**
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* gpexbe_devicetree_get_clqos_table() - get gpu clock table array containing clqos info
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* Return: clqos table
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*/
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dt_clqos_item *gpexbe_devicetree_get_clqos_table(void);
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/**
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* gpexbe_devicetree_get_gpu_dt() - get the structure containing all mali related dt info
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* Return: pointer to gpu_dt struct
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*/
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gpu_dt *gpexbe_devicetree_get_gpu_dt(void);
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/**
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* gpexbe_devicetree_init() - initializes gpexbe_devicetree module
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* @dev: mali device struct
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*
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* Return: 0 on success
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*/
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int gpexbe_devicetree_init(struct device *dev);
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/**
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* gpexbe_devicetree_term() - terminates gpexbe_devicetree module
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*/
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void gpexbe_devicetree_term(void);
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#endif /* _GPEXBE_DEVICETREE_H_ */
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