186 lines
9.3 KiB
C
Executable file
186 lines
9.3 KiB
C
Executable file
#ifndef __CMUCAL_VCLKLUT_H__
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#define __CMUCAL_VCLKLUT_H__
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#include "../../cmucal.h"
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extern unsigned int vdd_mif_nm_lut_params[];
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extern unsigned int vdd_mif_ud_lut_params[];
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extern unsigned int vdd_mif_sud_lut_params[];
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extern unsigned int vdd_mif_uud_lut_params[];
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extern unsigned int vdd_cpucl0_sod_lut_params[];
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extern unsigned int vdd_cpucl0_od_lut_params[];
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extern unsigned int vdd_cpucl0_nm_lut_params[];
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extern unsigned int vdd_cpucl0_ud_lut_params[];
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extern unsigned int vdd_cpucl0_sud_lut_params[];
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extern unsigned int vdd_cpucl0_uud_lut_params[];
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extern unsigned int vdd_alive_uud_lut_params[];
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extern unsigned int vdd_alive_nm_lut_params[];
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extern unsigned int vddi_od_lut_params[];
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extern unsigned int vddi_sud_lut_params[];
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extern unsigned int vddi_ud_lut_params[];
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extern unsigned int vddi_uud_lut_params[];
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extern unsigned int vdd_cpucl1_sod_lut_params[];
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extern unsigned int vdd_cpucl1_od_lut_params[];
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extern unsigned int vdd_cpucl1_nm_lut_params[];
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extern unsigned int vdd_cpucl1_ud_lut_params[];
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extern unsigned int vdd_cpucl1_uud_lut_params[];
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extern unsigned int vdd_aud_od_lut_params[];
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extern unsigned int vdd_aud_nm_lut_params[];
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extern unsigned int vdd_aud_sud_lut_params[];
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extern unsigned int vdd_aud_ud_lut_params[];
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extern unsigned int vdd_aud_uud_lut_params[];
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extern unsigned int mux_clk_alive_i3c_pmic_uud_lut_params[];
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extern unsigned int clkcmu_alive_bus_uud_lut_params[];
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extern unsigned int div_clk_aud_pcmc_od_lut_params[];
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extern unsigned int div_clk_aud_pcmc_nm_lut_params[];
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extern unsigned int div_clk_aud_pcmc_ud_lut_params[];
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extern unsigned int div_clk_aud_pcmc_uud_lut_params[];
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extern unsigned int mux_busc_cmuref_uud_lut_params[];
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extern unsigned int mux_clkcmu_cmu_boost_uud_lut_params[];
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extern unsigned int mux_clk_chub_timer_uud_lut_params[];
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extern unsigned int mux_cmu_cmuref_uud_lut_params[];
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extern unsigned int mux_core_cmuref_uud_lut_params[];
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extern unsigned int mux_cpucl0_cmuref_uud_lut_params[];
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extern unsigned int mux_dsu_cmuref_uud_lut_params[];
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extern unsigned int mux_mif_cmuref_uud_lut_params[];
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extern unsigned int mux_clk_usb_usb20drd_uud_lut_params[];
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extern unsigned int clkcmu_usb_usb20drd_uud_lut_params[];
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extern unsigned int clkcmu_dpu_dsim_uud_lut_params[];
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extern unsigned int mux_clkcmu_peri_mmc_card_ud_lut_params[];
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extern unsigned int mux_clkcmu_peri_mmc_card_uud_lut_params[];
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extern unsigned int div_clk_alive_dbgcore_uart_uud_lut_params[];
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extern unsigned int div_clk_alive_usi0_uud_lut_params[];
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extern unsigned int div_clk_alive_i2c_uud_lut_params[];
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extern unsigned int mux_clkcmu_aud_cpu_uud_lut_params[];
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extern unsigned int div_clk_aud_mclk_uud_lut_params[];
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extern unsigned int div_clk_chub_usi0_uud_lut_params[];
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extern unsigned int clkcmu_chub_peri_uud_lut_params[];
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extern unsigned int div_clk_chub_usi1_uud_lut_params[];
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extern unsigned int div_clk_chub_usi2_uud_lut_params[];
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extern unsigned int div_clk_chub_usi3_uud_lut_params[];
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extern unsigned int div_clk_cmgp_usi0_uud_lut_params[];
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extern unsigned int clkcmu_cmgp_peri_uud_lut_params[];
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extern unsigned int div_clk_cmgp_usi4_uud_lut_params[];
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extern unsigned int div_clk_cmgp_i3c_uud_lut_params[];
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extern unsigned int div_clk_cmgp_usi1_nm_lut_params[];
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extern unsigned int div_clk_cmgp_usi1_uud_lut_params[];
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extern unsigned int div_clk_cmgp_usi2_nm_lut_params[];
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extern unsigned int div_clk_cmgp_usi2_uud_lut_params[];
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extern unsigned int div_clk_cmgp_usi3_nm_lut_params[];
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extern unsigned int div_clk_cmgp_usi3_uud_lut_params[];
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extern unsigned int clkcmu_cis_clk0_uud_lut_params[];
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extern unsigned int clkcmu_cis_clk1_uud_lut_params[];
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extern unsigned int clkcmu_cis_clk2_uud_lut_params[];
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extern unsigned int clkcmu_cis_clk3_uud_lut_params[];
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extern unsigned int clkcmu_cis_clk4_uud_lut_params[];
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extern unsigned int clkcmu_cis_clk5_uud_lut_params[];
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extern unsigned int div_clk_cpucl0_shortstop_sod_lut_params[];
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extern unsigned int div_clk_cpucl0_shortstop_od_lut_params[];
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extern unsigned int div_clk_cpucl0_shortstop_nm_lut_params[];
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extern unsigned int div_clk_cpucl0_shortstop_ud_lut_params[];
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extern unsigned int div_clk_cpucl0_shortstop_sud_lut_params[];
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extern unsigned int div_clk_cpucl0_shortstop_uud_lut_params[];
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extern unsigned int div_clk_cpucl1_shortstop_sod_lut_params[];
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extern unsigned int div_clk_cpucl1_shortstop_od_lut_params[];
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extern unsigned int div_clk_cpucl1_shortstop_nm_lut_params[];
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extern unsigned int div_clk_cpucl1_shortstop_ud_lut_params[];
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extern unsigned int div_clk_cpucl1_shortstop_uud_lut_params[];
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extern unsigned int div_clk_cpucl1_htu_sod_lut_params[];
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extern unsigned int div_clk_cpucl1_htu_od_lut_params[];
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extern unsigned int div_clk_cpucl1_htu_nm_lut_params[];
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extern unsigned int div_clk_cpucl1_htu_ud_lut_params[];
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extern unsigned int div_clk_cpucl1_htu_uud_lut_params[];
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extern unsigned int div_clk_dsu_shortstop_sod_lut_params[];
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extern unsigned int div_clk_dsu_shortstop_od_lut_params[];
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extern unsigned int div_clk_dsu_shortstop_nm_lut_params[];
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extern unsigned int div_clk_dsu_shortstop_ud_lut_params[];
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extern unsigned int div_clk_dsu_shortstop_sud_lut_params[];
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extern unsigned int div_clk_dsu_shortstop_uud_lut_params[];
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extern unsigned int div_clk_cluster0_atclk_sod_lut_params[];
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extern unsigned int div_clk_cluster0_atclk_od_lut_params[];
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extern unsigned int div_clk_cluster0_atclk_nm_lut_params[];
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extern unsigned int div_clk_cluster0_atclk_ud_lut_params[];
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extern unsigned int div_clk_cluster0_atclk_sud_lut_params[];
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extern unsigned int div_clk_cluster0_atclk_uud_lut_params[];
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extern unsigned int div_clk_peri_usi00_usi_uud_lut_params[];
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extern unsigned int mux_clkcmu_peri_ip_uud_lut_params[];
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extern unsigned int div_clk_peri_usi01_usi_uud_lut_params[];
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extern unsigned int div_clk_peri_usi02_usi_uud_lut_params[];
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extern unsigned int div_clk_peri_usi03_usi_uud_lut_params[];
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extern unsigned int div_clk_peri_usi04_usi_uud_lut_params[];
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extern unsigned int div_clk_peri_usi05_usi_uud_lut_params[];
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extern unsigned int div_clk_peri_uart_dbg_uud_lut_params[];
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extern unsigned int div_clk_peri_usi06_usi_uud_lut_params[];
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extern unsigned int div_clk_peri_400_lut_params[];
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extern unsigned int div_clk_peri_200_lut_params[];
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extern unsigned int div_clk_peri_133_lut_params[];
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extern unsigned int div_clk_peri_100_lut_params[];
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extern unsigned int div_clk_peri_80_lut_params[];
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extern unsigned int div_clk_peri_66_lut_params[];
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extern unsigned int div_clk_peri_57_lut_params[];
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extern unsigned int div_clk_peri_50_lut_params[];
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extern unsigned int div_clk_peri_44_lut_params[];
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extern unsigned int div_clk_peri_40_lut_params[];
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extern unsigned int div_clk_peri_36_lut_params[];
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extern unsigned int div_clk_peri_33_lut_params[];
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extern unsigned int div_clk_peri_30_lut_params[];
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extern unsigned int div_clk_peri_28_lut_params[];
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extern unsigned int div_clk_peri_26_lut_params[];
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extern unsigned int div_clk_peri_25_lut_params[];
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extern unsigned int div_clk_peri_13_lut_params[];
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extern unsigned int div_clk_peri_8_lut_params[];
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extern unsigned int div_clk_peri_6_lut_params[];
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extern unsigned int div_clk_peri_5_lut_params[];
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extern unsigned int div_clk_peri_4_lut_params[];
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extern unsigned int div_clk_peri_3_lut_params[];
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extern unsigned int div_vts_serial_lif_core_nm_lut_params[];
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extern unsigned int div_vts_serial_lif_core_uud_lut_params[];
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extern unsigned int clkcmu_chubvts_bus_uud_lut_params[];
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extern unsigned int mux_clkcmu_ap2gnss_uud_lut_params[];
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extern unsigned int blk_cmu_nm_lut_params[];
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extern unsigned int blk_cmu_uud_lut_params[];
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extern unsigned int blk_s2d_uud_lut_params[];
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extern unsigned int blk_alive_uud_lut_params[];
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extern unsigned int blk_aud_od_lut_params[];
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extern unsigned int blk_aud_nm_lut_params[];
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extern unsigned int blk_aud_ud_lut_params[];
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extern unsigned int blk_aud_uud_lut_params[];
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extern unsigned int blk_chub_uud_lut_params[];
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extern unsigned int blk_chubvts_nm_lut_params[];
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extern unsigned int blk_cmgp_uud_lut_params[];
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extern unsigned int blk_core_uud_lut_params[];
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extern unsigned int blk_cpucl0_sod_lut_params[];
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extern unsigned int blk_cpucl0_od_lut_params[];
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extern unsigned int blk_cpucl0_nm_lut_params[];
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extern unsigned int blk_cpucl0_ud_lut_params[];
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extern unsigned int blk_cpucl0_sud_lut_params[];
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extern unsigned int blk_cpucl0_uud_lut_params[];
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extern unsigned int blk_cpucl1_sod_lut_params[];
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extern unsigned int blk_cpucl1_od_lut_params[];
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extern unsigned int blk_cpucl1_nm_lut_params[];
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extern unsigned int blk_cpucl1_ud_lut_params[];
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extern unsigned int blk_cpucl1_uud_lut_params[];
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extern unsigned int blk_dsu_sod_lut_params[];
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extern unsigned int blk_dsu_od_lut_params[];
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extern unsigned int blk_dsu_nm_lut_params[];
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extern unsigned int blk_dsu_ud_lut_params[];
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extern unsigned int blk_dsu_sud_lut_params[];
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extern unsigned int blk_dsu_uud_lut_params[];
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extern unsigned int blk_usb_uud_lut_params[];
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extern unsigned int blk_vts_nm_lut_params[];
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extern unsigned int blk_vts_uud_lut_params[];
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extern unsigned int blk_busc_uud_lut_params[];
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extern unsigned int blk_cpucl0_glb_uud_lut_params[];
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extern unsigned int blk_csis_uud_lut_params[];
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extern unsigned int blk_dpu_uud_lut_params[];
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extern unsigned int blk_g3d_uud_lut_params[];
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extern unsigned int blk_isp_uud_lut_params[];
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extern unsigned int blk_m2m_uud_lut_params[];
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extern unsigned int blk_mcsc_uud_lut_params[];
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extern unsigned int blk_mfc_uud_lut_params[];
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extern unsigned int blk_npu0_ud_lut_params[];
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extern unsigned int blk_npus_ud_lut_params[];
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extern unsigned int blk_peri_uud_lut_params[];
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extern unsigned int blk_taa_uud_lut_params[];
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extern unsigned int blk_tnr_uud_lut_params[];
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#endif
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