153 lines
5.2 KiB
C
Executable file
153 lines
5.2 KiB
C
Executable file
/*
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* linux/include/linux/gpu_cooling.h
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*
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* Copyright (C) 2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
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* Copyright (C) 2012 Amit Daniel <amit.kachhap@linaro.org>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#ifndef __GPU_COOLING_H__
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#define __GPU_COOLING_H__
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#include <linux/of.h>
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#include <linux/thermal.h>
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#include <linux/cpumask.h>
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#include <linux/platform_device.h>
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#define GPU_TABLE_END ~1
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#if defined(CONFIG_GPU_THERMAL) || defined(CONFIG_GPU_THERMAL_MODULE)
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/**
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* gpufreq_cooling_register - function to create gpufreq cooling device.
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* @clip_gpus: cpumask of gpus where the frequency constraints will happen
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*/
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struct thermal_cooling_device *
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gpufreq_cooling_register(const struct cpumask *clip_gpus);
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struct thermal_cooling_device *
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gpufreq_power_cooling_register(const struct cpumask *clip_gpus,
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u32 capacitance);
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/**
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* of_gpufreq_cooling_register - create gpufreq cooling device based on DT.
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* @np: a valid struct device_node to the cooling device device tree node.
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* @clip_gpus: cpumask of gpus where the frequency constraints will happen
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*/
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#ifdef CONFIG_THERMAL_OF
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struct thermal_cooling_device *
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of_gpufreq_cooling_register(struct device_node *np,
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const struct cpumask *clip_gpus);
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struct thermal_cooling_device *
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of_gpufreq_power_cooling_register(struct device_node *np,
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const struct cpumask *clip_gpus,
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u32 capacitance);
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#else
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static inline struct thermal_cooling_device *
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of_gpufreq_cooling_register(struct device_node *np,
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const struct cpumask *clip_gpus)
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{
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return NULL;
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}
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static inline struct thermal_cooling_device *
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of_gpufreq_power_cooling_register(struct device_node *np,
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const struct cpumask *clip_gpus,
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u32 capacitance);
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{
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return NULL;
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}
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#endif
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/**
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* gpufreq_cooling_unregister - function to remove gpufreq cooling device.
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* @cdev: thermal cooling device pointer.
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*/
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void gpufreq_cooling_unregister(struct thermal_cooling_device *cdev);
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unsigned long gpufreq_cooling_get_level(unsigned int gpu, unsigned int freq);
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#else /* !CONFIG_GPU_THERMAL */
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static inline struct thermal_cooling_device *
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gpufreq_cooling_register(const struct cpumask *clip_gpus)
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{
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return NULL;
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}
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static inline struct thermal_cooling_device *
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gpufreq_power_cooling_register(const struct cpumask *clip_gpus,
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u32 capacitance)
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{
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return NULL;
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}
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static inline struct thermal_cooling_device *
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of_gpufreq_cooling_register(struct device_node *np,
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const struct cpumask *clip_gpus)
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{
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return NULL;
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}
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static inline struct thermal_cooling_device *
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of_gpufreq_power_cooling_register(struct device_node *np,
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const struct cpumask *clip_gpus,
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u32 capacitance)
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{
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return NULL;
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}
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static inline
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void gpufreq_cooling_unregister(struct thermal_cooling_device *cdev)
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{
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return;
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}
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static inline
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unsigned long gpufreq_cooling_get_level(unsigned int gpu, unsigned int freq)
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{
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return THERMAL_CSTATE_INVALID;
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}
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#endif /* CONFIG_GPU_THERMAL */
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#if defined(CONFIG_MALI_DVFS) || defined(CONFIG_DRM_SGPU_EXYNOS)
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extern int gpu_dvfs_get_clock(int level);
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extern int gpu_dvfs_get_voltage(int clock);
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extern int gpu_dvfs_get_step(void);
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extern int gpu_dvfs_get_cur_clock(void);
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extern int gpu_dvfs_get_utilization(void);
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extern int gpu_dvfs_get_max_freq(void);
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extern void gpu_tmu_get_notifier(struct notifier_block **nb);
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extern int gpu_tmu_notifier(struct notifier_block *notifier,
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unsigned long event, void *v);
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extern int exynos_tmu_extern_get_temp(int tzid);
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//extern int gpu_dvfs_get_sustainable_info_array(int index);
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//extern int gpu_dvfs_get_max_lock(void);
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//extern bool gpu_dvfs_get_need_cpu_qos(void);
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#else
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static inline int gpu_dvfs_get_clock(int level) { return 0; }
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static inline int gpu_dvfs_get_voltage(int clock) { return 0; }
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static inline int gpu_dvfs_get_step(void) { return 0; }
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static inline int gpu_dvfs_get_cur_clock(void) { return 0; }
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static inline int gpu_dvfs_get_utilization(void) { return 0; }
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static inline int gpu_dvfs_get_max_freq(void) { return 0; }
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static inline void gpu_tmu_get_notifier(struct notifier_block **nb) { return; }
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static inline int gpu_tmu_notifier(struct notifier_block *notifier,
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unsigned long event, void *v) { return 0; }
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static inline int exynos_tmu_extern_get_temp(int tzid) { return 0; }
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//static inline int gpu_dvfs_get_sustainable_info_array(int index) { return 0; }
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//static inline int gpu_dvfs_get_max_lock(void) { return 0; }
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//static inline bool gpu_dvfs_get_need_cpu_qos(void) { return false; }
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#endif
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#endif /* __GPU_COOLING_H__ */
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