kernel_samsung_a53x/arch/x86
Adrian Hunter 499332775e x86/insn: Fix PUSH instruction in x86 instruction decoder opcode map
[ Upstream commit 59162e0c11d7257cde15f907d19fefe26da66692 ]

The x86 instruction decoder is used not only for decoding kernel
instructions. It is also used by perf uprobes (user space probes) and by
perf tools Intel Processor Trace decoding. Consequently, it needs to
support instructions executed by user space also.

Opcode 0x68 PUSH instruction is currently defined as 64-bit operand size
only i.e. (d64). That was based on Intel SDM Opcode Map. However that is
contradicted by the Instruction Set Reference section for PUSH in the
same manual.

Remove 64-bit operand size only annotation from opcode 0x68 PUSH
instruction.

Example:

  $ cat pushw.s
  .global  _start
  .text
  _start:
          pushw   $0x1234
          mov     $0x1,%eax   # system call number (sys_exit)
          int     $0x80
  $ as -o pushw.o pushw.s
  $ ld -s -o pushw pushw.o
  $ objdump -d pushw | tail -4
  0000000000401000 <.text>:
    401000:       66 68 34 12             pushw  $0x1234
    401004:       b8 01 00 00 00          mov    $0x1,%eax
    401009:       cd 80                   int    $0x80
  $ perf record -e intel_pt//u ./pushw
  [ perf record: Woken up 1 times to write data ]
  [ perf record: Captured and wrote 0.014 MB perf.data ]

 Before:

  $ perf script --insn-trace=disasm
  Warning:
  1 instruction trace errors
           pushw   10349 [000] 10586.869237014:            401000 [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           pushw $0x1234
           pushw   10349 [000] 10586.869237014:            401006 [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           addb %al, (%rax)
           pushw   10349 [000] 10586.869237014:            401008 [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           addb %cl, %ch
           pushw   10349 [000] 10586.869237014:            40100a [unknown] (/home/ahunter/git/misc/rtit-tests/pushw)           addb $0x2e, (%rax)
   instruction trace error type 1 time 10586.869237224 cpu 0 pid 10349 tid 10349 ip 0x40100d code 6: Trace doesn't match instruction

 After:

  $ perf script --insn-trace=disasm
             pushw   10349 [000] 10586.869237014:            401000 [unknown] (./pushw)           pushw $0x1234
             pushw   10349 [000] 10586.869237014:            401004 [unknown] (./pushw)           movl $1, %eax

Fixes: eb13296cfaf6 ("x86: Instruction decoder API")
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20240502105853.5338-3-adrian.hunter@intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-19 12:26:59 +01:00
..
boot x86/boot: Ignore NMIs during very early boot 2024-11-18 12:13:08 +01:00
configs Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
crypto crypto: x86/sha256-avx2 - add missing vzeroupper 2024-11-19 12:26:52 +01:00
entry x86/xen: Drop USERGS_SYSRET64 paravirt call 2024-11-19 12:26:38 +01:00
events x86: Share definition of __is_canonical_address() 2024-11-18 11:43:11 +01:00
hyperv Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
ia32 Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
include x86/xen: Drop USERGS_SYSRET64 paravirt call 2024-11-19 12:26:38 +01:00
kernel x86/tsc: Trust initial offset in architectural TSC-adjust MSRs 2024-11-19 12:26:51 +01:00
kvm KVM: x86: Clear "has_error_code", not "error_code", for RM exception injection 2024-11-19 12:26:38 +01:00
lib x86/insn: Fix PUSH instruction in x86 instruction decoder opcode map 2024-11-19 12:26:59 +01:00
math-emu Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mm x86/mm/pat: fix VM_PAT handling in COW mappings 2024-11-19 09:23:15 +01:00
net x86/returnthunk: Allow different return thunks 2024-11-18 22:25:38 +01:00
oprofile Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
platform x86/stackprotector/32: Make the canary into a regular percpu variable 2024-11-19 09:22:37 +01:00
power x86/stackprotector/32: Make the canary into a regular percpu variable 2024-11-19 09:22:37 +01:00
purgatory Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
ras Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
realmode Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
tools x86/boot: Ignore relocations in .notes sections in walk_relocs() too 2024-11-19 12:26:53 +01:00
um Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
video Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
xen x86/xen: Drop USERGS_SYSRET64 paravirt call 2024-11-19 12:26:38 +01:00
Kbuild Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Kconfig cpu: Re-enable CPU mitigations by default for !X86 architectures 2024-11-19 11:32:38 +01:00
Kconfig.assembler Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Kconfig.cpu x86/Kconfig: Transmeta Crusoe is CPU family 5, not 6 2024-11-18 12:13:31 +01:00
Kconfig.debug Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Makefile x86/stackprotector/32: Make the canary into a regular percpu variable 2024-11-19 09:22:37 +01:00
Makefile.um um: allow not setting extra rpaths in the linux binary 2024-11-18 23:19:35 +01:00
Makefile_32.cpu Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00