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Chen-Yu Tsai e6a4cd55e2 pinctrl: mediatek: Drop bogus slew rate register range for MT8192 
[ Upstream commit e15ab05a6b3ed42f2f43f8bd1a1abdbde64afecd ]

The MT8192 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: d32f38f2a8fc ("pinctrl: mediatek: Add pinctrl driver for mt8192")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-19 08:44:52 +01:00
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cirrus pinctrl: lochnagar: Don't build on MIPS 2024-11-18 12:12:11 +01:00
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mediatek pinctrl: mediatek: Drop bogus slew rate register range for MT8192 2024-11-19 08:44:52 +01:00
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core.c
core.h
devicetree.c
devicetree.h
Kconfig
Makefile
pinconf-generic.c
pinconf.c
pinconf.h
pinctrl-amd.c
pinctrl-amd.h
pinctrl-artpec6.c
pinctrl-as3722.c
pinctrl-at91-pio4.c
pinctrl-at91.c
pinctrl-at91.h
pinctrl-axp209.c
pinctrl-bm1880.c
pinctrl-coh901.c
pinctrl-coh901.h
pinctrl-da850-pupd.c
pinctrl-da9062.c
pinctrl-digicolor.c
pinctrl-equilibrium.c
pinctrl-equilibrium.h
pinctrl-falcon.c
pinctrl-gemini.c
pinctrl-ingenic.c
pinctrl-lantiq.c
pinctrl-lantiq.h
pinctrl-lpc18xx.c
pinctrl-max77620.c
pinctrl-mcp23s08.c
pinctrl-mcp23s08.h
pinctrl-mcp23s08_i2c.c
pinctrl-mcp23s08_spi.c
pinctrl-ocelot.c
pinctrl-oxnas.c
pinctrl-palmas.c
pinctrl-pic32.c
pinctrl-pic32.h
pinctrl-pistachio.c
pinctrl-rk805.c
pinctrl-rockchip.c
pinctrl-samsung-s2mpm07.c
pinctrl-samsung-s2mps26.c
pinctrl-samsung-s2mpu13.c
pinctrl-samsung-s2mpu14.c
pinctrl-single.c
pinctrl-st.c
pinctrl-stmfx.c
pinctrl-sx150x.c
pinctrl-tb10x.c
pinctrl-u300.c
pinctrl-utils.c
pinctrl-utils.h
pinctrl-xway.c
pinctrl-zynq.c
pinmux.c
pinmux.h