kernel_samsung_a53x/arch/x86/kernel/cpu
Kim Phillips 8abcca4816 x86/cpu: Enable STIBP on AMD if Automatic IBRS is enabled
commit fd470a8beed88440b160d690344fbae05a0b9b1b upstream.

Unlike Intel's Enhanced IBRS feature, AMD's Automatic IBRS does not
provide protection to processes running at CPL3/user mode, see section
"Extended Feature Enable Register (EFER)" in the APM v2 at
https://bugzilla.kernel.org/attachment.cgi?id=304652

Explicitly enable STIBP to protect against cross-thread CPL3
branch target injections on systems with Automatic IBRS enabled.

Also update the relevant documentation.

Fixes: e7862eda309e ("x86/cpu: Support AMD Automatic IBRS")
Reported-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230720194727.67022-1-kim.phillips@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-19 09:22:43 +01:00
..
mce x86/mce: Mark fatal MCE's page as poison to avoid panic in the kdump kernel 2024-11-18 12:13:08 +01:00
microcode Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mtrr Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
resctrl Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
acrn.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
amd.c x86/CPU/AMD: Update the Zenbleed microcode revisions 2024-11-19 09:22:36 +01:00
aperfmperf.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
bugs.c x86/cpu: Enable STIBP on AMD if Automatic IBRS is enabled 2024-11-19 09:22:43 +01:00
cacheinfo.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
centaur.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
common.c x86/rfds: Mitigate Register File Data Sampling (RFDS) 2024-11-19 09:22:40 +01:00
cpu.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
cpuid-deps.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
cyrix.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
feat_ctl.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
hygon.c x86/cpu/hygon: Fix the CPU topology evaluation for real 2024-11-18 11:43:21 +01:00
hypervisor.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
intel.c x86/cpu/intel: Detect TME keyid bits before setting MTRR mask registers 2024-11-18 23:18:30 +01:00
intel_epb.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
intel_pconfig.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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mkcapflags.sh Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
mshyperv.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
perfctr-watchdog.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
powerflags.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
proc.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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scattered.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
topology.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
transmeta.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
tsx.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
umc.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
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