1819 lines
135 KiB
C
Executable file
1819 lines
135 KiB
C
Executable file
/*
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* phy-exynos-usbdp-gen2-v4-reg-pcs.h
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*
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* Created on: 2020. 1. 20.
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* Author: daeman.ko
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*/
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#ifndef DEV_USB_PHY_EXYNOS_USBDP_GEN2_V4_PHY_EXYNOS_USBDP_GEN2_V4_REG_PCS_H_
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#define DEV_USB_PHY_EXYNOS_USBDP_GEN2_V4_PHY_EXYNOS_USBDP_GEN2_V4_REG_PCS_H_
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#define USBDP_PCS_BIT_MASK_1 0x00000001
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#define USBDP_PCS_BIT_MASK_2 0x00000003
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#define USBDP_PCS_BIT_MASK_3 0x00000007
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#define USBDP_PCS_BIT_MASK_4 0x0000000F
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#define USBDP_PCS_BIT_MASK_5 0x0000001F
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#define USBDP_PCS_BIT_MASK_6 0x0000003F
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#define USBDP_PCS_BIT_MASK_7 0x0000007F
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#define USBDP_PCS_BIT_MASK_8 0x000000FF
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#define USBDP_PCS_BIT_MASK_9 0x000001FF
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#define USBDP_PCS_BIT_MASK_10 0x000003FF
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#define USBDP_PCS_BIT_MASK_11 0x000007FF
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#define USBDP_PCS_BIT_MASK_12 0x00000FFF
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#define USBDP_PCS_BIT_MASK_13 0x00001FFF
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#define USBDP_PCS_BIT_MASK_14 0x00003FFF
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#define USBDP_PCS_BIT_MASK_15 0x00007FFF
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#define USBDP_PCS_BIT_MASK_16 0x0000FFFF
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#define USBDP_PCS_BIT_MASK_17 0x0001FFFF
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#define USBDP_PCS_BIT_MASK_18 0x0003FFFF
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#define USBDP_PCS_BIT_MASK_19 0x0007FFFF
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#define USBDP_PCS_BIT_MASK_20 0x000FFFFF
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#define USBDP_PCS_BIT_MASK_21 0x001FFFFF
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#define USBDP_PCS_BIT_MASK_22 0x003FFFFF
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#define USBDP_PCS_BIT_MASK_23 0x007FFFFF
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#define USBDP_PCS_BIT_MASK_24 0x00FFFFFF
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#define USBDP_PCS_BIT_MASK_25 0x01FFFFFF
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#define USBDP_PCS_BIT_MASK_26 0x03FFFFFF
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#define USBDP_PCS_BIT_MASK_27 0x07FFFFFF
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#define USBDP_PCS_BIT_MASK_28 0x0FFFFFFF
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#define USBDP_PCS_BIT_MASK_29 0x1FFFFFFF
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#define USBDP_PCS_BIT_MASK_30 0x3FFFFFFF
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#define USBDP_PCS_BIT_MASK_31 0x7FFFFFFF
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#define USBDP_PCS_BIT_MASK(_bw) USBDP_PCS_BIT_MASK_##_bw
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#define USBDP_PCS_REG_MSK(_pos, _B) (USBDP_PCS_BIT_MASK(_B) << _pos)
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#define USBDP_PCS_REG_CLR(_pos, _B) ~(USBDP_PCS_REG_MSK(_pos, _B))
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#define USBDP_PCS_REG_SET(_val, _pos, _B) ((_val & USBDP_PCS_BIT_MASK(_B)) << _pos)
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#define USBDP_PCS_REG_GET(_reg, _pos, _B) ((_reg & (USBDP_PCS_REG_MSK(_pos, _B))) >> _pos)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS0_N0 (0x0100)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS0_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS0_N1 (0x0104)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS0_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS1_N0 (0x0108)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS1_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS1_N1 (0x010C)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS1_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS2_N0 (0x0110)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS2_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS2_N1 (0x0114)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS2_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS3_N0 (0x0118)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS3_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS3_N1 (0x011C)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS3_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS4_N0 (0x0120)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS4_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS4_N1 (0x0124)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS4_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS5_N0 (0x012C)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS5_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS5_N1 (0x0130)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS5_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS6_N0 (0x0134)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS6_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS6_N1 (0x0138)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS6_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS7_N0 (0x013C)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS7_N0_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_NS_VEC_PS7_N1 (0x0140)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_EXP_COND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_EXP_COND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_EXP_COND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_EXP_COND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_COND_MASK_MSK USBDP_PCS_REG_MSK(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_COND_MASK_CLR USBDP_PCS_REG_CLR(8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_COND_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_COND_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 8, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_INV_MASK_MSK USBDP_PCS_REG_MSK(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_INV_MASK_CLR USBDP_PCS_REG_CLR(16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_INV_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_INV_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 4)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_SEL_TIMEOUT_MSK USBDP_PCS_REG_MSK(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_SEL_TIMEOUT_CLR USBDP_PCS_REG_CLR(20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_SEL_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_SEL_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 20, 2)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_ENABLE_TIMER_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_ENABLE_TIMER_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_ENABLE_TIMER_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_ENABLE_TIMER_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_NS_REQ_MSK USBDP_PCS_REG_MSK(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_NS_REQ_CLR USBDP_PCS_REG_CLR(24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_NS_REQ_SET(_x) USBDP_PCS_REG_SET(_x, 24, 8)
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#define USBDP_PCS_PM_NS_VEC_PS7_N1_NS_REQ_GET(_R) USBDP_PCS_REG_GET(_R, 24, 8)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_0 (0x0144)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_0_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_1 (0x0148)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_1_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_2 (0x014C)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_2_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_3 (0x0150)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_3_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_4 (0x0154)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_4_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_5 (0x0158)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_5_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_6 (0x015C)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_6_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_OUT_VEC_7 (0x0160)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_SEL_OUT_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_SEL_OUT_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_DYNAMIC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_DYNAMIC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B0_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_SEL_OUT_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_SEL_OUT_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_DYNAMIC_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_DYNAMIC_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B1_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_SEL_OUT_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_SEL_OUT_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_DYNAMIC_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_DYNAMIC_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B2_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_SEL_OUT_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_SEL_OUT_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_DYNAMIC_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_DYNAMIC_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B3_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_SEL_OUT_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_SEL_OUT_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_DYNAMIC_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_DYNAMIC_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B4_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_SEL_OUT_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_SEL_OUT_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_DYNAMIC_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_DYNAMIC_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B5_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_SEL_OUT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_SEL_OUT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_DYNAMIC_MSK USBDP_PCS_REG_MSK(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_DYNAMIC_CLR USBDP_PCS_REG_CLR(13, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B6_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 13, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_SEL_OUT_MSK USBDP_PCS_REG_MSK(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_SEL_OUT_CLR USBDP_PCS_REG_CLR(14, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 14, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_DYNAMIC_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_DYNAMIC_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B7_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_SEL_OUT_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_SEL_OUT_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_DYNAMIC_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_DYNAMIC_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B8_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_SEL_OUT_MSK USBDP_PCS_REG_MSK(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_SEL_OUT_CLR USBDP_PCS_REG_CLR(18, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_SEL_OUT_SET(_x) USBDP_PCS_REG_SET(_x, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_SEL_OUT_GET(_R) USBDP_PCS_REG_GET(_R, 18, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_DYNAMIC_MSK USBDP_PCS_REG_MSK(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_DYNAMIC_CLR USBDP_PCS_REG_CLR(19, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_DYNAMIC_SET(_x) USBDP_PCS_REG_SET(_x, 19, 1)
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#define USBDP_PCS_PM_OUT_VEC_7_B9_DYNAMIC_GET(_R) USBDP_PCS_REG_GET(_R, 19, 1)
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#define EXYNOS_USBDP_PCS_PM_TIMEOUT_0 (0x0170)
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#define USBDP_PCS_PM_TIMEOUT_0_TIMEOUT_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_0_TIMEOUT_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_0_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_PM_TIMEOUT_0_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_PM_TIMEOUT_1 (0x0174)
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#define USBDP_PCS_PM_TIMEOUT_1_TIMEOUT_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_1_TIMEOUT_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_1_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_PM_TIMEOUT_1_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_PM_TIMEOUT_2 (0x0178)
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#define USBDP_PCS_PM_TIMEOUT_2_TIMEOUT_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_2_TIMEOUT_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_2_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_PM_TIMEOUT_2_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_PM_TIMEOUT_3 (0x017C)
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#define USBDP_PCS_PM_TIMEOUT_3_TIMEOUT_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_3_TIMEOUT_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_PM_TIMEOUT_3_TIMEOUT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_PM_TIMEOUT_3_TIMEOUT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_PM_PM_MODE_VEC (0x0180)
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#define USBDP_PCS_PM_PM_MODE_VEC_FORCE_EN_PIPE_PCLK_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_FORCE_EN_PIPE_PCLK_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_FORCE_EN_PIPE_PCLK_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_FORCE_EN_PIPE_PCLK_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_WAKE_UP_BY_RX_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_WAKE_UP_BY_RX_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_WAKE_UP_BY_RX_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_WAKE_UP_BY_RX_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_TX_ACTIVITY_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_TX_ACTIVITY_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_TX_ACTIVITY_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_TX_ACTIVITY_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_RX_ACTIVITY_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_RX_ACTIVITY_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_RX_ACTIVITY_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_PM_MODE_VEC_EN_CHECK_RX_ACTIVITY_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define EXYNOS_USBDP_PCS_PM_FORCE_SET_PIPE (0x0184)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_POWERDOWN_MSK USBDP_PCS_REG_MSK(0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_POWERDOWN_CLR USBDP_PCS_REG_CLR(0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_POWERDOWN_SET(_x) USBDP_PCS_REG_SET(_x, 0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_POWERDOWN_GET(_R) USBDP_PCS_REG_GET(_R, 0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_POWERDOWN_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_POWERDOWN_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_POWERDOWN_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_POWERDOWN_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_RATE_MSK USBDP_PCS_REG_MSK(4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_RATE_CLR USBDP_PCS_REG_CLR(4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_RATE_SET(_x) USBDP_PCS_REG_SET(_x, 4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_MAC_RATE_GET(_R) USBDP_PCS_REG_GET(_R, 4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_RATE_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_RATE_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_RATE_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_PM_FORCE_SET_PIPE_SET_AND_HOLD_RATE_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define EXYNOS_USBDP_PCS_PM_POWER_STATE (0x0188)
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#define USBDP_PCS_PM_POWER_STATE_PM_STATE_MSK USBDP_PCS_REG_MSK(0, 3)
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#define USBDP_PCS_PM_POWER_STATE_PM_STATE_CLR USBDP_PCS_REG_CLR(0, 3)
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#define USBDP_PCS_PM_POWER_STATE_PM_STATE_SET(_x) USBDP_PCS_REG_SET(_x, 0, 3)
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#define USBDP_PCS_PM_POWER_STATE_PM_STATE_GET(_R) USBDP_PCS_REG_GET(_R, 0, 3)
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#define EXYNOS_USBDP_PCS_PM_FORCE_SET_PM (0x018C)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_STATE_MSK USBDP_PCS_REG_MSK(0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_STATE_CLR USBDP_PCS_REG_CLR(0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_STATE_SET(_x) USBDP_PCS_REG_SET(_x, 0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_STATE_GET(_R) USBDP_PCS_REG_GET(_R, 0, 3)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_RATE_MSK USBDP_PCS_REG_MSK(4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_RATE_CLR USBDP_PCS_REG_CLR(4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_RATE_SET(_x) USBDP_PCS_REG_SET(_x, 4, 2)
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#define USBDP_PCS_PM_FORCE_SET_PM_PM_RATE_GET(_R) USBDP_PCS_REG_GET(_R, 4, 2)
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#define EXYNOS_USBDP_PCS_RX_FRONT_END_MODE_VEC (0x0300)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_SYMBOL_REALIGN_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_SYMBOL_REALIGN_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_SYMBOL_REALIGN_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_SYMBOL_REALIGN_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_CHECK_BLOCK_SYNC_HEADER_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_CHECK_BLOCK_SYNC_HEADER_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_CHECK_BLOCK_SYNC_HEADER_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_CHECK_BLOCK_SYNC_HEADER_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_MASK_BLOCK_ALIGN_CONTROL_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_MASK_BLOCK_ALIGN_CONTROL_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_MASK_BLOCK_ALIGN_CONTROL_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_EN_MASK_BLOCK_ALIGN_CONTROL_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_RUN_LENGTH_TH_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_RUN_LENGTH_TH_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_RUN_LENGTH_TH_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_RUN_LENGTH_TH_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_BLOCK_REQ_SIZE_TH_MSK USBDP_PCS_REG_MSK(8, 2)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_BLOCK_REQ_SIZE_TH_CLR USBDP_PCS_REG_CLR(8, 2)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_BLOCK_REQ_SIZE_TH_SET(_x) USBDP_PCS_REG_SET(_x, 8, 2)
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#define USBDP_PCS_RX_FRONT_END_MODE_VEC_BLOCK_REQ_SIZE_TH_GET(_R) USBDP_PCS_REG_GET(_R, 8, 2)
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#define EXYNOS_USBDP_PCS_RX_EBUF_PARAM (0x0304)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_HALF_FULL_MODE_MSK USBDP_PCS_REG_MSK(0, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_HALF_FULL_MODE_CLR USBDP_PCS_REG_CLR(0, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_HALF_FULL_MODE_SET(_x) USBDP_PCS_REG_SET(_x, 0, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_HALF_FULL_MODE_GET(_R) USBDP_PCS_REG_GET(_R, 0, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_INSERT_TH_MSK USBDP_PCS_REG_MSK(8, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_INSERT_TH_CLR USBDP_PCS_REG_CLR(8, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_INSERT_TH_SET(_x) USBDP_PCS_REG_SET(_x, 8, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_INSERT_TH_GET(_R) USBDP_PCS_REG_GET(_R, 8, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_NUM_INIT_BUFFERING_MSK USBDP_PCS_REG_MSK(16, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_NUM_INIT_BUFFERING_CLR USBDP_PCS_REG_CLR(16, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_NUM_INIT_BUFFERING_SET(_x) USBDP_PCS_REG_SET(_x, 16, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_NUM_INIT_BUFFERING_GET(_R) USBDP_PCS_REG_GET(_R, 16, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_EMPTY_MODE_MSK USBDP_PCS_REG_MSK(24, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_EMPTY_MODE_CLR USBDP_PCS_REG_CLR(24, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_EMPTY_MODE_SET(_x) USBDP_PCS_REG_SET(_x, 24, 6)
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#define USBDP_PCS_RX_EBUF_PARAM_SKP_REMOVE_TH_EMPTY_MODE_GET(_R) USBDP_PCS_REG_GET(_R, 24, 6)
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#define EXYNOS_USBDP_PCS_RX_LFPS_DETECTION (0x0308)
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#define USBDP_PCS_RX_LFPS_DETECTION_DATA_PATH_DELAY_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_LFPS_DETECTION_DATA_PATH_DELAY_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_LFPS_DETECTION_DATA_PATH_DELAY_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_LFPS_DETECTION_DATA_PATH_DELAY_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_RX_BACK_END_MODE_VEC (0x030C)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_DISABLE_DATA_MASK_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_DISABLE_DATA_MASK_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_DISABLE_DATA_MASK_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_DISABLE_DATA_MASK_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_FORCE_EBUF_EMPTY_MODE_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_FORCE_EBUF_EMPTY_MODE_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_FORCE_EBUF_EMPTY_MODE_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_RX_BACK_END_MODE_VEC_FORCE_EBUF_EMPTY_MODE_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define EXYNOS_USBDP_PCS_RX_EBUF_DRAINER_PARAM (0x0318)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_HALF_FULL_MODE_MSK USBDP_PCS_REG_MSK(0, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_HALF_FULL_MODE_CLR USBDP_PCS_REG_CLR(0, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_HALF_FULL_MODE_SET(_x) USBDP_PCS_REG_SET(_x, 0, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_HALF_FULL_MODE_GET(_R) USBDP_PCS_REG_GET(_R, 0, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_TSEQ_REMOVE_TH_MSK USBDP_PCS_REG_MSK(8, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_TSEQ_REMOVE_TH_CLR USBDP_PCS_REG_CLR(8, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_TSEQ_REMOVE_TH_SET(_x) USBDP_PCS_REG_SET(_x, 8, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_TSEQ_REMOVE_TH_GET(_R) USBDP_PCS_REG_GET(_R, 8, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_REMOVE_TSEQ_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_REMOVE_TSEQ_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_REMOVE_TSEQ_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_REMOVE_TSEQ_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_MASK_TSEQ_MSK USBDP_PCS_REG_MSK(17, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_MASK_TSEQ_CLR USBDP_PCS_REG_CLR(17, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_MASK_TSEQ_SET(_x) USBDP_PCS_REG_SET(_x, 17, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_EN_MASK_TSEQ_GET(_R) USBDP_PCS_REG_GET(_R, 17, 1)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_EMPTY_MODE_MSK USBDP_PCS_REG_MSK(20, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_EMPTY_MODE_CLR USBDP_PCS_REG_CLR(20, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_EMPTY_MODE_SET(_x) USBDP_PCS_REG_SET(_x, 20, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DRAIN_LEVEL_TH_EMPTY_MODE_GET(_R) USBDP_PCS_REG_GET(_R, 20, 6)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_DATA_COUNT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_RX_EBUF_DRAINER_PARAM_ERROR_COUNT_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_RX_SDS_0 (0x03E0)
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#define USBDP_PCS_RX_SDS_0_PATTERN_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_RX_SDS_0_PATTERN_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_RX_SDS_0_PATTERN_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_RX_SDS_0_PATTERN_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_RX_SDS_1 (0x03E4)
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#define USBDP_PCS_RX_SDS_1_PATTERN_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_RX_SDS_1_PATTERN_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_RX_SDS_1_PATTERN_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_RX_SDS_1_PATTERN_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_RX_SDS_2 (0x03E8)
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#define USBDP_PCS_RX_SDS_2_PATTERN_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_RX_SDS_2_PATTERN_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_RX_SDS_2_PATTERN_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_RX_SDS_2_PATTERN_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_RX_SDS_3 (0x03EC)
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#define USBDP_PCS_RX_SDS_3_PATTERN_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_RX_SDS_3_PATTERN_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_RX_SDS_3_PATTERN_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_RX_SDS_3_PATTERN_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_RX_RX_CONTROL (0x03F0)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_UNALIGN_SYNC_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_UNALIGN_SYNC_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_UNALIGN_SYNC_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_UNALIGN_SYNC_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SYNC_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SYNC_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SYNC_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SYNC_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SKP_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SKP_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SKP_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SKP_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SDS_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SDS_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SDS_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_ALIGN_SDS_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SYNC_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SYNC_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SYNC_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SYNC_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SKP_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SKP_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SKP_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_LOCK_SKP_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_REMOVER_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_REMOVER_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_REMOVER_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_REMOVER_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_CTRL_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_CTRL_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_CTRL_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_CTRL_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_CTRL_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_CTRL_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_CTRL_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_CTRL_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_DATA_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_DATA_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_DATA_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_CORRECTION_DATA_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_DATA_MSK USBDP_PCS_REG_MSK(11, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_DATA_CLR USBDP_PCS_REG_CLR(11, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_DATA_SET(_x) USBDP_PCS_REG_SET(_x, 11, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SINGLE_BIT_ERR_REPORT_DATA_GET(_R) USBDP_PCS_REG_GET(_R, 11, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_DOUBLE_BIT_ERR_REPORT_MSK USBDP_PCS_REG_MSK(12, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_DOUBLE_BIT_ERR_REPORT_CLR USBDP_PCS_REG_CLR(12, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_DOUBLE_BIT_ERR_REPORT_SET(_x) USBDP_PCS_REG_SET(_x, 12, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_DOUBLE_BIT_ERR_REPORT_GET(_R) USBDP_PCS_REG_GET(_R, 12, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_OVERRIDE_SDS_PATTERN_MSK USBDP_PCS_REG_MSK(16, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_OVERRIDE_SDS_PATTERN_CLR USBDP_PCS_REG_CLR(16, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_OVERRIDE_SDS_PATTERN_SET(_x) USBDP_PCS_REG_SET(_x, 16, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_OVERRIDE_SDS_PATTERN_GET(_R) USBDP_PCS_REG_GET(_R, 16, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_ENHANCED_FLOW_CONTROL_MSK USBDP_PCS_REG_MSK(20, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_ENHANCED_FLOW_CONTROL_CLR USBDP_PCS_REG_CLR(20, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_ENHANCED_FLOW_CONTROL_SET(_x) USBDP_PCS_REG_SET(_x, 20, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_ENHANCED_FLOW_CONTROL_GET(_R) USBDP_PCS_REG_GET(_R, 20, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYMBOL_ALIGNER_TYPE_B_MSK USBDP_PCS_REG_MSK(21, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYMBOL_ALIGNER_TYPE_B_CLR USBDP_PCS_REG_CLR(21, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYMBOL_ALIGNER_TYPE_B_SET(_x) USBDP_PCS_REG_SET(_x, 21, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYMBOL_ALIGNER_TYPE_B_GET(_R) USBDP_PCS_REG_GET(_R, 21, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_BLOCK_ALIGNER_TYPE_B_MSK USBDP_PCS_REG_MSK(22, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_BLOCK_ALIGNER_TYPE_B_CLR USBDP_PCS_REG_CLR(22, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_BLOCK_ALIGNER_TYPE_B_SET(_x) USBDP_PCS_REG_SET(_x, 22, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_BLOCK_ALIGNER_TYPE_B_GET(_R) USBDP_PCS_REG_GET(_R, 22, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DFE_ADAP_MODE_MSK USBDP_PCS_REG_MSK(24, 2)
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#define USBDP_PCS_RX_RX_CONTROL_DFE_ADAP_MODE_CLR USBDP_PCS_REG_CLR(24, 2)
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#define USBDP_PCS_RX_RX_CONTROL_DFE_ADAP_MODE_SET(_x) USBDP_PCS_REG_SET(_x, 24, 2)
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#define USBDP_PCS_RX_RX_CONTROL_DFE_ADAP_MODE_GET(_R) USBDP_PCS_REG_GET(_R, 24, 2)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYNC_RX_LFPS_DET_MSK USBDP_PCS_REG_MSK(28, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYNC_RX_LFPS_DET_CLR USBDP_PCS_REG_CLR(28, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYNC_RX_LFPS_DET_SET(_x) USBDP_PCS_REG_SET(_x, 28, 1)
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#define USBDP_PCS_RX_RX_CONTROL_EN_SYNC_RX_LFPS_DET_GET(_R) USBDP_PCS_REG_GET(_R, 28, 1)
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#define EXYNOS_USBDP_PCS_RX_RX_CONTROL_DEBUG (0x03F4)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_NUM_COM_FOUND_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_NUM_COM_FOUND_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_NUM_COM_FOUND_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_NUM_COM_FOUND_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_DISABLE_MULTI_COM_FOUND_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_DISABLE_MULTI_COM_FOUND_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_DISABLE_MULTI_COM_FOUND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_DISABLE_MULTI_COM_FOUND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_TS_CHECK_MSK USBDP_PCS_REG_MSK(5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_TS_CHECK_CLR USBDP_PCS_REG_CLR(5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_TS_CHECK_SET(_x) USBDP_PCS_REG_SET(_x, 5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_TS_CHECK_GET(_R) USBDP_PCS_REG_GET(_R, 5, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_FLOW_VALID_CTRL_MSK USBDP_PCS_REG_MSK(6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_FLOW_VALID_CTRL_CLR USBDP_PCS_REG_CLR(6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_FLOW_VALID_CTRL_SET(_x) USBDP_PCS_REG_SET(_x, 6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_FLOW_VALID_CTRL_GET(_R) USBDP_PCS_REG_GET(_R, 6, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LOOPBACK_DELAY_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LOOPBACK_DELAY_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LOOPBACK_DELAY_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LOOPBACK_DELAY_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LFPS_COMPENSATION_OFF_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LFPS_COMPENSATION_OFF_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LFPS_COMPENSATION_OFF_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_LFPS_COMPENSATION_OFF_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_ALIGN_SHIFT_DETECT_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_ALIGN_SHIFT_DETECT_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_ALIGN_SHIFT_DETECT_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_RX_RX_CONTROL_DEBUG_EN_ALIGN_SHIFT_DETECT_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define EXYNOS_USBDP_PCS_TX_MODE_VEC (0x0200)
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#define USBDP_PCS_TX_MODE_VEC_TX_INVERSION_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_TX_MODE_VEC_TX_INVERSION_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_TX_MODE_VEC_TX_INVERSION_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_TX_MODE_VEC_TX_INVERSION_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define EXYNOS_USBDP_PCS_TX_ONES_ZEROS (0x0204)
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#define USBDP_PCS_TX_ONES_ZEROS_HALF_PERIOD_MSK USBDP_PCS_REG_MSK(0, 5)
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#define USBDP_PCS_TX_ONES_ZEROS_HALF_PERIOD_CLR USBDP_PCS_REG_CLR(0, 5)
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#define USBDP_PCS_TX_ONES_ZEROS_HALF_PERIOD_SET(_x) USBDP_PCS_REG_SET(_x, 0, 5)
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#define USBDP_PCS_TX_ONES_ZEROS_HALF_PERIOD_GET(_R) USBDP_PCS_REG_GET(_R, 0, 5)
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#define USBDP_PCS_TX_ONES_ZEROS_START_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_TX_ONES_ZEROS_START_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_TX_ONES_ZEROS_START_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_TX_ONES_ZEROS_START_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_TX_ONES_ZEROS_IN_PROGRESS_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_TX_ONES_ZEROS_IN_PROGRESS_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_TX_ONES_ZEROS_IN_PROGRESS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_TX_ONES_ZEROS_IN_PROGRESS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define EXYNOS_USBDP_PCS_TX_NUM_BIST_OS (0x0210)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_EIEOS_MSK USBDP_PCS_REG_MSK(0, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_EIEOS_CLR USBDP_PCS_REG_CLR(0, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_EIEOS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_EIEOS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_SKP_OS_MSK USBDP_PCS_REG_MSK(8, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_SKP_OS_CLR USBDP_PCS_REG_CLR(8, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_SKP_OS_SET(_x) USBDP_PCS_REG_SET(_x, 8, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_SYM_SKP_OS_GET(_R) USBDP_PCS_REG_GET(_R, 8, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_EIEOS_MSK USBDP_PCS_REG_MSK(16, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_EIEOS_CLR USBDP_PCS_REG_CLR(16, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_EIEOS_SET(_x) USBDP_PCS_REG_SET(_x, 16, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_EIEOS_GET(_R) USBDP_PCS_REG_GET(_R, 16, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_SKP_OS_MSK USBDP_PCS_REG_MSK(24, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_SKP_OS_CLR USBDP_PCS_REG_CLR(24, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_SKP_OS_SET(_x) USBDP_PCS_REG_SET(_x, 24, 5)
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#define USBDP_PCS_TX_NUM_BIST_OS_NUM_BLK_SKP_OS_GET(_R) USBDP_PCS_REG_GET(_R, 24, 5)
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#define EXYNOS_USBDP_PCS_TX_NUM_BIST_TSEQ (0x0214)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_SYM_TSEQ_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_SYM_TSEQ_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_SYM_TSEQ_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_SYM_TSEQ_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_BLK_TSEQ_MSK USBDP_PCS_REG_MSK(16, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_BLK_TSEQ_CLR USBDP_PCS_REG_CLR(16, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_BLK_TSEQ_SET(_x) USBDP_PCS_REG_SET(_x, 16, 8)
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#define USBDP_PCS_TX_NUM_BIST_TSEQ_NUM_BLK_TSEQ_GET(_R) USBDP_PCS_REG_GET(_R, 16, 8)
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#define EXYNOS_USBDP_PCS_TX_BIST_DATA (0x0218)
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#define USBDP_PCS_TX_BIST_DATA_SIZE_CHUNK_MSK USBDP_PCS_REG_MSK(0, 12)
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#define USBDP_PCS_TX_BIST_DATA_SIZE_CHUNK_CLR USBDP_PCS_REG_CLR(0, 12)
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#define USBDP_PCS_TX_BIST_DATA_SIZE_CHUNK_SET(_x) USBDP_PCS_REG_SET(_x, 0, 12)
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#define USBDP_PCS_TX_BIST_DATA_SIZE_CHUNK_GET(_R) USBDP_PCS_REG_GET(_R, 0, 12)
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#define USBDP_PCS_TX_BIST_DATA_INJECT_ERROR_MSK USBDP_PCS_REG_MSK(15, 1)
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#define USBDP_PCS_TX_BIST_DATA_INJECT_ERROR_CLR USBDP_PCS_REG_CLR(15, 1)
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#define USBDP_PCS_TX_BIST_DATA_INJECT_ERROR_SET(_x) USBDP_PCS_REG_SET(_x, 15, 1)
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#define USBDP_PCS_TX_BIST_DATA_INJECT_ERROR_GET(_R) USBDP_PCS_REG_GET(_R, 15, 1)
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#define USBDP_PCS_TX_BIST_DATA_NUM_CHUNK_MSK USBDP_PCS_REG_MSK(16, 5)
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#define USBDP_PCS_TX_BIST_DATA_NUM_CHUNK_CLR USBDP_PCS_REG_CLR(16, 5)
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#define USBDP_PCS_TX_BIST_DATA_NUM_CHUNK_SET(_x) USBDP_PCS_REG_SET(_x, 16, 5)
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#define USBDP_PCS_TX_BIST_DATA_NUM_CHUNK_GET(_R) USBDP_PCS_REG_GET(_R, 16, 5)
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#define EXYNOS_USBDP_PCS_TX_BIST_ERR_INJECTION (0x021C)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_START_MSK USBDP_PCS_REG_MSK(0, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_START_CLR USBDP_PCS_REG_CLR(0, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_START_SET(_x) USBDP_PCS_REG_SET(_x, 0, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_START_GET(_R) USBDP_PCS_REG_GET(_R, 0, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_LAST_MSK USBDP_PCS_REG_MSK(16, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_LAST_CLR USBDP_PCS_REG_CLR(16, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_LAST_SET(_x) USBDP_PCS_REG_SET(_x, 16, 12)
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#define USBDP_PCS_TX_BIST_ERR_INJECTION_IDX_LAST_GET(_R) USBDP_PCS_REG_GET(_R, 16, 12)
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#define EXYNOS_USBDP_PCS_BASE_VERSION (0x0000)
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#define USBDP_PCS_BASE_VERSION_VERSION_MSK USBDP_PCS_REG_MSK(0, 32)
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#define USBDP_PCS_BASE_VERSION_VERSION_CLR USBDP_PCS_REG_CLR(0, 32)
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#define USBDP_PCS_BASE_VERSION_VERSION_SET(_x) USBDP_PCS_REG_SET(_x, 0, 32)
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#define USBDP_PCS_BASE_VERSION_VERSION_GET(_R) USBDP_PCS_REG_GET(_R, 0, 32)
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#define EXYNOS_USBDP_PCS_BASE_LANE_MAP (0x0004)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_0_MSK USBDP_PCS_REG_MSK(0, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_0_CLR USBDP_PCS_REG_CLR(0, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_0_SET(_x) USBDP_PCS_REG_SET(_x, 0, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_0_GET(_R) USBDP_PCS_REG_GET(_R, 0, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_1_MSK USBDP_PCS_REG_MSK(1, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_1_CLR USBDP_PCS_REG_CLR(1, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_1_SET(_x) USBDP_PCS_REG_SET(_x, 1, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_1_GET(_R) USBDP_PCS_REG_GET(_R, 1, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_2_MSK USBDP_PCS_REG_MSK(2, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_2_CLR USBDP_PCS_REG_CLR(2, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_2_SET(_x) USBDP_PCS_REG_SET(_x, 2, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_2_GET(_R) USBDP_PCS_REG_GET(_R, 2, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_3_MSK USBDP_PCS_REG_MSK(3, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_3_CLR USBDP_PCS_REG_CLR(3, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_3_SET(_x) USBDP_PCS_REG_SET(_x, 3, 1)
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#define USBDP_PCS_BASE_LANE_MAP_SEL_LINK_3_GET(_R) USBDP_PCS_REG_GET(_R, 3, 1)
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#define EXYNOS_USBDP_PCS_LEQ_LEQ_MODE_VEC (0x0400)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_CTLE_IDX_MSK USBDP_PCS_REG_MSK(0, 3)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_CTLE_IDX_CLR USBDP_PCS_REG_CLR(0, 3)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_CTLE_IDX_SET(_x) USBDP_PCS_REG_SET(_x, 0, 3)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_CTLE_IDX_GET(_R) USBDP_PCS_REG_GET(_R, 0, 3)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_HOP_IDX_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_HOP_IDX_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_HOP_IDX_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_LAST_HOP_IDX_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_DIR_CHANGE_MSK USBDP_PCS_REG_MSK(7, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_DIR_CHANGE_CLR USBDP_PCS_REG_CLR(7, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_DIR_CHANGE_SET(_x) USBDP_PCS_REG_SET(_x, 7, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_DIR_CHANGE_GET(_R) USBDP_PCS_REG_GET(_R, 7, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_INVALIDATE_AXIS_MSK USBDP_PCS_REG_MSK(8, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_INVALIDATE_AXIS_CLR USBDP_PCS_REG_CLR(8, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_INVALIDATE_AXIS_SET(_x) USBDP_PCS_REG_SET(_x, 8, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_INVALIDATE_AXIS_GET(_R) USBDP_PCS_REG_GET(_R, 8, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_AVOID_REDUNDANT_MEASURE_MSK USBDP_PCS_REG_MSK(9, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_AVOID_REDUNDANT_MEASURE_CLR USBDP_PCS_REG_CLR(9, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_AVOID_REDUNDANT_MEASURE_SET(_x) USBDP_PCS_REG_SET(_x, 9, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_AVOID_REDUNDANT_MEASURE_GET(_R) USBDP_PCS_REG_GET(_R, 9, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_FOM_TARGET_MSK USBDP_PCS_REG_MSK(10, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_FOM_TARGET_CLR USBDP_PCS_REG_CLR(10, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_FOM_TARGET_SET(_x) USBDP_PCS_REG_SET(_x, 10, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_EN_FOM_TARGET_GET(_R) USBDP_PCS_REG_GET(_R, 10, 1)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_FOM_TARGET_MSK USBDP_PCS_REG_MSK(16, 8)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_FOM_TARGET_CLR USBDP_PCS_REG_CLR(16, 8)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_FOM_TARGET_SET(_x) USBDP_PCS_REG_SET(_x, 16, 8)
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#define USBDP_PCS_LEQ_LEQ_MODE_VEC_FOM_TARGET_GET(_R) USBDP_PCS_REG_GET(_R, 16, 8)
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#define EXYNOS_USBDP_PCS_LEQ_FORCE_CTLE_IDX (0x0404)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_CTLE_IDX_MSK USBDP_PCS_REG_MSK(0, 3)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_CTLE_IDX_CLR USBDP_PCS_REG_CLR(0, 3)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_CTLE_IDX_SET(_x) USBDP_PCS_REG_SET(_x, 0, 3)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_CTLE_IDX_GET(_R) USBDP_PCS_REG_GET(_R, 0, 3)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_EN_FORCE_MSK USBDP_PCS_REG_MSK(4, 1)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_EN_FORCE_CLR USBDP_PCS_REG_CLR(4, 1)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_EN_FORCE_SET(_x) USBDP_PCS_REG_SET(_x, 4, 1)
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#define USBDP_PCS_LEQ_FORCE_CTLE_IDX_EN_FORCE_GET(_R) USBDP_PCS_REG_GET(_R, 4, 1)
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#define EXYNOS_USBDP_PCS_LEQ_LOCAL_COEF (0x040C)
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#define USBDP_PCS_LEQ_LOCAL_COEF_FS_MSK USBDP_PCS_REG_MSK(0, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_FS_CLR USBDP_PCS_REG_CLR(0, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_FS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_FS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_LF_MSK USBDP_PCS_REG_MSK(8, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_LF_CLR USBDP_PCS_REG_CLR(8, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_LF_SET(_x) USBDP_PCS_REG_SET(_x, 8, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_LF_GET(_R) USBDP_PCS_REG_GET(_R, 8, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_PMA_CENTER_COEF_MSK USBDP_PCS_REG_MSK(16, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_PMA_CENTER_COEF_CLR USBDP_PCS_REG_CLR(16, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_PMA_CENTER_COEF_SET(_x) USBDP_PCS_REG_SET(_x, 16, 6)
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#define USBDP_PCS_LEQ_LOCAL_COEF_PMA_CENTER_COEF_GET(_R) USBDP_PCS_REG_GET(_R, 16, 6)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_0 (0x0410)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_0_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_0_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_0_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_0_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_1 (0x0414)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_1_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_1_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_1_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_1_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_2 (0x0418)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_2_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_2_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_2_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_2_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_3 (0x041C)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_3_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_3_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_3_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_3_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_4 (0x0420)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_4_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_4_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_4_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_4_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_5 (0x0424)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_5_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_5_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_5_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_5_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_6 (0x0428)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_6_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_6_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_6_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_6_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_HS_TX_COEF_MAP_7 (0x042C)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_7_LEVEL_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_7_LEVEL_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_7_LEVEL_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_HS_TX_COEF_MAP_7_LEVEL_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_0 (0x0430)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_0_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_0_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_0_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_0_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_1 (0x0434)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_1_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_1_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_1_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_1_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_2 (0x0438)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_2_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_2_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_2_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_2_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_3 (0x043C)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_3_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_3_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_3_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_3_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_4 (0x0440)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_4_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_4_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_4_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_4_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_5 (0x0444)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_5_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_5_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_5_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_5_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_6 (0x0448)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_6_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_6_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_6_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_6_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_7 (0x044C)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_7_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_7_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_7_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_7_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_8 (0x0450)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_8_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_8_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_8_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_8_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_9 (0x0454)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_9_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_9_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_9_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_9_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_10 (0x0458)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_10_PRESETS_MSK USBDP_PCS_REG_MSK(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_10_PRESETS_CLR USBDP_PCS_REG_CLR(0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_10_PRESETS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 18)
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#define USBDP_PCS_LEQ_SS_TX_COEF_PRESETS_10_PRESETS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 18)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0 (0x0470)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_0_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1 (0x0474)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_1_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2 (0x0478)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_2_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3 (0x047C)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_3_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4 (0x0480)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_4_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5 (0x0484)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_5_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6 (0x0488)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_6_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7 (0x048C)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_FIRST_MSK USBDP_PCS_REG_MSK(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_FIRST_CLR USBDP_PCS_REG_CLR(0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_FIRST_SET(_x) USBDP_PCS_REG_SET(_x, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_FIRST_GET(_R) USBDP_PCS_REG_GET(_R, 0, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_SECOND_MSK USBDP_PCS_REG_MSK(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_SECOND_CLR USBDP_PCS_REG_CLR(4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_SECOND_SET(_x) USBDP_PCS_REG_SET(_x, 4, 4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_HINT_7_SECOND_GET(_R) USBDP_PCS_REG_GET(_R, 4, 4)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_0 (0x0490)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_0_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_0_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_0_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_0_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_1 (0x0494)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_1_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_1_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_1_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_1_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_2 (0x0498)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_2_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_2_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_2_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_2_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_3 (0x049C)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_3_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_3_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_3_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_3_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_4 (0x04A0)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_4_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_4_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_4_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_4_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_5 (0x04A4)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_5_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_5_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_5_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_5_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_6 (0x04A8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_6_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_6_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_6_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_6_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#define EXYNOS_USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_7 (0x04AC)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_7_CTLE_RS_MSK USBDP_PCS_REG_MSK(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_7_CTLE_RS_CLR USBDP_PCS_REG_CLR(0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_7_CTLE_RS_SET(_x) USBDP_PCS_REG_SET(_x, 0, 8)
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#define USBDP_PCS_LEQ_SS_CTLE_MAP_BY_EQ_EVAL_7_CTLE_RS_GET(_R) USBDP_PCS_REG_GET(_R, 0, 8)
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#endif /* DEV_USB_PHY_EXYNOS_USBDP_GEN2_V4_PHY_EXYNOS_USBDP_GEN2_V4_REG_PCS_H_ */
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