81 lines
1.8 KiB
C
Executable file
81 lines
1.8 KiB
C
Executable file
/**
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* i2c-exynos5.h - Samsung Exynos5 I2C Controller Driver Header file
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*
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* Copyright (C) 2015 Samsung Electronics Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __I2C_EXYNOS5_H
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#define __I2C_EXYNOS5_H
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struct exynos5_i2c {
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struct list_head node;
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struct i2c_adapter adap;
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unsigned int need_hw_init;
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unsigned int suspended:1;
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struct i2c_msg *msg;
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struct completion msg_complete;
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unsigned int msg_ptr;
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unsigned int msg_len;
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unsigned int irq;
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struct cpumask affinity_hint;
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bool use_all_core;
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void __iomem *regs;
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struct clk *clk;
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struct clk *rate_clk;
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struct device *dev;
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int state;
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struct regmap *usi_reg;
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unsigned int usi_offset;
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/*
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* Since the TRANS_DONE bit is cleared on read, and we may read it
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* either during an IRQ or after a transaction, keep track of its
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* state here.
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*/
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int trans_done;
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/* Controller operating frequency */
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unsigned int fs_clock;
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unsigned int hs_clock;
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unsigned int fs_plus_clock;
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unsigned int stand_clock;
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unsigned int clock_frequency;
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unsigned int tscl_h;
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unsigned int tscl_l;
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/* to set the source clock */
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unsigned int default_clk;
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/*
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* HSI2C Controller can operate in
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* 1. High speed upto 3.4Mbps
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* 2. Fast speed upto 1Mbps
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*/
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int speed_mode;
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int operation_mode;
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int bus_id;
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int scl_clk_stretch;
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int stop_after_trans;
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unsigned int transfer_delay;
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int idle_ip_index;
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int reset_before_trans;
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unsigned int runtime_resumed;
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int nack_restart;
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unsigned int autosuspend_delay;
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unsigned int xfer_timeout_ms;
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unsigned int filter_cycle;
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/*
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* Disable the lose arbitration.
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*/
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int is_no_arbitration;
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};
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#endif /*__I2C_EXYNOS5_H */
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