0a960ba529
This is a simple IRQ balancer that polls every X number of milliseconds and moves IRQs from the most interrupt-heavy CPU to the least interrupt-heavy CPUs until the heaviest CPU is no longer the heaviest. IRQs are only moved from one source CPU to any number of destination CPUs per balance run. Balancing is skipped if the gap between the most interrupt-heavy CPU and the least interrupt-heavy CPU is below the configured threshold of interrupts. The heaviest IRQs are targeted for migration in order to reduce the number of IRQs to migrate. If moving an IRQ would reduce overall balance, then it won't be migrated. The most interrupt-heavy CPU is calculated by scaling the number of new interrupts on that CPU to the CPU's current capacity. This way, interrupt heaviness takes into account factors such as thermal pressure and time spent processing interrupts rather than just the sheer number of them. This also makes SBalance aware of CPU asymmetry, where different CPUs can have different performance capacities and be proportionally balanced. Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com>
204 lines
5.2 KiB
Text
Executable file
204 lines
5.2 KiB
Text
Executable file
# SPDX-License-Identifier: GPL-2.0-only
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menu "IRQ subsystem"
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# Options selectable by the architecture code
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# Make sparse irq Kconfig switch below available
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config MAY_HAVE_SPARSE_IRQ
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bool
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# Legacy support, required for itanic
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config GENERIC_IRQ_LEGACY
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bool
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# Enable the generic irq autoprobe mechanism
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config GENERIC_IRQ_PROBE
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bool
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# Use the generic /proc/interrupts implementation
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config GENERIC_IRQ_SHOW
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bool
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# Print level/edge extra information
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config GENERIC_IRQ_SHOW_LEVEL
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bool
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# Supports effective affinity mask
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config GENERIC_IRQ_EFFECTIVE_AFF_MASK
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bool
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# Facility to allocate a hardware interrupt. This is legacy support
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# and should not be used in new code. Use irq domains instead.
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config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
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bool
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# Support for delayed migration from interrupt context
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config GENERIC_PENDING_IRQ
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bool
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# Support for generic irq migrating off cpu before the cpu is offline.
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config GENERIC_IRQ_MIGRATION
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bool
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# Alpha specific irq affinity mechanism
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config AUTO_IRQ_AFFINITY
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bool
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# Interrupt injection mechanism
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config GENERIC_IRQ_INJECTION
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bool
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# Tasklet based software resend for pending interrupts on enable_irq()
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config HARDIRQS_SW_RESEND
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bool
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# Edge style eoi based handler (cell)
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config IRQ_EDGE_EOI_HANDLER
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bool
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# Generic configurable interrupt chip implementation
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config GENERIC_IRQ_CHIP
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bool
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select IRQ_DOMAIN
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# Generic irq_domain hw <--> linux irq number translation
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config IRQ_DOMAIN
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bool
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# Support for simulated interrupts
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config IRQ_SIM
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bool
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select IRQ_WORK
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select IRQ_DOMAIN
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# Support for hierarchical irq domains
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config IRQ_DOMAIN_HIERARCHY
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bool
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select IRQ_DOMAIN
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# Support for hierarchical fasteoi+edge and fasteoi+level handlers
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config IRQ_FASTEOI_HIERARCHY_HANDLERS
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bool
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# Generic IRQ IPI support
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config GENERIC_IRQ_IPI
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bool
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depends on SMP
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select IRQ_DOMAIN_HIERARCHY
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# Generic MSI interrupt support
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config GENERIC_MSI_IRQ
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bool
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# Generic MSI hierarchical interrupt domain support
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config GENERIC_MSI_IRQ_DOMAIN
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bool
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_MSI_IRQ
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config IRQ_MSI_IOMMU
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bool
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config HANDLE_DOMAIN_IRQ
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bool
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config IRQ_TIMINGS
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bool
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config GENERIC_IRQ_MATRIX_ALLOCATOR
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bool
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config GENERIC_IRQ_RESERVATION_MODE
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bool
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config ARCH_WANTS_IRQ_RAW
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bool
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# Support forced irq threading
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config IRQ_FORCED_THREADING
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bool
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config SPARSE_IRQ
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bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
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help
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Sparse irq numbering is useful for distro kernels that want
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to define a high CONFIG_NR_CPUS value but still want to have
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low kernel memory footprint on smaller machines.
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( Sparse irqs can also be beneficial on NUMA boxes, as they spread
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out the interrupt descriptors in a more NUMA-friendly way. )
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If you don't know what to do here, say N.
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config GENERIC_IRQ_DEBUGFS
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bool "Expose irq internals in debugfs"
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depends on DEBUG_FS
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select GENERIC_IRQ_INJECTION
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default n
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help
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Exposes internal state information through debugfs. Mostly for
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developers and debugging of hard to diagnose interrupt problems.
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If you don't know what to do here, say N.
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config IRQ_SBALANCE
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bool "SBalance IRQ balancer"
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depends on SMP
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default n
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help
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This is a simple IRQ balancer that polls every X number of
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milliseconds and moves IRQs from the most interrupt-heavy CPU to the
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least interrupt-heavy CPUs until the heaviest CPU is no longer the
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heaviest. IRQs are only moved from one source CPU to any number of
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destination CPUs per balance run. Balancing is skipped if the gap
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between the most interrupt-heavy CPU and the least interrupt-heavy CPU
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is below the configured threshold of interrupts.
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The heaviest IRQs are targeted for migration in order to reduce the
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number of IRQs to migrate. If moving an IRQ would reduce overall
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balance, then it won't be migrated.
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The most interrupt-heavy CPU is calculated by scaling the number of
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new interrupts on that CPU to the CPU's current capacity. This way,
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interrupt heaviness takes into account factors such as thermal
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pressure and time spent processing interrupts rather than just the
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sheer number of them. This also makes SBalance aware of CPU asymmetry,
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where different CPUs can have different performance capacities and be
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proportionally balanced.
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if IRQ_SBALANCE
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config IRQ_SBALANCE_POLL_MSEC
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int "Polling interval in milliseconds"
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default 3000
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help
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Perform IRQ balancing every X milliseconds.
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config IRQ_SBALANCE_THRESH
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int "Balance threshold in number of interrupts"
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default 1024
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help
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There needs to be a difference of at least this many new interrupts
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between the heaviest and least-heavy CPUs during the last polling
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window in order for balancing to occur. This is to avoid balancing
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when the system is quiet.
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This threshold is compared to the _scaled_ interrupt counts per CPU;
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i.e., the number of interrupts scaled to the CPU's capacity.
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config SBALANCE_EXCLUDE_CPUS
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string "CPUs to exclude from balancing"
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help
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Comma-separated list of CPUs to exclude from IRQ balancing.
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For example, to ignore CPU0, CPU1, and CPU2, it is valid to provide
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"0,1-2" or "0-2" or "0,1,2".
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endif
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endmenu
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config GENERIC_IRQ_MULTI_HANDLER
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bool
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help
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Allow to specify the low level IRQ handler at run time.
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