kernel_samsung_a53x/drivers/net/wireless/realtek/rtlwifi/rtl8821ae
Su Hui b8d8eecb07 wifi: rtlwifi: rtl8821ae: phy: fix an undefined bitwise shift behavior
[ Upstream commit bc8263083af60e7e57c6120edbc1f75d6c909a35 ]

Clang static checker warns:

drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c:184:49:
	The result of the left shift is undefined due to shifting by '32',
	which is greater or equal to the width of type 'u32'.
	[core.UndefinedBinaryOperatorResult]

If the value of the right operand is negative or is greater than or
equal to the width of the promoted left operand, the behavior is
undefined.[1][2]

For example, when using different gcc's compilation optimization options
(-O0 or -O2), the result of '(u32)data << 32' is different. One is 0, the
other is old value of data. Let _rtl8821ae_phy_calculate_bit_shift()'s
return value less than 32 to fix this problem. Warn if bitmask is zero.

[1] https://stackoverflow.com/questions/11270492/what-does-the-c-standard-say-about-bitshifting-more-bits-than-the-width-of-type
[2] https://www.open-std.org/jtc1/sc22/wg14/www/docs/n1256.pdf

Fixes: 21e4b0726dc6 ("rtlwifi: rtl8821ae: Move driver from staging to regular tree")
Signed-off-by: Su Hui <suhui@nfschina.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231127013511.26694-2-suhui@nfschina.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-18 12:12:28 +01:00
..
def.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
dm.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
dm.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
fw.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
fw.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
hw.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
hw.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
led.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
led.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Makefile Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
phy.c wifi: rtlwifi: rtl8821ae: phy: fix an undefined bitwise shift behavior 2024-11-18 12:12:28 +01:00
phy.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pwrseq.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pwrseq.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
reg.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
rf.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
rf.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
sw.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
table.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
table.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
trx.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
trx.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00