2912 lines
72 KiB
Text
Executable file
2912 lines
72 KiB
Text
Executable file
/dts-v1/;
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/ {
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compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
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interrupt-parent = <0x01>;
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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model = "HiKey960";
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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cpus {
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#address-cells = <0x02>;
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#size-cells = <0x00>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <0x02>;
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};
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core1 {
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cpu = <0x03>;
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};
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core2 {
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cpu = <0x04>;
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};
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core3 {
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cpu = <0x05>;
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};
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};
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cluster1 {
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core0 {
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cpu = <0x06>;
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};
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core1 {
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cpu = <0x07>;
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};
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core2 {
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cpu = <0x08>;
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};
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core3 {
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cpu = <0x09>;
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};
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};
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};
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cpu@0 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x00>;
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enable-method = "psci";
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next-level-cache = <0x0a>;
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cpu-idle-states = <0x0b 0x0c>;
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capacity-dmips-mhz = <0x250>;
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clocks = <0x0d 0x00>;
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operating-points-v2 = <0x0e>;
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#cooling-cells = <0x02>;
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dynamic-power-coefficient = <0x6e>;
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phandle = <0x02>;
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};
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cpu@1 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x01>;
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enable-method = "psci";
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next-level-cache = <0x0a>;
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cpu-idle-states = <0x0b 0x0c>;
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capacity-dmips-mhz = <0x250>;
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clocks = <0x0d 0x00>;
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operating-points-v2 = <0x0e>;
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#cooling-cells = <0x02>;
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phandle = <0x03>;
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};
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cpu@2 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x02>;
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enable-method = "psci";
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next-level-cache = <0x0a>;
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cpu-idle-states = <0x0b 0x0c>;
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capacity-dmips-mhz = <0x250>;
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clocks = <0x0d 0x00>;
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operating-points-v2 = <0x0e>;
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#cooling-cells = <0x02>;
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phandle = <0x04>;
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};
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cpu@3 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00 0x03>;
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enable-method = "psci";
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next-level-cache = <0x0a>;
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cpu-idle-states = <0x0b 0x0c>;
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capacity-dmips-mhz = <0x250>;
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clocks = <0x0d 0x00>;
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operating-points-v2 = <0x0e>;
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#cooling-cells = <0x02>;
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phandle = <0x05>;
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};
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cpu@100 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x100>;
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enable-method = "psci";
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next-level-cache = <0x0f>;
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cpu-idle-states = <0x10 0x11>;
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capacity-dmips-mhz = <0x400>;
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clocks = <0x0d 0x01>;
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operating-points-v2 = <0x12>;
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#cooling-cells = <0x02>;
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dynamic-power-coefficient = <0x226>;
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phandle = <0x06>;
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};
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cpu@101 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x101>;
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enable-method = "psci";
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next-level-cache = <0x0f>;
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cpu-idle-states = <0x10 0x11>;
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capacity-dmips-mhz = <0x400>;
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clocks = <0x0d 0x01>;
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operating-points-v2 = <0x12>;
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#cooling-cells = <0x02>;
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phandle = <0x07>;
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};
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cpu@102 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x102>;
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enable-method = "psci";
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next-level-cache = <0x0f>;
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cpu-idle-states = <0x10 0x11>;
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capacity-dmips-mhz = <0x400>;
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clocks = <0x0d 0x01>;
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operating-points-v2 = <0x12>;
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#cooling-cells = <0x02>;
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phandle = <0x08>;
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};
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cpu@103 {
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compatible = "arm,cortex-a73";
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device_type = "cpu";
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reg = <0x00 0x103>;
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enable-method = "psci";
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next-level-cache = <0x0f>;
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cpu-idle-states = <0x10 0x11>;
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capacity-dmips-mhz = <0x400>;
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clocks = <0x0d 0x01>;
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operating-points-v2 = <0x12>;
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#cooling-cells = <0x02>;
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phandle = <0x09>;
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};
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idle-states {
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entry-method = "psci";
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cpu-sleep-0 {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x10000>;
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entry-latency-us = <0x190>;
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exit-latency-us = <0x28a>;
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min-residency-us = <0x5dc>;
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phandle = <0x0b>;
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};
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cluster-sleep-0 {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x1010000>;
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entry-latency-us = <0x1f4>;
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exit-latency-us = <0x640>;
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min-residency-us = <0xdac>;
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phandle = <0x0c>;
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};
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cpu-sleep-1 {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x10000>;
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entry-latency-us = <0x190>;
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exit-latency-us = <0x226>;
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min-residency-us = <0x5dc>;
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phandle = <0x10>;
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};
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cluster-sleep-1 {
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compatible = "arm,idle-state";
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local-timer-stop;
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arm,psci-suspend-param = <0x1010000>;
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entry-latency-us = <0x320>;
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exit-latency-us = <0xb54>;
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min-residency-us = <0xdac>;
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phandle = <0x11>;
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};
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};
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l2-cache0 {
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compatible = "cache";
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phandle = <0x0a>;
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};
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l2-cache1 {
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compatible = "cache";
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phandle = <0x0f>;
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};
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};
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opp_table0 {
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compatible = "operating-points-v2";
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opp-shared;
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phandle = <0x0e>;
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opp00 {
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opp-hz = <0x00 0x1fc4ef40>;
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opp-microvolt = <0xaae60>;
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clock-latency-ns = <0x493e0>;
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};
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opp01 {
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opp-hz = <0x00 0x3b8b87c0>;
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opp-microvolt = "", "\f5";
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clock-latency-ns = <0x493e0>;
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};
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opp02 {
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opp-hz = <0x00 0x5390d280>;
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opp-microvolt = <0xdbba0>;
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clock-latency-ns = <0x493e0>;
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};
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opp03 {
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opp-hz = <0x00 0x65dd4540>;
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opp-microvolt = <0xf4240>;
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clock-latency-ns = <0x493e0>;
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};
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opp04 {
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opp-hz = <0x00 0x6de93500>;
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opp-microvolt = <0x10c8e0>;
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clock-latency-ns = <0x493e0>;
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};
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};
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opp_table1 {
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compatible = "operating-points-v2";
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opp-shared;
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phandle = <0x12>;
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opp10 {
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opp-hz = <0x00 0x35d2afc0>;
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opp-microvolt = <0xaae60>;
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clock-latency-ns = <0x493e0>;
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};
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opp11 {
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opp-hz = <0x00 0x54b2bd40>;
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opp-microvolt = "", "\f5";
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clock-latency-ns = <0x493e0>;
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};
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opp12 {
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opp-hz = <0x00 0x6b961d40>;
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opp-microvolt = <0xdbba0>;
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clock-latency-ns = <0x493e0>;
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};
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opp13 {
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opp-hz = <0x00 0x7de29000>;
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opp-microvolt = <0xf4240>;
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clock-latency-ns = <0x493e0>;
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};
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opp14 {
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opp-hz = <0x00 0x8cc94280>;
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opp-microvolt = <0x10c8e0>;
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clock-latency-ns = <0x493e0>;
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};
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};
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interrupt-controller@e82b0000 {
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compatible = "arm,gic-400";
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reg = <0x00 0xe82b1000 0x00 0x1000 0x00 0xe82b2000 0x00 0x2000 0x00 0xe82b4000 0x00 0x2000 0x00 0xe82b6000 0x00 0x2000>;
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#address-cells = <0x00>;
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#interrupt-cells = <0x03>;
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interrupt-controller;
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interrupts = <0x01 0x09 0xff04>;
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phandle = <0x01>;
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};
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a53-pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04>;
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interrupt-affinity = <0x02 0x03 0x04 0x05>;
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};
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a73-pmu {
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compatible = "arm,cortex-a73-pmu";
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interrupts = <0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04>;
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interrupt-affinity = <0x06 0x07 0x08 0x09>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <0x01>;
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interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <0x02>;
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#size-cells = <0x02>;
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ranges;
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crg_ctrl@fff35000 {
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compatible = "hisilicon,hi3660-crgctrl", "syscon";
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reg = <0x00 0xfff35000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x13>;
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};
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crg_rst_controller {
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compatible = "hisilicon,hi3660-reset";
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#reset-cells = <0x02>;
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hisi,rst-syscon = <0x13>;
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phandle = <0x24>;
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};
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pctrl@e8a09000 {
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compatible = "hisilicon,hi3660-pctrl", "syscon";
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reg = <0x00 0xe8a09000 0x00 0x2000>;
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#clock-cells = <0x01>;
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phandle = <0x52>;
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};
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crg_ctrl@fff34000 {
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compatible = "hisilicon,hi3660-pmuctrl", "syscon";
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reg = <0x00 0xfff34000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x89>;
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};
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sctrl@fff0a000 {
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compatible = "hisilicon,hi3660-sctrl", "syscon";
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reg = <0x00 0xfff0a000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x3e>;
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};
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iomcu@ffd7e000 {
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compatible = "hisilicon,hi3660-iomcu", "syscon";
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reg = <0x00 0xffd7e000 0x00 0x1000>;
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#clock-cells = <0x01>;
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phandle = <0x14>;
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};
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reset {
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compatible = "hisilicon,hi3660-reset";
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hisi,rst-syscon = <0x14>;
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#reset-cells = <0x02>;
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phandle = <0x16>;
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};
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mailbox@e896b000 {
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compatible = "hisilicon,hi3660-mbox";
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reg = <0x00 0xe896b000 0x00 0x1000>;
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interrupts = <0x00 0xc0 0x04 0x00 0xc1 0x04>;
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#mbox-cells = <0x03>;
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phandle = <0x15>;
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};
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stub_clock@e896b500 {
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compatible = "hisilicon,hi3660-stub-clk";
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reg = <0x00 0xe896b500 0x00 0x100>;
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#clock-cells = <0x01>;
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mboxes = <0x15 0x0d 0x03 0x00>;
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phandle = <0x0d>;
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};
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timer@fff14000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x00 0xfff14000 0x00 0x1000>;
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interrupts = <0x00 0x30 0x04 0x00 0x31 0x04>;
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clocks = <0x13 0x0b 0x13 0x0b 0x13 0x0b>;
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clock-names = "timer1", "timer2", "apb_pclk";
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phandle = <0x8a>;
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};
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i2c@ffd71000 {
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compatible = "snps,designware-i2c";
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reg = <0x00 0xffd71000 0x00 0x1000>;
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interrupts = <0x00 0x76 0x04>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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clock-frequency = <0x61a80>;
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clocks = <0x13 0x11>;
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resets = <0x16 0x20 0x03>;
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pinctrl-names = "default";
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pinctrl-0 = <0x17 0x18>;
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status = "okay";
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label = "LS-I2C0";
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phandle = <0x8b>;
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};
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i2c@ffd72000 {
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compatible = "snps,designware-i2c";
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reg = <0x00 0xffd72000 0x00 0x1000>;
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interrupts = <0x00 0x77 0x04>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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clock-frequency = <0x61a80>;
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clocks = <0x13 0x12>;
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resets = <0x16 0x20 0x04>;
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pinctrl-names = "default";
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pinctrl-0 = <0x19 0x1a>;
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status = "okay";
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phandle = <0x8c>;
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rt1711h@4e {
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compatible = "richtek,rt1711h";
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reg = <0x4e>;
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status = "okay";
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interrupt-parent = <0x1b>;
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interrupts = <0x03 0x08>;
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pinctrl-names = "default";
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pinctrl-0 = <0x1c>;
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phandle = <0x8d>;
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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try-power-role = "sink";
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source-pdos = <0x4019032>;
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sink-pdos = <0x4019032 0x86419064>;
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op-sink-microwatt = <0x989680>;
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phandle = <0x8e>;
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ports {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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port@1 {
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reg = <0x01>;
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endpoint {
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remote-endpoint = <0x1d>;
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phandle = <0x55>;
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};
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};
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};
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};
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port {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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endpoint@0 {
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reg = <0x00>;
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remote-endpoint = <0x1e>;
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phandle = <0x82>;
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};
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};
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};
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adv7533@39 {
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status = "okay";
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compatible = "adi,adv7533";
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reg = <0x39>;
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v1p2-supply = <0x1f>;
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vdd-supply = <0x1f>;
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interrupt-parent = <0x20>;
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interrupts = <0x01 0x02>;
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pd-gpio = <0x21 0x01 0x00>;
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sel-gpio = <0x22 0x04 0x00>;
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adi,dsi-lanes = <0x04>;
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adi,disable-timing-generator;
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#sound-dai-cells = <0x00>;
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phandle = <0x88>;
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ports {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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port@0 {
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reg = <0x00>;
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endpoint {
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remote-endpoint = <0x23>;
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phandle = <0x7b>;
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};
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};
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port@1 {
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reg = <0x01>;
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};
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};
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};
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};
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|
i2c@fdf0c000 {
|
|
compatible = "snps,designware-i2c";
|
|
reg = <0x00 0xfdf0c000 0x00 0x1000>;
|
|
interrupts = <0x00 0x51 0x04>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
clock-frequency = <0x61a80>;
|
|
clocks = <0x13 0x37>;
|
|
resets = <0x24 0x78 0x07>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x25 0x26>;
|
|
status = "disabled";
|
|
phandle = <0x8f>;
|
|
};
|
|
|
|
i2c@fdf0b000 {
|
|
compatible = "snps,designware-i2c";
|
|
reg = <0x00 0xfdf0b000 0x00 0x1000>;
|
|
interrupts = <0x00 0x13a 0x04>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
clock-frequency = <0x61a80>;
|
|
clocks = <0x13 0x36>;
|
|
resets = <0x24 0x60 0x0e>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x27 0x28>;
|
|
status = "okay";
|
|
label = "LS-I2C1";
|
|
phandle = <0x90>;
|
|
};
|
|
|
|
serial@fdf02000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xfdf02000 0x00 0x1000>;
|
|
interrupts = <0x00 0x4a 0x04>;
|
|
clocks = <0x13 0x68 0x13 0x08>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x29 0x2a>;
|
|
status = "disabled";
|
|
phandle = <0x91>;
|
|
};
|
|
|
|
serial@fdf00000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xfdf00000 0x00 0x1000>;
|
|
interrupts = <0x00 0x4b 0x04>;
|
|
dma-names = "rx", "tx";
|
|
dmas = <0x2b 0x02 0x2b 0x03>;
|
|
clocks = <0x13 0x39 0x13 0x39>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x2c 0x2d>;
|
|
status = "disabled";
|
|
phandle = <0x92>;
|
|
};
|
|
|
|
serial@fdf03000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xfdf03000 0x00 0x1000>;
|
|
interrupts = <0x00 0x4c 0x04>;
|
|
dma-names = "rx", "tx";
|
|
dmas = <0x2b 0x04 0x2b 0x05>;
|
|
clocks = <0x13 0x3a 0x13 0x08>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x2e 0x2f>;
|
|
status = "disabled";
|
|
phandle = <0x93>;
|
|
};
|
|
|
|
serial@ffd74000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xffd74000 0x00 0x1000>;
|
|
interrupts = <0x00 0x72 0x04>;
|
|
clocks = <0x13 0x0f 0x13 0x08>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x30 0x31>;
|
|
status = "okay";
|
|
label = "LS-UART0";
|
|
phandle = <0x94>;
|
|
};
|
|
|
|
serial@fdf01000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xfdf01000 0x00 0x1000>;
|
|
interrupts = <0x00 0x4d 0x04>;
|
|
dma-names = "rx", "tx";
|
|
dmas = <0x2b 0x06 0x2b 0x07>;
|
|
clocks = <0x13 0x3b 0x13 0x3b>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x32 0x33>;
|
|
status = "okay";
|
|
phandle = <0x95>;
|
|
|
|
bluetooth {
|
|
compatible = "ti,wl1837-st";
|
|
enable-gpios = <0x34 0x06 0x00>;
|
|
max-speed = <0x2dc6c0>;
|
|
};
|
|
};
|
|
|
|
serial@fdf05000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xfdf05000 0x00 0x1000>;
|
|
interrupts = <0x00 0x4e 0x04>;
|
|
dma-names = "rx", "tx";
|
|
dmas = <0x2b 0x08 0x2b 0x09>;
|
|
clocks = <0x13 0x3c 0x13 0x3c>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x35 0x36>;
|
|
status = "disabled";
|
|
phandle = <0x96>;
|
|
};
|
|
|
|
serial@fff32000 {
|
|
compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x00 0xfff32000 0x00 0x1000>;
|
|
interrupts = <0x00 0x4f 0x04>;
|
|
clocks = <0x13 0x0a 0x13 0x08>;
|
|
clock-names = "uartclk", "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x37 0x38>;
|
|
status = "okay";
|
|
label = "LS-UART1";
|
|
phandle = <0x97>;
|
|
};
|
|
|
|
dma@fdf30000 {
|
|
compatible = "hisilicon,k3-dma-1.0";
|
|
reg = <0x00 0xfdf30000 0x00 0x1000>;
|
|
#dma-cells = <0x01>;
|
|
dma-channels = <0x10>;
|
|
dma-requests = <0x20>;
|
|
dma-channel-mask = <0xfffe>;
|
|
interrupts = <0x00 0x8f 0x04>;
|
|
clocks = <0x13 0x3e>;
|
|
dma-no-cci;
|
|
dma-type = "hi3660_dma";
|
|
phandle = <0x2b>;
|
|
};
|
|
|
|
dma-controller@e804b000 {
|
|
compatible = "hisilicon,hisi-pcm-asp-dma-1.0";
|
|
reg = <0x00 0xe804b000 0x00 0x1000>;
|
|
#dma-cells = <0x01>;
|
|
dma-channels = <0x10>;
|
|
dma-requests = <0x20>;
|
|
interrupts = <0x00 0xd8 0x04>;
|
|
interrupt-names = "asp_dma_irq";
|
|
phandle = <0x85>;
|
|
};
|
|
|
|
rtc@fff04000 {
|
|
compatible = "arm,pl031", "arm,primecell";
|
|
reg = <0x00 0xfff04000 0x00 0x1000>;
|
|
interrupts = <0x00 0x2e 0x04>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
phandle = <0x98>;
|
|
};
|
|
|
|
gpio@e8a0b000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a0b000 0x00 0x1000>;
|
|
interrupts = <0x00 0x54 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x01 0x00 0x07>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x1f>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "", "TP901", "[PMU0_SSI]", "[PMU1_SSI]", "[PMU2_SSI]", "[PMU0_CLKOUT]", "[JTAG_TCK]", "[JTAG_TMS]";
|
|
phandle = <0x99>;
|
|
};
|
|
|
|
gpio@e8a0c000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a0c000 0x00 0x1000>;
|
|
interrupts = <0x00 0x55 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x01 0x07 0x07>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x20>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[JTAG_TRST_N]", "[JTAG_TDI]", "[JTAG_TDO]", "NC", "NC", "[I2C3_SCL]", "[I2C3_SDA]", "NC";
|
|
phandle = <0x20>;
|
|
};
|
|
|
|
gpio@e8a0d000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a0d000 0x00 0x1000>;
|
|
interrupts = <0x00 0x56 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x0e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x21>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "GPIO-J", "GPIO_020_HDMI_SEL", "GPIO-L", "GPIO_022_UFSBUCK_INT_N", "GPIO-G";
|
|
phandle = <0x22>;
|
|
};
|
|
|
|
gpio@e8a0e000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a0e000 0x00 0x1000>;
|
|
interrupts = <0x00 0x57 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x16 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x22>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[CSI0_MCLK]", "[CSI1_MCLK]", "NC", "[I2C2_SCL]", "[I2C2_SDA]", "[I2C3_SCL]", "[I2C3_SDA]", "NC";
|
|
phandle = <0x9a>;
|
|
};
|
|
|
|
gpio@e8a0f000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a0f000 0x00 0x1000>;
|
|
interrupts = <0x00 0x58 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x1e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x23>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "PWR_BTN_N", "GPIO_035_PMU2_EN", "GPIO_036_USB_HUB_RESET", "NC", "NC", "NC";
|
|
phandle = <0x7e>;
|
|
};
|
|
|
|
gpio@e8a10000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a10000 0x00 0x1000>;
|
|
interrupts = <0x00 0x59 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x26 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x24>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "GPIO-H", "GPIO_041_HDMI_PD", "TP904", "TP905", "NC", "NC", "GPIO_046_HUB_VDD33_EN", "GPIO_047_PMU1_EN";
|
|
phandle = <0x21>;
|
|
};
|
|
|
|
gpio@e8a11000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a11000 0x00 0x1000>;
|
|
interrupts = <0x00 0x5a 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x2e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x25>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "GPIO_051_WIFI_EN", "GPIO-I", "[SD_DAT1]", "[SD_DAT2]", "[UART1_RXD]";
|
|
phandle = <0x80>;
|
|
};
|
|
|
|
gpio@e8a12000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a12000 0x00 0x1000>;
|
|
interrupts = <0x00 0x5b 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x36 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x26>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[UART1_TXD]", "[UART0_CTS]", "[UART0_RTS]", "[UART0_RXD]", "[UART0_TXD]", "[SOC_BT_UART4_CTS_N]", "[SOC_BT_UART4_RTS_N]", "[SOC_BT_UART4_RXD]";
|
|
phandle = <0x9b>;
|
|
};
|
|
|
|
gpio@e8a13000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a13000 0x00 0x1000>;
|
|
interrupts = <0x00 0x5c 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x3e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x27>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SOC_BT_UART4_TXD]", "NC", "[PMU_HKADC_SSI]", "NC", "GPIO_068_SEL", "NC", "NC", "NC";
|
|
phandle = <0x9c>;
|
|
};
|
|
|
|
gpio@e8a14000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a14000 0x00 0x1000>;
|
|
interrupts = <0x00 0x5d 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x46 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x28>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "GPIO-K", "NC", "NC", "NC", "NC";
|
|
phandle = <0x9d>;
|
|
};
|
|
|
|
gpio@e8a15000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a15000 0x00 0x1000>;
|
|
interrupts = <0x00 0x5e 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x4e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x29>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
|
|
phandle = <0x9e>;
|
|
};
|
|
|
|
gpio@e8a16000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a16000 0x00 0x1000>;
|
|
interrupts = <0x00 0x5f 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x56 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x2a>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "[PCIE_PERST_N]", "NC", "NC", "NC", "NC", "NC", "NC";
|
|
phandle = <0x44>;
|
|
};
|
|
|
|
gpio@e8a17000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a17000 0x00 0x1000>;
|
|
interrupts = <0x00 0x60 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x5e 0x03 0x39 0x07 0x65 0x01>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x2b>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "", "", "", "", "NC";
|
|
phandle = <0x9f>;
|
|
};
|
|
|
|
gpio@e8a18000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a18000 0x00 0x1000>;
|
|
interrupts = <0x00 0x61 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x66 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x2c>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
|
|
phandle = <0xa0>;
|
|
};
|
|
|
|
gpio@e8a19000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a19000 0x00 0x1000>;
|
|
interrupts = <0x00 0x62 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x6e 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x2d>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
|
|
phandle = <0xa1>;
|
|
};
|
|
|
|
gpio@e8a1a000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1a000 0x00 0x1000>;
|
|
interrupts = <0x00 0x63 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x39 0x00 0x76 0x06>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x2e>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "GPIO_126_BT_EN", "TP902";
|
|
phandle = <0x34>;
|
|
};
|
|
|
|
gpio@e8a1b000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1b000 0x00 0x1000>;
|
|
interrupts = <0x00 0x64 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x2f>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0xa2>;
|
|
};
|
|
|
|
gpio@e8a1c000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1c000 0x00 0x1000>;
|
|
interrupts = <0x00 0x65 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x30>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0xa3>;
|
|
};
|
|
|
|
gpio@ff3b4000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xff3b4000 0x00 0x1000>;
|
|
interrupts = <0x00 0x66 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3a 0x00 0x00 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x31>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[UFS_REF_CLK]", "[UFS_RST_N]", "[SPI1_SCLK]", "[SPI1_DIN]", "[SPI1_DOUT]", "[SPI1_CS]", "GPIO_150_USER_LED1", "GPIO_151_USER_LED2";
|
|
phandle = <0x43>;
|
|
};
|
|
|
|
gpio@ff3b5000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xff3b5000 0x00 0x1000>;
|
|
interrupts = <0x00 0x67 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3a 0x00 0x08 0x04>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x32>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "NC", "NC", "", "", "", "";
|
|
phandle = <0xa4>;
|
|
};
|
|
|
|
gpio@e8a1f000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a1f000 0x00 0x1000>;
|
|
interrupts = <0x00 0x68 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3b 0x00 0x00 0x06>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x13 0x33>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SD_CLK]", "[SD_CMD]", "[SD_DATA0]", "[SD_DATA1]", "[SD_DATA2]", "[SD_DATA3]", "", "";
|
|
phandle = <0xa5>;
|
|
};
|
|
|
|
gpio@e8a20000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xe8a20000 0x00 0x1000>;
|
|
interrupts = <0x00 0x69 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
gpio-ranges = <0x3c 0x00 0x00 0x06>;
|
|
clocks = <0x13 0x34>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[WL_SDIO_CLK]", "[WL_SDIO_CMD]", "[WL_SDIO_DATA0]", "[WL_SDIO_DATA1]", "[WL_SDIO_DATA2]", "[WL_SDIO_DATA3]", "", "";
|
|
phandle = <0xa6>;
|
|
};
|
|
|
|
gpio@fff0b000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0b000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6a 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3d 0x02 0x00 0x06>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x00>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[GPIO_176_PMU_PWR_HOLD]", "NA", "[SYSCLK_EN]", "GPIO_179_WL_WAKEUP_AP", "GPIO_180_HDMI_INT", "NA", "GPIO-F", "[I2C0_SCL]";
|
|
phandle = <0x4f>;
|
|
};
|
|
|
|
gpio@fff0c000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0c000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6b 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3d 0x00 0x06 0x07>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x01>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[I2C0_SDA]", "[I2C1_SCL]", "[I2C1_SDA]", "[I2C1_SCL]", "[I2C1_SDA]", "GPIO_189_USER_LED3", "GPIO_190_USER_LED4", "";
|
|
phandle = <0x7f>;
|
|
};
|
|
|
|
gpio@fff0d000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0d000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6c 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3d 0x00 0x0d 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x02>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[PCM_DI]", "[PCM_DO]", "[PCM_CLK]", "[PCM_FS]", "[GPIO_196_I2S2_DI]", "[GPIO_197_I2S2_DO]", "[GPIO_198_I2S2_XCLK]", "[GPIO_199_I2S2_XFS]";
|
|
phandle = <0xa7>;
|
|
};
|
|
|
|
gpio@fff0e000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0e000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6d 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3d 0x00 0x15 0x04 0x3d 0x05 0x19 0x03>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x03>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "NC", "NC", "GPIO_202_VBUS_TYPEC", "GPIO_203_SD_DET", "GPIO_204_PMU12_IRQ_N", "GPIO_205_WIFI_ACTIVE", "GPIO_206_USBSW_SEL", "GPIO_207_BT_ACTIVE";
|
|
phandle = <0x45>;
|
|
};
|
|
|
|
gpio@fff0f000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff0f000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6e 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3d 0x00 0x1c 0x08>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x04>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "GPIO-A", "GPIO-B", "GPIO-C", "GPIO-D", "GPIO-E", "[PCIE_CLKREQ_N]", "[PCIE_WAKE_N]", "[SPI0_CLK]";
|
|
phandle = <0xa8>;
|
|
};
|
|
|
|
gpio@fff10000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff10000 0x00 0x1000>;
|
|
interrupts = <0x00 0x6f 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x3d 0x00 0x24 0x06>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x05>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = "[SPI0_DIN]", "[SPI0_DOUT]", "[SPI0_CS]", "GPIO_219_CC_INT", "NC", "NC", "[PMU_INT]", "";
|
|
phandle = <0x1b>;
|
|
};
|
|
|
|
gpio@fff1d000 {
|
|
compatible = "arm,pl061", "arm,primecell";
|
|
reg = <0x00 0xfff1d000 0x00 0x1000>;
|
|
interrupts = <0x00 0x8d 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
clocks = <0x3e 0x06>;
|
|
clock-names = "apb_pclk";
|
|
gpio-line-names = <0x00 0x00>;
|
|
phandle = <0xa9>;
|
|
};
|
|
|
|
spi@ffd68000 {
|
|
compatible = "arm,pl022", "arm,primecell";
|
|
reg = <0x00 0xffd68000 0x00 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
interrupts = <0x00 0x74 0x04>;
|
|
clocks = <0x13 0x19>;
|
|
clock-names = "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x3f 0x40>;
|
|
num-cs = <0x01>;
|
|
cs-gpios = <0x1b 0x02 0x00>;
|
|
status = "okay";
|
|
label = "LS-SPI0";
|
|
phandle = <0xaa>;
|
|
};
|
|
|
|
spi@ff3b3000 {
|
|
compatible = "arm,pl022", "arm,primecell";
|
|
reg = <0x00 0xff3b3000 0x00 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
interrupts = <0x00 0x138 0x04>;
|
|
clocks = <0x13 0x35>;
|
|
clock-names = "apb_pclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x41 0x42>;
|
|
num-cs = <0x01>;
|
|
cs-gpios = <0x43 0x05 0x00>;
|
|
status = "okay";
|
|
label = "HS-SPI1";
|
|
phandle = <0xab>;
|
|
};
|
|
|
|
pcie@f4000000 {
|
|
compatible = "hisilicon,kirin960-pcie";
|
|
reg = <0x00 0xf4000000 0x00 0x1000 0x00 0xff3fe000 0x00 0x1000 0x00 0xf3f20000 0x00 0x40000 0x00 0xf5000000 0x00 0x2000>;
|
|
reg-names = "dbi", "apb", "phy", "config";
|
|
bus-range = <0x00 0x01>;
|
|
#address-cells = <0x03>;
|
|
#size-cells = <0x02>;
|
|
device_type = "pci";
|
|
ranges = <0x2000000 0x00 0x00 0x00 0xf6000000 0x00 0x2000000>;
|
|
num-lanes = <0x01>;
|
|
#interrupt-cells = <0x01>;
|
|
interrupts = <0x00 0x11b 0x04>;
|
|
interrupt-names = "msi";
|
|
interrupt-map-mask = <0xf800 0x00 0x00 0x07>;
|
|
interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x11a 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x11b 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x11c 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x11d 0x04>;
|
|
clocks = <0x13 0x1a 0x13 0x52 0x13 0x53 0x13 0x51 0x13 0x50>;
|
|
clock-names = "pcie_phy_ref", "pcie_aux", "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk";
|
|
reset-gpios = <0x44 0x01 0x00>;
|
|
};
|
|
|
|
ufs@ff3b0000 {
|
|
compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
|
|
reg = <0x00 0xff3b0000 0x00 0x1000 0x00 0xff3b1000 0x00 0x1000>;
|
|
interrupt-parent = <0x01>;
|
|
interrupts = <0x00 0x116 0x04>;
|
|
clocks = <0x13 0x66 0x13 0x65>;
|
|
clock-names = "ref_clk", "phy_clk";
|
|
freq-table-hz = <0x00 0x00 0x00 0x00>;
|
|
resets = <0x24 0x84 0x0c>;
|
|
reset-names = "rst";
|
|
phandle = <0xac>;
|
|
};
|
|
|
|
dwmmc1@ff37f000 {
|
|
compatible = "hisilicon,hi3660-dw-mshc";
|
|
reg = <0x00 0xff37f000 0x00 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
interrupts = <0x00 0x8b 0x04>;
|
|
clocks = <0x13 0x4b 0x13 0x1d>;
|
|
clock-names = "ciu", "biu";
|
|
clock-frequency = <0x30d400>;
|
|
resets = <0x24 0x94 0x12>;
|
|
reset-names = "reset";
|
|
hisilicon,peripheral-syscon = <0x3e>;
|
|
card-detect-delay = <0xc8>;
|
|
status = "okay";
|
|
bus-width = <0x04>;
|
|
cap-sd-highspeed;
|
|
sd-uhs-sdr12;
|
|
sd-uhs-sdr25;
|
|
sd-uhs-sdr50;
|
|
sd-uhs-sdr104;
|
|
disable-wp;
|
|
cd-gpios = <0x45 0x03 0x01>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x46 0x47 0x48>;
|
|
vmmc-supply = <0x49>;
|
|
vqmmc-supply = <0x4a>;
|
|
phandle = <0xad>;
|
|
};
|
|
|
|
dwmmc2@ff3ff000 {
|
|
compatible = "hisilicon,hi3660-dw-mshc";
|
|
reg = <0x00 0xff3ff000 0x00 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
interrupts = <0x00 0x8c 0x04>;
|
|
clocks = <0x13 0x4c 0x13 0x1c>;
|
|
clock-names = "ciu", "biu";
|
|
resets = <0x24 0x94 0x14>;
|
|
reset-names = "reset";
|
|
card-detect-delay = <0xc8>;
|
|
status = "okay";
|
|
bus-width = <0x04>;
|
|
non-removable;
|
|
broken-cd;
|
|
cap-power-off-card;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x4b 0x4c 0x4d>;
|
|
vmmc-supply = <0x4e>;
|
|
phandle = <0xae>;
|
|
|
|
wlcore@2 {
|
|
compatible = "ti,wl1837";
|
|
reg = <0x02>;
|
|
interrupt-parent = <0x4f>;
|
|
interrupts = <0x03 0x01>;
|
|
phandle = <0xaf>;
|
|
};
|
|
};
|
|
|
|
watchdog@e8a06000 {
|
|
compatible = "arm,sp805", "arm,primecell";
|
|
reg = <0x00 0xe8a06000 0x00 0x1000>;
|
|
interrupts = <0x00 0x2c 0x04>;
|
|
clocks = <0x13 0x0b 0x13 0x0b>;
|
|
clock-names = "wdog_clk", "apb_pclk";
|
|
phandle = <0xb0>;
|
|
};
|
|
|
|
watchdog@e8a07000 {
|
|
compatible = "arm,sp805", "arm,primecell";
|
|
reg = <0x00 0xe8a07000 0x00 0x1000>;
|
|
interrupts = <0x00 0x2d 0x04>;
|
|
clocks = <0x13 0x0b 0x13 0x0b>;
|
|
clock-names = "wdog_clk", "apb_pclk";
|
|
phandle = <0xb1>;
|
|
};
|
|
|
|
tsensor@fff30000 {
|
|
compatible = "hisilicon,hi3660-tsensor";
|
|
reg = <0x00 0xfff30000 0x00 0x1000>;
|
|
interrupts = <0x00 0x91 0x04>;
|
|
#thermal-sensor-cells = <0x01>;
|
|
phandle = <0x50>;
|
|
};
|
|
|
|
thermal-zones {
|
|
|
|
cls0 {
|
|
polling-delay = <0x3e8>;
|
|
polling-delay-passive = <0x64>;
|
|
sustainable-power = <0x1194>;
|
|
thermal-sensors = <0x50 0x01>;
|
|
phandle = <0xb2>;
|
|
|
|
trips {
|
|
|
|
trip-point@0 {
|
|
temperature = <0xfde8>;
|
|
hysteresis = <0x3e8>;
|
|
type = "passive";
|
|
phandle = <0xb3>;
|
|
};
|
|
|
|
trip-point@1 {
|
|
temperature = <0x124f8>;
|
|
hysteresis = <0x3e8>;
|
|
type = "passive";
|
|
phandle = <0x51>;
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
|
|
map0 {
|
|
trip = <0x51>;
|
|
contribution = <0x400>;
|
|
cooling-device = <0x02 0xffffffff 0xffffffff 0x03 0xffffffff 0xffffffff 0x04 0xffffffff 0xffffffff 0x05 0xffffffff 0xffffffff>;
|
|
};
|
|
|
|
map1 {
|
|
trip = <0x51>;
|
|
contribution = <0x200>;
|
|
cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
usb3_otg_bc@ff200000 {
|
|
compatible = "syscon", "simple-mfd";
|
|
reg = <0x00 0xff200000 0x00 0x1000>;
|
|
phandle = <0xb4>;
|
|
|
|
usb-phy {
|
|
compatible = "hisilicon,hi3660-usb-phy";
|
|
#phy-cells = <0x00>;
|
|
hisilicon,pericrg-syscon = <0x13>;
|
|
hisilicon,pctrl-syscon = <0x52>;
|
|
hisilicon,eye-diagram-param = <0x22466e4>;
|
|
phandle = <0x53>;
|
|
};
|
|
};
|
|
|
|
dwc3@ff100000 {
|
|
compatible = "snps,dwc3";
|
|
reg = <0x00 0xff100000 0x00 0x100000>;
|
|
clocks = <0x13 0x1b 0x13 0x49>;
|
|
clock-names = "ref", "bus_early";
|
|
assigned-clocks = <0x13 0x49>;
|
|
assigned-clock-rates = <0xda64340>;
|
|
resets = <0x24 0x90 0x08 0x24 0x90 0x07 0x24 0x90 0x06 0x24 0x90 0x05>;
|
|
interrupts = <0x00 0x9f 0x04 0x00 0xa1 0x04>;
|
|
phys = <0x53>;
|
|
phy-names = "usb3-phy";
|
|
dr_mode = "otg";
|
|
maximum-speed = "super-speed";
|
|
phy_type = "utmi";
|
|
snps,dis-del-phy-power-chg-quirk;
|
|
snps,lfps_filter_quirk;
|
|
snps,dis_u2_susphy_quirk;
|
|
snps,dis_u3_susphy_quirk;
|
|
snps,tx_de_emphasis_quirk;
|
|
snps,tx_de_emphasis = <0x01>;
|
|
snps,dis_enblslpm_quirk;
|
|
snps,gctl-reset-quirk;
|
|
usb-role-switch;
|
|
role-switch-default-mode = "host";
|
|
phandle = <0xb5>;
|
|
|
|
port {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
endpoint@0 {
|
|
reg = <0x00>;
|
|
remote-endpoint = <0x54>;
|
|
phandle = <0x81>;
|
|
};
|
|
|
|
endpoint@1 {
|
|
reg = <0x01>;
|
|
remote-endpoint = <0x55>;
|
|
phandle = <0x1d>;
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ecc40000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xecc40000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x02>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x56>;
|
|
phandle = <0x5b>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ecd40000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xecd40000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x03>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x57>;
|
|
phandle = <0x5c>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ece40000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xece40000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x04>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x58>;
|
|
phandle = <0x5d>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ecf40000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xecf40000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x05>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x59>;
|
|
phandle = <0x5e>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel@ec801000 {
|
|
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
|
|
reg = <0x00 0xec801000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x5a>;
|
|
phandle = <0x5f>;
|
|
};
|
|
};
|
|
};
|
|
|
|
in-ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x5b>;
|
|
phandle = <0x56>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <0x01>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x5c>;
|
|
phandle = <0x57>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <0x02>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x5d>;
|
|
phandle = <0x58>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <0x03>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x5e>;
|
|
phandle = <0x59>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etf@ec802000 {
|
|
compatible = "arm,coresight-tmc", "arm,primecell";
|
|
reg = <0x00 0xec802000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x5f>;
|
|
phandle = <0x5a>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x60>;
|
|
phandle = <0x6d>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ed440000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xed440000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x06>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x61>;
|
|
phandle = <0x66>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ed540000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xed540000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x07>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x62>;
|
|
phandle = <0x67>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ed640000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xed640000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x08>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x63>;
|
|
phandle = <0x68>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etm@ed740000 {
|
|
compatible = "arm,coresight-etm4x", "arm,primecell";
|
|
reg = <0x00 0xed740000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
cpu = <0x09>;
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x64>;
|
|
phandle = <0x69>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel@ed001000 {
|
|
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
|
|
reg = <0x00 0xed001000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x65>;
|
|
phandle = <0x6a>;
|
|
};
|
|
};
|
|
};
|
|
|
|
in-ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x66>;
|
|
phandle = <0x61>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <0x01>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x67>;
|
|
phandle = <0x62>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <0x02>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x68>;
|
|
phandle = <0x63>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
reg = <0x03>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x69>;
|
|
phandle = <0x64>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etf@ed002000 {
|
|
compatible = "arm,coresight-tmc", "arm,primecell";
|
|
reg = <0x00 0xed002000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x6a>;
|
|
phandle = <0x65>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x6b>;
|
|
phandle = <0x6e>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel {
|
|
compatible = "arm,coresight-static-funnel";
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x6c>;
|
|
phandle = <0x70>;
|
|
};
|
|
};
|
|
};
|
|
|
|
in-ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x6d>;
|
|
phandle = <0x60>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <0x01>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x6e>;
|
|
phandle = <0x6b>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
funnel@ec031000 {
|
|
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
|
|
reg = <0x00 0xec031000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x6f>;
|
|
phandle = <0x71>;
|
|
};
|
|
};
|
|
};
|
|
|
|
in-ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x70>;
|
|
phandle = <0x6c>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etf@ec036000 {
|
|
compatible = "arm,coresight-tmc", "arm,primecell";
|
|
reg = <0x00 0xec036000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x71>;
|
|
phandle = <0x6f>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x72>;
|
|
phandle = <0x73>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
replicator {
|
|
compatible = "arm,coresight-static-replicator";
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x73>;
|
|
phandle = <0x72>;
|
|
};
|
|
};
|
|
};
|
|
|
|
out-ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x74>;
|
|
phandle = <0x76>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <0x01>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x75>;
|
|
phandle = <0x77>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
etr@ec033000 {
|
|
compatible = "arm,coresight-tmc", "arm,primecell";
|
|
reg = <0x00 0xec033000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x76>;
|
|
phandle = <0x74>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
tpiu@ec032000 {
|
|
compatible = "arm,coresight-tpiu", "arm,primecell";
|
|
reg = <0x00 0xec032000 0x00 0x1000>;
|
|
clocks = <0x13 0x08>;
|
|
clock-names = "apb_pclk";
|
|
|
|
in-ports {
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x77>;
|
|
phandle = <0x75>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
gpio-range {
|
|
#pinctrl-single,gpio-range-cells = <0x03>;
|
|
phandle = <0x78>;
|
|
};
|
|
|
|
pinmux@e896c000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xe896c000 0x00 0x1f0>;
|
|
#pinctrl-cells = <0x01>;
|
|
#gpio-range-cells = <0x03>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x78 0x00 0x07 0x00 0x78 0x08 0x74 0x00>;
|
|
phandle = <0x39>;
|
|
|
|
pmu_pmx_func {
|
|
pinctrl-single,pins = <0x08 0x01 0x0c 0x01 0x10 0x01 0x100 0x01>;
|
|
phandle = <0xb6>;
|
|
};
|
|
|
|
csi0_pwd_n_pmx_func {
|
|
pinctrl-single,pins = <0x44 0x00>;
|
|
phandle = <0xb7>;
|
|
};
|
|
|
|
csi1_pwd_n_pmx_func {
|
|
pinctrl-single,pins = <0x4c 0x00>;
|
|
phandle = <0xb8>;
|
|
};
|
|
|
|
isp0_pmx_func {
|
|
pinctrl-single,pins = <0x58 0x01 0x64 0x01 0x68 0x01>;
|
|
phandle = <0xb9>;
|
|
};
|
|
|
|
isp1_pmx_func {
|
|
pinctrl-single,pins = <0x5c 0x01 0x6c 0x01 0x70 0x01>;
|
|
phandle = <0xba>;
|
|
};
|
|
|
|
pwr_key_pmx_func {
|
|
pinctrl-single,pins = <0x80 0x00>;
|
|
phandle = <0x7c>;
|
|
};
|
|
|
|
i2c3_pmx_func {
|
|
pinctrl-single,pins = <0x2c 0x01 0x30 0x01>;
|
|
phandle = <0x25>;
|
|
};
|
|
|
|
i2c4_pmx_func {
|
|
pinctrl-single,pins = <0x90 0x01 0x94 0x01>;
|
|
phandle = <0xbb>;
|
|
};
|
|
|
|
pcie_perstn_pmx_func {
|
|
pinctrl-single,pins = <0x15c 0x01>;
|
|
phandle = <0xbc>;
|
|
};
|
|
|
|
usbhub5734_pmx_func {
|
|
pinctrl-single,pins = <0x11c 0x00 0x120 0x00>;
|
|
phandle = <0xbd>;
|
|
};
|
|
|
|
uart0_pmx_func {
|
|
pinctrl-single,pins = <0xcc 0x02 0xd0 0x02>;
|
|
phandle = <0x29>;
|
|
};
|
|
|
|
uart1_pmx_func {
|
|
pinctrl-single,pins = <0xb0 0x02 0xb4 0x02 0xa8 0x02 0xac 0x02>;
|
|
phandle = <0x2c>;
|
|
};
|
|
|
|
uart2_pmx_func {
|
|
pinctrl-single,pins = <0xbc 0x02 0xc0 0x02 0xc8 0x02 0xc4 0x02>;
|
|
phandle = <0x2e>;
|
|
};
|
|
|
|
uart3_pmx_func {
|
|
pinctrl-single,pins = <0xdc 0x01 0xe0 0x01 0xe4 0x01 0xe8 0x01>;
|
|
phandle = <0x30>;
|
|
};
|
|
|
|
uart4_pmx_func {
|
|
pinctrl-single,pins = <0xec 0x01 0xf0 0x01 0xf4 0x01 0xf8 0x01>;
|
|
phandle = <0x32>;
|
|
};
|
|
|
|
uart5_pmx_func {
|
|
pinctrl-single,pins = <0xc4 0x03 0xc8 0x03 0xbc 0x03 0xc0 0x03>;
|
|
phandle = <0x35>;
|
|
};
|
|
|
|
uart6_pmx_func {
|
|
pinctrl-single,pins = <0xcc 0x01 0xd0 0x01 0xd4 0x01 0xd8 0x01>;
|
|
phandle = <0x37>;
|
|
};
|
|
|
|
cam0_rst_pmx_func {
|
|
pinctrl-single,pins = <0xc8 0x00>;
|
|
phandle = <0xbe>;
|
|
};
|
|
|
|
cam1_rst_pmx_func {
|
|
pinctrl-single,pins = <0x124 0x00>;
|
|
phandle = <0xbf>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff37e000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xff37e000 0x00 0x18>;
|
|
#gpio-range-cells = <0x03>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x78 0x00 0x06 0x00>;
|
|
phandle = <0x3b>;
|
|
|
|
sd_pmx_func {
|
|
pinctrl-single,pins = <0x00 0x01 0x04 0x01 0x08 0x01 0x0c 0x01 0x10 0x01 0x14 0x01>;
|
|
phandle = <0x46>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff3b6000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xff3b6000 0x00 0x30>;
|
|
#pinctrl-cells = <0x01>;
|
|
#gpio-range-cells = <0x03>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x78 0x00 0x0c 0x00>;
|
|
phandle = <0x3a>;
|
|
|
|
ufs_pmx_func {
|
|
pinctrl-single,pins = <0x00 0x01 0x04 0x01>;
|
|
phandle = <0xc0>;
|
|
};
|
|
|
|
spi3_pmx_func {
|
|
pinctrl-single,pins = <0x08 0x01 0x0c 0x01 0x10 0x01 0x14 0x01>;
|
|
phandle = <0x41>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff3fd000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xff3fd000 0x00 0x18>;
|
|
#pinctrl-cells = <0x01>;
|
|
#gpio-range-cells = <0x03>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x78 0x00 0x06 0x00>;
|
|
phandle = <0x3c>;
|
|
|
|
sdio_pmx_func {
|
|
pinctrl-single,pins = <0x00 0x01 0x04 0x01 0x08 0x01 0x0c 0x01 0x10 0x01 0x14 0x01>;
|
|
phandle = <0x4b>;
|
|
};
|
|
};
|
|
|
|
pinmux@fff11000 {
|
|
compatible = "pinctrl-single";
|
|
reg = <0x00 0xfff11000 0x00 0xa8>;
|
|
#pinctrl-cells = <0x01>;
|
|
#gpio-range-cells = <0x03>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
pinctrl-single,function-mask = <0x07>;
|
|
pinctrl-single,gpio-range = <0x78 0x00 0x2a 0x00>;
|
|
phandle = <0x3d>;
|
|
|
|
i2s2_pmx_func {
|
|
pinctrl-single,pins = <0x44 0x01 0x48 0x01 0x4c 0x01 0x50 0x01>;
|
|
phandle = <0x83>;
|
|
};
|
|
|
|
slimbus_pmx_func {
|
|
pinctrl-single,pins = <0x2c 0x01 0x30 0x01>;
|
|
phandle = <0xc1>;
|
|
};
|
|
|
|
i2c0_pmx_func {
|
|
pinctrl-single,pins = <0x14 0x01 0x18 0x01>;
|
|
phandle = <0x17>;
|
|
};
|
|
|
|
i2c1_pmx_func {
|
|
pinctrl-single,pins = <0x1c 0x01 0x20 0x01>;
|
|
phandle = <0x19>;
|
|
};
|
|
|
|
i2c7_pmx_func {
|
|
pinctrl-single,pins = <0x24 0x03 0x28 0x03>;
|
|
phandle = <0x27>;
|
|
};
|
|
|
|
pcie_pmx_func {
|
|
pinctrl-single,pins = <0x84 0x01 0x88 0x01>;
|
|
phandle = <0xc2>;
|
|
};
|
|
|
|
spi2_pmx_func {
|
|
pinctrl-single,pins = <0x8c 0x01 0x90 0x01 0x94 0x01 0x98 0x01>;
|
|
phandle = <0x3f>;
|
|
};
|
|
|
|
i2s0_pmx_func {
|
|
pinctrl-single,pins = <0x34 0x01 0x38 0x01 0x3c 0x01 0x40 0x01>;
|
|
phandle = <0xc3>;
|
|
};
|
|
};
|
|
|
|
pinmux@e896c800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xe896c800 0x00 0x200>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0xc4>;
|
|
|
|
pmu_cfg_func {
|
|
pinctrl-single,pins = <0x10 0x00 0x14 0x00 0x18 0x00 0x10c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x20 0xf0>;
|
|
phandle = <0xc5>;
|
|
};
|
|
|
|
i2c3_cfg_func {
|
|
pinctrl-single,pins = <0x38 0x00 0x3c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x26>;
|
|
};
|
|
|
|
csi0_pwd_n_cfg_func {
|
|
pinctrl-single,pins = <0x50 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0xc6>;
|
|
};
|
|
|
|
csi1_pwd_n_cfg_func {
|
|
pinctrl-single,pins = <0x58 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0xc7>;
|
|
};
|
|
|
|
isp0_cfg_func {
|
|
pinctrl-single,pins = <0x64 0x00 0x70 0x00 0x74 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0xc8>;
|
|
};
|
|
|
|
isp1_cfg_func {
|
|
pinctrl-single,pins = <0x68 0x00 0x78 0x00 0x7c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0xc9>;
|
|
};
|
|
|
|
pwr_key_cfg_func {
|
|
pinctrl-single,pins = <0x8c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x7d>;
|
|
};
|
|
|
|
uart1_cfg_func {
|
|
pinctrl-single,pins = <0xb4 0x00 0xb8 0x00 0xbc 0x00 0xc0 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x2d>;
|
|
};
|
|
|
|
uart2_cfg_func {
|
|
pinctrl-single,pins = <0xc8 0x00 0xcc 0x00 0xd0 0x00 0xd4 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x2f>;
|
|
};
|
|
|
|
uart5_cfg_func {
|
|
pinctrl-single,pins = <0xc8 0x00 0xcc 0x00 0xd0 0x00 0xd4 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x36>;
|
|
};
|
|
|
|
cam0_rst_cfg_func {
|
|
pinctrl-single,pins = <0xd4 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0xca>;
|
|
};
|
|
|
|
uart0_cfg_func {
|
|
pinctrl-single,pins = <0xd8 0x00 0xdc 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x2a>;
|
|
};
|
|
|
|
uart6_cfg_func {
|
|
pinctrl-single,pins = <0xd8 0x00 0xdc 0x00 0xe0 0x00 0xe4 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x38>;
|
|
};
|
|
|
|
uart3_cfg_func {
|
|
pinctrl-single,pins = <0xe8 0x00 0xec 0x00 0xf0 0x00 0xf4 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x31>;
|
|
};
|
|
|
|
uart4_cfg_func {
|
|
pinctrl-single,pins = <0xf8 0x00 0xfc 0x00 0x100 0x00 0x104 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x33>;
|
|
};
|
|
|
|
cam1_rst_cfg_func {
|
|
pinctrl-single,pins = <0x130 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x10 0xf0>;
|
|
phandle = <0xcb>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff3b6800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xff3b6800 0x00 0x18>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0xcc>;
|
|
|
|
ufs_cfg_func {
|
|
pinctrl-single,pins = <0x00 0x00 0x04 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x30 0xf0>;
|
|
phandle = <0xcd>;
|
|
};
|
|
|
|
spi3_cfg_func {
|
|
pinctrl-single,pins = <0x08 0x00 0x0c 0x00 0x10 0x00 0x14 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x20 0xf0>;
|
|
phandle = <0x42>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff3fd800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xff3fd800 0x00 0x18>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0xce>;
|
|
|
|
sdio_clk_cfg_func {
|
|
pinctrl-single,pins = <0x00 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0xf0 0xf0>;
|
|
phandle = <0x4c>;
|
|
};
|
|
|
|
sdio_cfg_func {
|
|
pinctrl-single,pins = <0x04 0x00 0x08 0x00 0x0c 0x00 0x10 0x00 0x14 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x80 0xf0>;
|
|
phandle = <0x4d>;
|
|
};
|
|
};
|
|
|
|
pinmux@ff37e800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xff37e800 0x00 0x18>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0xcf>;
|
|
|
|
sd_clk_cfg_func {
|
|
pinctrl-single,pins = <0x00 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0xf0 0xf0>;
|
|
phandle = <0x47>;
|
|
};
|
|
|
|
sd_cfg_func {
|
|
pinctrl-single,pins = <0x04 0x00 0x08 0x00 0x0c 0x00 0x10 0x00 0x14 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x80 0xf0>;
|
|
phandle = <0x48>;
|
|
};
|
|
};
|
|
|
|
pinmux@fff11800 {
|
|
compatible = "pinconf-single";
|
|
reg = <0x00 0xfff11800 0x00 0xbc>;
|
|
#pinctrl-cells = <0x01>;
|
|
pinctrl-single,register-width = <0x20>;
|
|
phandle = <0xd0>;
|
|
|
|
i2c0_cfg_func {
|
|
pinctrl-single,pins = <0x1c 0x00 0x20 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x18>;
|
|
};
|
|
|
|
i2c1_cfg_func {
|
|
pinctrl-single,pins = <0x24 0x00 0x28 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x1a>;
|
|
};
|
|
|
|
i2c7_cfg_func {
|
|
pinctrl-single,pins = <0x2c 0x00 0x30 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x28>;
|
|
};
|
|
|
|
slimbus_cfg_func {
|
|
pinctrl-single,pins = <0x34 0x00 0x38 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0xd1>;
|
|
};
|
|
|
|
i2s0_cfg_func {
|
|
pinctrl-single,pins = <0x40 0x00 0x44 0x00 0x48 0x00 0x4c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0xd2>;
|
|
};
|
|
|
|
i2s2_cfg_func {
|
|
pinctrl-single,pins = <0x50 0x00 0x54 0x00 0x58 0x00 0x5c 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x84>;
|
|
};
|
|
|
|
pcie_cfg_func {
|
|
pinctrl-single,pins = <0x94 0x00 0x98 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0xd3>;
|
|
};
|
|
|
|
spi2_cfg_func {
|
|
pinctrl-single,pins = <0x9c 0x00 0xa0 0x00 0xa4 0x00 0xa8 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x20 0xf0>;
|
|
phandle = <0x40>;
|
|
};
|
|
|
|
usb_cfg_func {
|
|
pinctrl-single,pins = <0xac 0x00>;
|
|
pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
|
|
pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
|
|
pinctrl-single,drive-strength = <0x00 0xf0>;
|
|
phandle = <0x1c>;
|
|
};
|
|
};
|
|
};
|
|
|
|
dpe@E8600000 {
|
|
compatible = "hisilicon,hi3660-dpe";
|
|
status = "ok";
|
|
reg = <0x00 0xe8600000 0x00 0x80000 0x00 0xfff35000 0x00 0x1000 0x00 0xfff0a000 0x00 0x1000 0x00 0xfff31000 0x00 0x1000 0x00 0xe86c0000 0x00 0x10000>;
|
|
interrupts = <0x00 0xf5 0x04>;
|
|
clocks = <0x13 0x40 0x13 0x3f 0x13 0x44 0x13 0x42 0x13 0x41 0x3e 0x08 0x3e 0x07>;
|
|
clock-names = "aclk_dss", "pclk_dss", "clk_edc0", "clk_ldi0", "clk_ldi1", "clk_dss_axi_mm", "pclk_mmbuf";
|
|
dma-coherent;
|
|
phandle = <0xd4>;
|
|
|
|
port {
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x79>;
|
|
phandle = <0x7a>;
|
|
};
|
|
};
|
|
|
|
iommu_info {
|
|
start-addr = <0x8000>;
|
|
size = <0xbfff8000>;
|
|
};
|
|
};
|
|
|
|
dsi@E8601000 {
|
|
compatible = "hisilicon,hi3660-dsi";
|
|
status = "ok";
|
|
reg = <0x00 0xe8601000 0x00 0x7f000 0x00 0xfff35000 0x00 0x1000>;
|
|
clocks = <0x13 0x46 0x13 0x48 0x13 0x45 0x13 0x47 0x13 0x4e 0x13 0x4f>;
|
|
clock-names = "clk_txdphy0_ref", "clk_txdphy1_ref", "clk_txdphy0_cfg", "clk_txdphy1_cfg", "pclk_dsi0", "pclk_dsi1";
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
mux-gpio = <0x22 0x04 0x00>;
|
|
phandle = <0xd5>;
|
|
|
|
ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x7a>;
|
|
phandle = <0x79>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x01>;
|
|
|
|
endpoint@0 {
|
|
reg = <0x00>;
|
|
remote-endpoint = <0x7b>;
|
|
phandle = <0x23>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
mali@E82C0000 {
|
|
compatible = "arm,malit6xx", "arm,mali-midgard";
|
|
#cooling-cells = <0x03>;
|
|
gpu_outstanding = <0x00>;
|
|
reg = <0x00 0xe82c0000 0x00 0x4000>;
|
|
interrupts = <0x00 0x102 0x04 0x00 0x103 0x04 0x00 0x104 0x04>;
|
|
interrupt-names = "JOB", "MMU", "GPU";
|
|
operating-points = <0x2b750 0x9eb10 0x61a80 0xaae60 0x82208 0xc3500 0xc5058 0xdbba0 0xea600 0xf4240 0xfd2c8 0x10c8e0>;
|
|
phandle = <0xd6>;
|
|
};
|
|
|
|
aliases {
|
|
mshc1 = "/soc/dwmmc1@ff37f000";
|
|
mshc2 = "/soc/dwmmc2@ff3ff000";
|
|
serial0 = "/soc/serial@fdf02000";
|
|
serial1 = "/soc/serial@fdf00000";
|
|
serial2 = "/soc/serial@fdf03000";
|
|
serial3 = "/soc/serial@ffd74000";
|
|
serial4 = "/soc/serial@fdf01000";
|
|
serial5 = "/soc/serial@fdf05000";
|
|
serial6 = "/soc/serial@fff32000";
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial6:115200n8";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x00 0x00 0x00 0x00>;
|
|
};
|
|
|
|
reserved-memory {
|
|
#address-cells = <0x02>;
|
|
#size-cells = <0x02>;
|
|
ranges;
|
|
|
|
ramoops@32000000 {
|
|
compatible = "ramoops";
|
|
reg = <0x00 0x32000000 0x00 0x100000>;
|
|
record-size = <0x20000>;
|
|
console-size = <0x20000>;
|
|
ftrace-size = <0x20000>;
|
|
};
|
|
|
|
linux,cma {
|
|
compatible = "shared-dma-pool";
|
|
reg = <0x00 0x20c00000 0x00 0x4000000>;
|
|
reusable;
|
|
linux,cma-default;
|
|
};
|
|
};
|
|
|
|
reboot-mode-syscon@32100000 {
|
|
compatible = "syscon", "simple-mfd";
|
|
reg = <0x00 0x32100000 0x00 0x1000>;
|
|
|
|
reboot-mode {
|
|
compatible = "syscon-reboot-mode";
|
|
offset = <0x00>;
|
|
mode-normal = <0x77665501>;
|
|
mode-bootloader = "wfU";
|
|
mode-recovery = <0x77665502>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x7c 0x7d>;
|
|
|
|
power {
|
|
wakeup-source;
|
|
gpios = <0x7e 0x02 0x01>;
|
|
label = "GPIO Power";
|
|
linux,code = <0x74>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
user_led1 {
|
|
label = "green:user1";
|
|
gpios = <0x43 0x06 0x00>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
|
|
user_led2 {
|
|
label = "green:user2";
|
|
gpios = <0x43 0x07 0x00>;
|
|
linux,default-trigger = "none";
|
|
};
|
|
|
|
user_led3 {
|
|
label = "green:user3";
|
|
gpios = <0x7f 0x05 0x00>;
|
|
linux,default-trigger = "mmc0";
|
|
};
|
|
|
|
user_led4 {
|
|
label = "green:user4";
|
|
gpios = <0x7f 0x06 0x00>;
|
|
panic-indicator;
|
|
linux,default-trigger = "none";
|
|
};
|
|
|
|
wlan_active_led {
|
|
label = "yellow:wlan";
|
|
gpios = <0x45 0x05 0x00>;
|
|
linux,default-trigger = "phy0tx";
|
|
default-state = "off";
|
|
};
|
|
|
|
bt_active_led {
|
|
label = "blue:bt";
|
|
gpios = <0x45 0x07 0x00>;
|
|
linux,default-trigger = "hci0-power";
|
|
default-state = "off";
|
|
};
|
|
};
|
|
|
|
pmic@fff34000 {
|
|
compatible = "hisilicon,hi6421v530-pmic";
|
|
reg = <0x00 0xfff34000 0x00 0x1000>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
phandle = <0xd7>;
|
|
|
|
regulators {
|
|
|
|
LDO3 {
|
|
regulator-name = "VOUT3_1V85";
|
|
regulator-min-microvolt = <0x1b7740>;
|
|
regulator-max-microvolt = <0x2191c0>;
|
|
regulator-enable-ramp-delay = <0x78>;
|
|
phandle = <0x1f>;
|
|
};
|
|
|
|
LDO9 {
|
|
regulator-name = "VOUT9_1V8_2V95";
|
|
regulator-min-microvolt = <0x1ab3f0>;
|
|
regulator-max-microvolt = <0x325aa0>;
|
|
regulator-enable-ramp-delay = <0xf0>;
|
|
phandle = <0x4a>;
|
|
};
|
|
|
|
LDO11 {
|
|
regulator-name = "VOUT11_1V8_2V95";
|
|
regulator-min-microvolt = <0x1ab3f0>;
|
|
regulator-max-microvolt = <0x325aa0>;
|
|
regulator-enable-ramp-delay = <0xf0>;
|
|
phandle = <0xd8>;
|
|
};
|
|
|
|
LDO15 {
|
|
regulator-name = "VOUT15_3V0";
|
|
regulator-min-microvolt = <0x1ab3f0>;
|
|
regulator-max-microvolt = <0x2dc6c0>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-enable-ramp-delay = <0x78>;
|
|
phandle = <0xd9>;
|
|
};
|
|
|
|
LDO16 {
|
|
regulator-name = "VOUT16_2V95";
|
|
regulator-min-microvolt = <0x1ab3f0>;
|
|
regulator-max-microvolt = <0x2dc6c0>;
|
|
regulator-enable-ramp-delay = <0x168>;
|
|
phandle = <0x49>;
|
|
};
|
|
};
|
|
};
|
|
|
|
wlan-en-1-8v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "wlan-en-regulator";
|
|
regulator-min-microvolt = <0x1b7740>;
|
|
regulator-max-microvolt = <0x1b7740>;
|
|
gpio = <0x80 0x03 0x00>;
|
|
startup-delay-us = <0x11170>;
|
|
enable-active-high;
|
|
phandle = <0x4e>;
|
|
};
|
|
|
|
firmware {
|
|
|
|
optee {
|
|
compatible = "linaro,optee-tz";
|
|
method = "smc";
|
|
};
|
|
};
|
|
|
|
hisi_hikey_usb {
|
|
compatible = "hisilicon,gpio_hubv1";
|
|
typec-vbus-gpios = <0x45 0x02 0x00>;
|
|
otg-switch-gpios = <0x45 0x06 0x00>;
|
|
hub-vdd33-en-gpios = <0x21 0x06 0x00>;
|
|
usb-role-switch;
|
|
phandle = <0xda>;
|
|
|
|
port {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
endpoint@0 {
|
|
reg = <0x00>;
|
|
remote-endpoint = <0x81>;
|
|
phandle = <0x54>;
|
|
};
|
|
|
|
endpoint@1 {
|
|
reg = <0x01>;
|
|
remote-endpoint = <0x82>;
|
|
phandle = <0x1e>;
|
|
};
|
|
};
|
|
};
|
|
|
|
hi3660_i2s {
|
|
compatible = "hisilicon,hi3660-i2s-1.0";
|
|
reg = <0x00 0xe804f800 0x00 0x400 0x00 0xe804e000 0x00 0x400>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x83 0x84>;
|
|
dmas = <0x85 0x12 0x85 0x13>;
|
|
dma-names = "rx", "tx";
|
|
#sound-dai-cells = <0x00>;
|
|
phandle = <0x87>;
|
|
};
|
|
|
|
sound {
|
|
compatible = "simple-audio-card";
|
|
simple-audio-card,name = "hikey-hdmi";
|
|
simple-audio-card,format = "i2s";
|
|
simple-audio-card,bitclock-master = <0x86>;
|
|
simple-audio-card,frame-master = <0x86>;
|
|
|
|
simple-audio-card,cpu {
|
|
sound-dai = <0x87>;
|
|
phandle = <0x86>;
|
|
};
|
|
|
|
simple-audio-card,codec {
|
|
sound-dai = <0x88>;
|
|
};
|
|
};
|
|
|
|
__symbols__ {
|
|
cpu0 = "/cpus/cpu@0";
|
|
cpu1 = "/cpus/cpu@1";
|
|
cpu2 = "/cpus/cpu@2";
|
|
cpu3 = "/cpus/cpu@3";
|
|
cpu4 = "/cpus/cpu@100";
|
|
cpu5 = "/cpus/cpu@101";
|
|
cpu6 = "/cpus/cpu@102";
|
|
cpu7 = "/cpus/cpu@103";
|
|
CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
|
|
CLUSTER_SLEEP_0 = "/cpus/idle-states/cluster-sleep-0";
|
|
CPU_SLEEP_1 = "/cpus/idle-states/cpu-sleep-1";
|
|
CLUSTER_SLEEP_1 = "/cpus/idle-states/cluster-sleep-1";
|
|
A53_L2 = "/cpus/l2-cache0";
|
|
A73_L2 = "/cpus/l2-cache1";
|
|
cluster0_opp = "/opp_table0";
|
|
cluster1_opp = "/opp_table1";
|
|
gic = "/interrupt-controller@e82b0000";
|
|
crg_ctrl = "/soc/crg_ctrl@fff35000";
|
|
crg_rst = "/soc/crg_rst_controller";
|
|
pctrl = "/soc/pctrl@e8a09000";
|
|
pmuctrl = "/soc/crg_ctrl@fff34000";
|
|
sctrl = "/soc/sctrl@fff0a000";
|
|
iomcu = "/soc/iomcu@ffd7e000";
|
|
iomcu_rst = "/soc/reset";
|
|
mailbox = "/soc/mailbox@e896b000";
|
|
stub_clock = "/soc/stub_clock@e896b500";
|
|
dual_timer0 = "/soc/timer@fff14000";
|
|
i2c0 = "/soc/i2c@ffd71000";
|
|
i2c1 = "/soc/i2c@ffd72000";
|
|
rt1711h = "/soc/i2c@ffd72000/rt1711h@4e";
|
|
usb_con = "/soc/i2c@ffd72000/rt1711h@4e/connector";
|
|
usb_con_ss = "/soc/i2c@ffd72000/rt1711h@4e/connector/ports/port@1/endpoint";
|
|
rt1711h_ep = "/soc/i2c@ffd72000/rt1711h@4e/port/endpoint@0";
|
|
adv7533 = "/soc/i2c@ffd72000/adv7533@39";
|
|
adv7533_in = "/soc/i2c@ffd72000/adv7533@39/ports/port@0/endpoint";
|
|
i2c3 = "/soc/i2c@fdf0c000";
|
|
i2c7 = "/soc/i2c@fdf0b000";
|
|
uart0 = "/soc/serial@fdf02000";
|
|
uart1 = "/soc/serial@fdf00000";
|
|
uart2 = "/soc/serial@fdf03000";
|
|
uart3 = "/soc/serial@ffd74000";
|
|
uart4 = "/soc/serial@fdf01000";
|
|
uart5 = "/soc/serial@fdf05000";
|
|
uart6 = "/soc/serial@fff32000";
|
|
dma0 = "/soc/dma@fdf30000";
|
|
asp_dmac = "/soc/dma-controller@e804b000";
|
|
rtc0 = "/soc/rtc@fff04000";
|
|
gpio0 = "/soc/gpio@e8a0b000";
|
|
gpio1 = "/soc/gpio@e8a0c000";
|
|
gpio2 = "/soc/gpio@e8a0d000";
|
|
gpio3 = "/soc/gpio@e8a0e000";
|
|
gpio4 = "/soc/gpio@e8a0f000";
|
|
gpio5 = "/soc/gpio@e8a10000";
|
|
gpio6 = "/soc/gpio@e8a11000";
|
|
gpio7 = "/soc/gpio@e8a12000";
|
|
gpio8 = "/soc/gpio@e8a13000";
|
|
gpio9 = "/soc/gpio@e8a14000";
|
|
gpio10 = "/soc/gpio@e8a15000";
|
|
gpio11 = "/soc/gpio@e8a16000";
|
|
gpio12 = "/soc/gpio@e8a17000";
|
|
gpio13 = "/soc/gpio@e8a18000";
|
|
gpio14 = "/soc/gpio@e8a19000";
|
|
gpio15 = "/soc/gpio@e8a1a000";
|
|
gpio16 = "/soc/gpio@e8a1b000";
|
|
gpio17 = "/soc/gpio@e8a1c000";
|
|
gpio18 = "/soc/gpio@ff3b4000";
|
|
gpio19 = "/soc/gpio@ff3b5000";
|
|
gpio20 = "/soc/gpio@e8a1f000";
|
|
gpio21 = "/soc/gpio@e8a20000";
|
|
gpio22 = "/soc/gpio@fff0b000";
|
|
gpio23 = "/soc/gpio@fff0c000";
|
|
gpio24 = "/soc/gpio@fff0d000";
|
|
gpio25 = "/soc/gpio@fff0e000";
|
|
gpio26 = "/soc/gpio@fff0f000";
|
|
gpio27 = "/soc/gpio@fff10000";
|
|
gpio28 = "/soc/gpio@fff1d000";
|
|
spi2 = "/soc/spi@ffd68000";
|
|
spi3 = "/soc/spi@ff3b3000";
|
|
ufs = "/soc/ufs@ff3b0000";
|
|
dwmmc1 = "/soc/dwmmc1@ff37f000";
|
|
dwmmc2 = "/soc/dwmmc2@ff3ff000";
|
|
wlcore = "/soc/dwmmc2@ff3ff000/wlcore@2";
|
|
watchdog0 = "/soc/watchdog@e8a06000";
|
|
watchdog1 = "/soc/watchdog@e8a07000";
|
|
tsensor = "/soc/tsensor@fff30000";
|
|
cls0 = "/soc/thermal-zones/cls0";
|
|
threshold = "/soc/thermal-zones/cls0/trips/trip-point@0";
|
|
target = "/soc/thermal-zones/cls0/trips/trip-point@1";
|
|
usb3_otg_bc = "/soc/usb3_otg_bc@ff200000";
|
|
usb_phy = "/soc/usb3_otg_bc@ff200000/usb-phy";
|
|
dwc3 = "/soc/dwc3@ff100000";
|
|
dwc3_role_switch = "/soc/dwc3@ff100000/port/endpoint@0";
|
|
dwc3_ss = "/soc/dwc3@ff100000/port/endpoint@1";
|
|
etm0_out = "/soc/etm@ecc40000/out-ports/port/endpoint";
|
|
etm1_out = "/soc/etm@ecd40000/out-ports/port/endpoint";
|
|
etm2_out = "/soc/etm@ece40000/out-ports/port/endpoint";
|
|
etm3_out = "/soc/etm@ecf40000/out-ports/port/endpoint";
|
|
cluster0_funnel_out = "/soc/funnel@ec801000/out-ports/port/endpoint";
|
|
cluster0_funnel_in0 = "/soc/funnel@ec801000/in-ports/port@0/endpoint";
|
|
cluster0_funnel_in1 = "/soc/funnel@ec801000/in-ports/port@1/endpoint";
|
|
cluster0_funnel_in2 = "/soc/funnel@ec801000/in-ports/port@2/endpoint";
|
|
cluster0_funnel_in3 = "/soc/funnel@ec801000/in-ports/port@3/endpoint";
|
|
cluster0_etf_in = "/soc/etf@ec802000/in-ports/port/endpoint";
|
|
cluster0_etf_out = "/soc/etf@ec802000/out-ports/port/endpoint";
|
|
etm4_out = "/soc/etm@ed440000/out-ports/port/endpoint";
|
|
etm5_out = "/soc/etm@ed540000/out-ports/port/endpoint";
|
|
etm6_out = "/soc/etm@ed640000/out-ports/port/endpoint";
|
|
etm7_out = "/soc/etm@ed740000/out-ports/port/endpoint";
|
|
cluster1_funnel_out = "/soc/funnel@ed001000/out-ports/port/endpoint";
|
|
cluster1_funnel_in0 = "/soc/funnel@ed001000/in-ports/port@0/endpoint";
|
|
cluster1_funnel_in1 = "/soc/funnel@ed001000/in-ports/port@1/endpoint";
|
|
cluster1_funnel_in2 = "/soc/funnel@ed001000/in-ports/port@2/endpoint";
|
|
cluster1_funnel_in3 = "/soc/funnel@ed001000/in-ports/port@3/endpoint";
|
|
cluster1_etf_in = "/soc/etf@ed002000/in-ports/port/endpoint";
|
|
cluster1_etf_out = "/soc/etf@ed002000/out-ports/port/endpoint";
|
|
combo_funnel_out = "/soc/funnel/out-ports/port/endpoint";
|
|
combo_funnel_in0 = "/soc/funnel/in-ports/port@0/endpoint";
|
|
combo_funnel_in1 = "/soc/funnel/in-ports/port@1/endpoint";
|
|
top_funnel_out = "/soc/funnel@ec031000/out-ports/port/endpoint";
|
|
top_funnel_in = "/soc/funnel@ec031000/in-ports/port@0/endpoint";
|
|
top_etf_in = "/soc/etf@ec036000/in-ports/port/endpoint";
|
|
top_etf_out = "/soc/etf@ec036000/out-ports/port/endpoint";
|
|
replicator_in = "/soc/replicator/in-ports/port/endpoint";
|
|
replicator0_out0 = "/soc/replicator/out-ports/port@0/endpoint";
|
|
replicator0_out1 = "/soc/replicator/out-ports/port@1/endpoint";
|
|
etr_in = "/soc/etr@ec033000/in-ports/port/endpoint";
|
|
tpiu_in = "/soc/tpiu@ec032000/in-ports/port/endpoint";
|
|
range = "/soc/gpio-range";
|
|
pmx0 = "/soc/pinmux@e896c000";
|
|
pmu_pmx_func = "/soc/pinmux@e896c000/pmu_pmx_func";
|
|
csi0_pwd_n_pmx_func = "/soc/pinmux@e896c000/csi0_pwd_n_pmx_func";
|
|
csi1_pwd_n_pmx_func = "/soc/pinmux@e896c000/csi1_pwd_n_pmx_func";
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isp0_pmx_func = "/soc/pinmux@e896c000/isp0_pmx_func";
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isp1_pmx_func = "/soc/pinmux@e896c000/isp1_pmx_func";
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pwr_key_pmx_func = "/soc/pinmux@e896c000/pwr_key_pmx_func";
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i2c3_pmx_func = "/soc/pinmux@e896c000/i2c3_pmx_func";
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i2c4_pmx_func = "/soc/pinmux@e896c000/i2c4_pmx_func";
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pcie_perstn_pmx_func = "/soc/pinmux@e896c000/pcie_perstn_pmx_func";
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usbhub5734_pmx_func = "/soc/pinmux@e896c000/usbhub5734_pmx_func";
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uart0_pmx_func = "/soc/pinmux@e896c000/uart0_pmx_func";
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uart1_pmx_func = "/soc/pinmux@e896c000/uart1_pmx_func";
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uart2_pmx_func = "/soc/pinmux@e896c000/uart2_pmx_func";
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uart3_pmx_func = "/soc/pinmux@e896c000/uart3_pmx_func";
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uart4_pmx_func = "/soc/pinmux@e896c000/uart4_pmx_func";
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uart5_pmx_func = "/soc/pinmux@e896c000/uart5_pmx_func";
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uart6_pmx_func = "/soc/pinmux@e896c000/uart6_pmx_func";
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cam0_rst_pmx_func = "/soc/pinmux@e896c000/cam0_rst_pmx_func";
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cam1_rst_pmx_func = "/soc/pinmux@e896c000/cam1_rst_pmx_func";
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pmx1 = "/soc/pinmux@ff37e000";
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sd_pmx_func = "/soc/pinmux@ff37e000/sd_pmx_func";
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pmx2 = "/soc/pinmux@ff3b6000";
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ufs_pmx_func = "/soc/pinmux@ff3b6000/ufs_pmx_func";
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spi3_pmx_func = "/soc/pinmux@ff3b6000/spi3_pmx_func";
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pmx3 = "/soc/pinmux@ff3fd000";
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sdio_pmx_func = "/soc/pinmux@ff3fd000/sdio_pmx_func";
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pmx4 = "/soc/pinmux@fff11000";
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i2s2_pmx_func = "/soc/pinmux@fff11000/i2s2_pmx_func";
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slimbus_pmx_func = "/soc/pinmux@fff11000/slimbus_pmx_func";
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i2c0_pmx_func = "/soc/pinmux@fff11000/i2c0_pmx_func";
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i2c1_pmx_func = "/soc/pinmux@fff11000/i2c1_pmx_func";
|
|
i2c7_pmx_func = "/soc/pinmux@fff11000/i2c7_pmx_func";
|
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pcie_pmx_func = "/soc/pinmux@fff11000/pcie_pmx_func";
|
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spi2_pmx_func = "/soc/pinmux@fff11000/spi2_pmx_func";
|
|
i2s0_pmx_func = "/soc/pinmux@fff11000/i2s0_pmx_func";
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pmx5 = "/soc/pinmux@e896c800";
|
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pmu_cfg_func = "/soc/pinmux@e896c800/pmu_cfg_func";
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|
i2c3_cfg_func = "/soc/pinmux@e896c800/i2c3_cfg_func";
|
|
csi0_pwd_n_cfg_func = "/soc/pinmux@e896c800/csi0_pwd_n_cfg_func";
|
|
csi1_pwd_n_cfg_func = "/soc/pinmux@e896c800/csi1_pwd_n_cfg_func";
|
|
isp0_cfg_func = "/soc/pinmux@e896c800/isp0_cfg_func";
|
|
isp1_cfg_func = "/soc/pinmux@e896c800/isp1_cfg_func";
|
|
pwr_key_cfg_func = "/soc/pinmux@e896c800/pwr_key_cfg_func";
|
|
uart1_cfg_func = "/soc/pinmux@e896c800/uart1_cfg_func";
|
|
uart2_cfg_func = "/soc/pinmux@e896c800/uart2_cfg_func";
|
|
uart5_cfg_func = "/soc/pinmux@e896c800/uart5_cfg_func";
|
|
cam0_rst_cfg_func = "/soc/pinmux@e896c800/cam0_rst_cfg_func";
|
|
uart0_cfg_func = "/soc/pinmux@e896c800/uart0_cfg_func";
|
|
uart6_cfg_func = "/soc/pinmux@e896c800/uart6_cfg_func";
|
|
uart3_cfg_func = "/soc/pinmux@e896c800/uart3_cfg_func";
|
|
uart4_cfg_func = "/soc/pinmux@e896c800/uart4_cfg_func";
|
|
cam1_rst_cfg_func = "/soc/pinmux@e896c800/cam1_rst_cfg_func";
|
|
pmx6 = "/soc/pinmux@ff3b6800";
|
|
ufs_cfg_func = "/soc/pinmux@ff3b6800/ufs_cfg_func";
|
|
spi3_cfg_func = "/soc/pinmux@ff3b6800/spi3_cfg_func";
|
|
pmx7 = "/soc/pinmux@ff3fd800";
|
|
sdio_clk_cfg_func = "/soc/pinmux@ff3fd800/sdio_clk_cfg_func";
|
|
sdio_cfg_func = "/soc/pinmux@ff3fd800/sdio_cfg_func";
|
|
pmx8 = "/soc/pinmux@ff37e800";
|
|
sd_clk_cfg_func = "/soc/pinmux@ff37e800/sd_clk_cfg_func";
|
|
sd_cfg_func = "/soc/pinmux@ff37e800/sd_cfg_func";
|
|
pmx9 = "/soc/pinmux@fff11800";
|
|
i2c0_cfg_func = "/soc/pinmux@fff11800/i2c0_cfg_func";
|
|
i2c1_cfg_func = "/soc/pinmux@fff11800/i2c1_cfg_func";
|
|
i2c7_cfg_func = "/soc/pinmux@fff11800/i2c7_cfg_func";
|
|
slimbus_cfg_func = "/soc/pinmux@fff11800/slimbus_cfg_func";
|
|
i2s0_cfg_func = "/soc/pinmux@fff11800/i2s0_cfg_func";
|
|
i2s2_cfg_func = "/soc/pinmux@fff11800/i2s2_cfg_func";
|
|
pcie_cfg_func = "/soc/pinmux@fff11800/pcie_cfg_func";
|
|
spi2_cfg_func = "/soc/pinmux@fff11800/spi2_cfg_func";
|
|
usb_cfg_func = "/soc/pinmux@fff11800/usb_cfg_func";
|
|
dpe = "/dpe@E8600000";
|
|
dpe_out = "/dpe@E8600000/port/endpoint";
|
|
dsi = "/dsi@E8601000";
|
|
dsi_in = "/dsi@E8601000/ports/port@0/endpoint";
|
|
dsi_out0 = "/dsi@E8601000/ports/port@1/endpoint@0";
|
|
gpu = "/mali@E82C0000";
|
|
pmic = "/pmic@fff34000";
|
|
ldo3 = "/pmic@fff34000/regulators/LDO3";
|
|
ldo9 = "/pmic@fff34000/regulators/LDO9";
|
|
ldo11 = "/pmic@fff34000/regulators/LDO11";
|
|
ldo15 = "/pmic@fff34000/regulators/LDO15";
|
|
ldo16 = "/pmic@fff34000/regulators/LDO16";
|
|
wlan_en = "/wlan-en-1-8v";
|
|
hisi_hikey_usb = "/hisi_hikey_usb";
|
|
hikey_usb_ep0 = "/hisi_hikey_usb/port/endpoint@0";
|
|
hikey_usb_ep1 = "/hisi_hikey_usb/port/endpoint@1";
|
|
i2s2 = "/hi3660_i2s";
|
|
sound_master = "/sound/simple-audio-card,cpu";
|
|
};
|
|
};
|