875 lines
22 KiB
C
Executable file
875 lines
22 KiB
C
Executable file
/*
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* Copyright (c) 2018 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License Version 2 as publised
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* by the Free Software Foundation.
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*
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* BTS Bus Traffic Shaper device driver operation functions set
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*
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*/
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#include <linux/io.h>
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#include <dt-bindings/soc/samsung/exynos-bts.h>
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#include "regs-btss5e9925.h"
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#include "bts.h"
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/****************************************************************
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* init ops functions *
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****************************************************************/
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static void init_trexbts(void __iomem *base)
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{
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unsigned int w1;
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if (!base)
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return;
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/* high [27:24] mid [19:16] threshold */
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w1 = __raw_readl(base + SCI_CTRL);
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w1 |= (0xB << HIGH_THRESHOLD_SHIFT) | (0x7 << MID_THRESHOLD_SHIFT);
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__raw_writel(w1, base + SCI_CTRL);
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__raw_writel(0x10101010, base + TH_IMM_R_0);
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__raw_writel(0x28282828, base + TH_IMM_W_0);
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__raw_writel(0x10101010, base + TH_HIGH_R_0);
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__raw_writel(0x28282828, base + TH_HIGH_W_0);
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}
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static void init_qmax(void __iomem *base)
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{
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unsigned int threshold = 0;
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unsigned int tmp_reg;
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if (!base)
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return;
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/* Read threshold set */
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threshold = DEFAULT_QMAX_RD_TH;
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if (threshold > 0xFFFF)
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threshold = 0xFFFF;
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tmp_reg = __raw_readl(base + QMAX_THRESHOLD_R);
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tmp_reg &= ~(0xFFFF << 0);
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tmp_reg |= (threshold << 0);
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__raw_writel(tmp_reg, base + QMAX_THRESHOLD_R);
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/* Write threshold set */
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threshold = DEFAULT_QMAX_WR_TH;
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if (threshold > 0xFFFF)
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threshold = 0xFFFF;
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tmp_reg = __raw_readl(base + QMAX_THRESHOLD_W);
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tmp_reg &= ~(0xFFFF << 0);
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tmp_reg |= (threshold << 0);
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__raw_writel(tmp_reg, base + QMAX_THRESHOLD_W);
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}
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static void init_sci(void __iomem *base)
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{
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if (!base)
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return;
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}
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static void init_smc(void __iomem *base)
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{
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if (!base)
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return;
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/* SchedulerCtrl0 */
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__raw_writel(0x483F3F10, base);
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}
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/****************************************************************
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* ip bts ops functions *
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****************************************************************/
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static int set_ipbts_qos(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg_r = 0;
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unsigned int tmp_reg_w = 0;
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unsigned int tmp_reg = 0;
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if (!base || !stat)
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return -ENODATA;
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/* xCON[8] = AxQoS override *1:override, 0:bypass */
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if (stat->bypass) {
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tmp_reg_r = __raw_readl(base + RCON);
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tmp_reg_r = tmp_reg_r & ~(0x1 << AXQOS_BYPASS);
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tmp_reg_w = __raw_readl(base + WCON);
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tmp_reg_w = tmp_reg_w & ~(0x1 << AXQOS_BYPASS);
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__raw_writel(tmp_reg_r, base + RCON);
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__raw_writel(tmp_reg_w, base + WCON);
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return 0;
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}
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if (stat->arqos > MAX_QOS)
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stat->arqos = MAX_QOS;
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/* xCON[15:12] = AxQoS value */
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tmp_reg_r = __raw_readl(base + RCON);
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tmp_reg_r = tmp_reg_r & ~((0x1 << AXQOS_BYPASS) | (MAX_QOS << AXQOS_VAL));
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tmp_reg_r = tmp_reg_r | (0x1 << AXQOS_BYPASS) | (stat->arqos << AXQOS_VAL);
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if (stat->awqos > MAX_QOS)
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stat->awqos = MAX_QOS;
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/* xCON[15:12] = AxQoS value */
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tmp_reg_w = __raw_readl(base + WCON);
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tmp_reg_w = tmp_reg_w & ~((0x1 << AXQOS_BYPASS) | (MAX_QOS << AXQOS_VAL));
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tmp_reg_w = tmp_reg_w | (0x1 << AXQOS_BYPASS) | (stat->awqos << AXQOS_VAL);
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__raw_writel(tmp_reg_r, base + RCON);
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__raw_writel(tmp_reg_w, base + WCON);
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/* CONTROL[0] = QoS on/off */
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tmp_reg = __raw_readl(base + CON);
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tmp_reg = tmp_reg & ~(0x1 << AXQOS_ONOFF);
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tmp_reg = tmp_reg | (0x1 << AXQOS_ONOFF);
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__raw_writel(tmp_reg, base + CON);
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return 0;
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}
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static int get_ipbts_qos(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg_r = 0;
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unsigned int tmp_reg_w = 0;
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if (!base || !stat)
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return -ENODATA;
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tmp_reg_r = __raw_readl(base + RCON);
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tmp_reg_r = (tmp_reg_r & (0x1 << AXQOS_BYPASS)) >> AXQOS_BYPASS;
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tmp_reg_w = __raw_readl(base + WCON);
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tmp_reg_w = (tmp_reg_w & (0x1 << AXQOS_BYPASS)) >> AXQOS_BYPASS;
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if (!tmp_reg_r || !tmp_reg_w)
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stat->bypass = true;
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else
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stat->bypass = false;
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tmp_reg_r = __raw_readl(base + RCON);
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tmp_reg_r = (tmp_reg_r & (MAX_QOS << AXQOS_VAL)) >> AXQOS_VAL;
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tmp_reg_w = __raw_readl(base + WCON);
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tmp_reg_w = (tmp_reg_w & (MAX_QOS << AXQOS_VAL)) >> AXQOS_VAL;
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stat->arqos = tmp_reg_r;
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stat->awqos = tmp_reg_w;
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return 0;
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}
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static int set_ipbts_mo(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg_r = 0;
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unsigned int tmp_reg_w = 0;
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if (!base || !stat)
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return -ENODATA;
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if (stat->rmo > MAX_MO || !stat->rmo)
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stat->rmo = MAX_MO;
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tmp_reg_r = __raw_readl(base + RBLK_UPPER);
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tmp_reg_r = tmp_reg_r & ~(MAX_MO << BLOCK_UPPER);
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tmp_reg_r = tmp_reg_r | (stat->rmo << BLOCK_UPPER);
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if (stat->wmo > MAX_MO || !stat->wmo)
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stat->wmo = MAX_MO;
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tmp_reg_w = __raw_readl(base + WBLK_UPPER);
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tmp_reg_w = tmp_reg_w & ~(MAX_MO << BLOCK_UPPER);
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tmp_reg_w = tmp_reg_w | (stat->wmo << BLOCK_UPPER);
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__raw_writel(tmp_reg_r, base + RBLK_UPPER);
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__raw_writel(tmp_reg_w, base + WBLK_UPPER);
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return 0;
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}
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static int get_ipbts_mo(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg_r = 0;
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unsigned int tmp_reg_w = 0;
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if (!base || !stat)
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return -ENODATA;
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tmp_reg_r = __raw_readl(base + RBLK_UPPER);
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tmp_reg_r = (tmp_reg_r & (MAX_MO << BLOCK_UPPER)) >> BLOCK_UPPER;
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tmp_reg_w = __raw_readl(base + WBLK_UPPER);
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tmp_reg_w = (tmp_reg_w & (MAX_MO << BLOCK_UPPER)) >> BLOCK_UPPER;
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stat->rmo = tmp_reg_r;
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stat->wmo = tmp_reg_w;
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return 0;
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}
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static int set_ipbts_urgent(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg = 0;
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if (!base || !stat)
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return -ENODATA;
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if (stat->qurgent_th_r > MAX_QUTH)
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stat->qurgent_th_r = MAX_QUTH;
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if (stat->qurgent_th_w > MAX_QUTH)
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stat->qurgent_th_w = MAX_QUTH;
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/* Read QUrgent */
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tmp_reg = __raw_readl(base + TIMEOUT_R0);
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tmp_reg = tmp_reg & ~((MAX_QUTH << TIMEOUT_CNT_VC0)
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| (MAX_QUTH << TIMEOUT_CNT_VC1)
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| (MAX_QUTH << TIMEOUT_CNT_VC2)
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| (MAX_QUTH << TIMEOUT_CNT_VC3));
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tmp_reg = tmp_reg | (stat->qurgent_th_r << TIMEOUT_CNT_VC0)
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| (stat->qurgent_th_r << TIMEOUT_CNT_VC1)
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| (stat->qurgent_th_r << TIMEOUT_CNT_VC2)
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| (stat->qurgent_th_r << TIMEOUT_CNT_VC3);
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__raw_writel(tmp_reg, base + TIMEOUT_R0);
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/* Write QUrgent */
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tmp_reg = __raw_readl(base + TIMEOUT_W0);
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tmp_reg = tmp_reg & ~((MAX_QUTH << TIMEOUT_CNT_VC0)
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| (MAX_QUTH << TIMEOUT_CNT_VC1)
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| (MAX_QUTH << TIMEOUT_CNT_VC2)
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| (MAX_QUTH << TIMEOUT_CNT_VC3));
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tmp_reg = tmp_reg | (stat->qurgent_th_w << TIMEOUT_CNT_VC0)
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| (stat->qurgent_th_w << TIMEOUT_CNT_VC1)
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| (stat->qurgent_th_w << TIMEOUT_CNT_VC2)
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| (stat->qurgent_th_w << TIMEOUT_CNT_VC3);
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__raw_writel(tmp_reg, base + TIMEOUT_W0);
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tmp_reg = __raw_readl(base + CON);
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tmp_reg = tmp_reg & ~(0xFF << QURGENT_EN);
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if (stat->qurgent_on)
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tmp_reg = tmp_reg | (stat->qurgent_on << QURGENT_EN);
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__raw_writel(tmp_reg, base + CON);
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return 0;
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}
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static int get_ipbts_urgent(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg = 0;
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if (!base || !stat)
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return -ENODATA;
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tmp_reg = __raw_readl(base + TIMEOUT_R0);
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stat->qurgent_th_r = (tmp_reg & (MAX_QUTH << TIMEOUT_CNT_VC0)) >> TIMEOUT_CNT_VC0;
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tmp_reg = __raw_readl(base + TIMEOUT_W0);
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stat->qurgent_th_w = (tmp_reg & (MAX_QUTH << TIMEOUT_CNT_VC0)) >> TIMEOUT_CNT_VC0;
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tmp_reg = __raw_readl(base + CON);
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stat->qurgent_on = (tmp_reg & (0xFF << QURGENT_EN)) >> QURGENT_EN;
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return 0;
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}
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static int set_ipbts_blocking(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg_r = 0;
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unsigned int tmp_reg_w = 0;
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if (!base || !stat)
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return -ENODATA;
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if (stat->blocking_on) {
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if (stat->qfull_limit_r > MAX_MO)
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stat->qfull_limit_r = MAX_MO;
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if (stat->qfull_limit_w > MAX_MO)
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stat->qfull_limit_w = MAX_MO;
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tmp_reg_r = __raw_readl(base + RBLK_UPPER_FULL);
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tmp_reg_r = tmp_reg_r & ~(MAX_MO << BLOCK_UPPER);
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tmp_reg_r = tmp_reg_r | (stat->qfull_limit_r << BLOCK_UPPER);
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tmp_reg_w = __raw_readl(base + WBLK_UPPER_FULL);
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tmp_reg_w = tmp_reg_w & ~(MAX_MO << BLOCK_UPPER);
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tmp_reg_w = tmp_reg_w | (stat->qfull_limit_w << BLOCK_UPPER);
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__raw_writel(tmp_reg_r, base + RBLK_UPPER_FULL);
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__raw_writel(tmp_reg_w, base + WBLK_UPPER_FULL);
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if (stat->qbusy_limit_r > MAX_MO)
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stat->qbusy_limit_r = MAX_MO;
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if (stat->qbusy_limit_w > MAX_MO)
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stat->qbusy_limit_w = MAX_MO;
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tmp_reg_r = __raw_readl(base + RBLK_UPPER_BUSY);
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tmp_reg_r = tmp_reg_r & ~(MAX_MO << BLOCK_UPPER);
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tmp_reg_r = tmp_reg_r | (stat->qbusy_limit_r << BLOCK_UPPER);
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tmp_reg_w = __raw_readl(base + WBLK_UPPER_BUSY);
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tmp_reg_w = tmp_reg_w & ~(MAX_MO << BLOCK_UPPER);
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tmp_reg_w = tmp_reg_w | (stat->qbusy_limit_w << BLOCK_UPPER);
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__raw_writel(tmp_reg_r, base + RBLK_UPPER_BUSY);
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__raw_writel(tmp_reg_w, base + WBLK_UPPER_BUSY);
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if (stat->qmax0_limit_r > MAX_MO)
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stat->qmax0_limit_r = MAX_MO;
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if (stat->qmax0_limit_w > MAX_MO)
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stat->qmax0_limit_w = MAX_MO;
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if (stat->qmax1_limit_r > MAX_MO)
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stat->qmax1_limit_r = MAX_MO;
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if (stat->qmax1_limit_w > MAX_MO)
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stat->qmax1_limit_w = MAX_MO;
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tmp_reg_r = __raw_readl(base + RBLK_UPPER_MAX);
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tmp_reg_r &= ~((MAX_MO << BLOCK_UPPER1) | (MAX_MO << BLOCK_UPPER0));
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tmp_reg_r |= ((stat->qmax1_limit_r << BLOCK_UPPER1) | (stat->qmax0_limit_r << BLOCK_UPPER0));
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tmp_reg_w = __raw_readl(base + WBLK_UPPER_MAX);
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tmp_reg_w &= ~((MAX_MO << BLOCK_UPPER1) | (MAX_MO << BLOCK_UPPER0));
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tmp_reg_w |= ((stat->qmax1_limit_w << BLOCK_UPPER1) | (stat->qmax0_limit_w << BLOCK_UPPER0));
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__raw_writel(tmp_reg_r, base + RBLK_UPPER_MAX);
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__raw_writel(tmp_reg_w, base + WBLK_UPPER_MAX);
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tmp_reg_r = __raw_readl(base + RCON);
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tmp_reg_r = tmp_reg_r & ~(0x1 << BLOCKING_EN);
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tmp_reg_r = tmp_reg_r | (0x1 << BLOCKING_EN);
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__raw_writel(tmp_reg_r, base + RCON);
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tmp_reg_w = __raw_readl(base + WCON);
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tmp_reg_w = tmp_reg_w & ~(0x1 << BLOCKING_EN);
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tmp_reg_w = tmp_reg_w | (0x1 << BLOCKING_EN);
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__raw_writel(tmp_reg_w, base + WCON);
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} else {
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tmp_reg_r = __raw_readl(base + RCON);
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tmp_reg_r = tmp_reg_r & ~(0x1 << BLOCKING_EN);
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__raw_writel(tmp_reg_r, base + RCON);
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tmp_reg_w = __raw_readl(base + WCON);
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tmp_reg_w = tmp_reg_w & ~(0x1 << BLOCKING_EN);
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__raw_writel(tmp_reg_w, base + WCON);
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}
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return 0;
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}
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static int get_ipbts_blocking(void __iomem *base, struct bts_stat *stat)
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{
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unsigned int tmp_reg = 0;
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tmp_reg = __raw_readl(base + RCON);
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stat->blocking_on = (tmp_reg & (0x1 << BLOCKING_EN)) ? true : false;
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if (!stat->blocking_on)
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return 0;
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tmp_reg = __raw_readl(base + RBLK_UPPER_FULL);
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stat->qfull_limit_r = (tmp_reg & (MAX_MO << BLOCK_UPPER)) >> BLOCK_UPPER;
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tmp_reg = __raw_readl(base + WBLK_UPPER_FULL);
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stat->qfull_limit_w = (tmp_reg & (MAX_MO << BLOCK_UPPER)) >> BLOCK_UPPER;
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tmp_reg = __raw_readl(base + RBLK_UPPER_BUSY);
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stat->qbusy_limit_r = (tmp_reg & (MAX_MO << BLOCK_UPPER)) >> BLOCK_UPPER;
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tmp_reg = __raw_readl(base + WBLK_UPPER_BUSY);
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stat->qbusy_limit_w = (tmp_reg & (MAX_MO << BLOCK_UPPER)) >> BLOCK_UPPER;
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tmp_reg = __raw_readl(base + RBLK_UPPER_MAX);
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stat->qmax0_limit_r = (tmp_reg & (MAX_MO << BLOCK_UPPER0)) >> BLOCK_UPPER0;
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stat->qmax1_limit_r = (tmp_reg & (MAX_MO << BLOCK_UPPER1)) >> BLOCK_UPPER1;
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tmp_reg = __raw_readl(base + WBLK_UPPER_MAX);
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stat->qmax0_limit_w = (tmp_reg & (MAX_MO << BLOCK_UPPER0)) >> BLOCK_UPPER0;
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stat->qmax1_limit_w = (tmp_reg & (MAX_MO << BLOCK_UPPER1)) >> BLOCK_UPPER1;
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return 0;
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}
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static int set_ipbts(void __iomem *base, struct bts_stat *stat)
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{
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int ret = 0;
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if (!base || !stat)
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return -ENODATA;
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if (!stat->stat_on)
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return 0;
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ret = set_ipbts_qos(base, stat);
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if (ret) {
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pr_err("set_ipbts_qos failed! ret=%d\n", ret);
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return ret;
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}
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ret = set_ipbts_mo(base, stat);
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if (ret) {
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pr_err("set_ipbts_mo failed! ret=%d\n", ret);
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return ret;
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}
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ret = set_ipbts_urgent(base, stat);
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if (ret) {
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pr_err("set_ipbts_urgent failed! ret=%d\n", ret);
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return ret;
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}
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ret = set_ipbts_blocking(base, stat);
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if (ret) {
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pr_err("set_ipbts_blocking failed! ret=%d\n", ret);
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return ret;
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}
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return ret;
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}
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static int get_ipbts(void __iomem *base, struct bts_stat *stat)
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{
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int ret = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
ret = get_ipbts_qos(base, stat);
|
|
if (ret) {
|
|
pr_err("get_ipbts_qos failed! ret=%d\n", ret);
|
|
return ret;
|
|
}
|
|
ret = get_ipbts_mo(base, stat);
|
|
if (ret) {
|
|
pr_err("get_ipbts_mo failed! ret=%d\n", ret);
|
|
return ret;
|
|
}
|
|
ret = get_ipbts_urgent(base, stat);
|
|
if (ret) {
|
|
pr_err("get_ipbts_urgent failed! ret=%d\n", ret);
|
|
return ret;
|
|
}
|
|
ret = get_ipbts_blocking(base, stat);
|
|
if (ret) {
|
|
pr_err("get_ipbts_blocking failed! ret=%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************
|
|
* sci bts ops functions *
|
|
****************************************************************/
|
|
static int set_sci_mo(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
|
|
/* Set HurryLevel3MOR/W on heavy scenario */
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
if (!stat->stat_on)
|
|
return 0;
|
|
|
|
/* CRPxPort0QoSControl Set */
|
|
tmp_reg = __raw_readl(base + CRP0_P0_CTRL);
|
|
tmp_reg &= ~(0xFF << 16);
|
|
tmp_reg |= (0x88 << 16);
|
|
|
|
__raw_writel(tmp_reg, base + CRP0_P0_CTRL);
|
|
__raw_writel(tmp_reg, base + CRP1_P0_CTRL);
|
|
__raw_writel(tmp_reg, base + CRP2_P0_CTRL);
|
|
__raw_writel(tmp_reg, base + CRP3_P0_CTRL);
|
|
|
|
/* CRPxPort1QoSControl Set */
|
|
tmp_reg = __raw_readl(base + CRP0_P1_CTRL);
|
|
tmp_reg &= ~(0xFF << 16);
|
|
tmp_reg |= (0x88 << 16);
|
|
|
|
__raw_writel(tmp_reg, base + CRP0_P1_CTRL);
|
|
__raw_writel(tmp_reg, base + CRP1_P1_CTRL);
|
|
__raw_writel(tmp_reg, base + CRP2_P1_CTRL);
|
|
__raw_writel(tmp_reg, base + CRP3_P1_CTRL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int set_scibts(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
if (!stat->stat_on)
|
|
return 0;
|
|
|
|
ret = set_sci_mo(base, stat);
|
|
if (ret) {
|
|
pr_err("set_scibts_mo failed! ret=%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
|
|
static int set_scicpubts_mo(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
if (stat->rmo > MAX_MO || !stat->rmo)
|
|
stat->rmo = MAX_MO;
|
|
|
|
if (stat->wmo > MAX_MO || !stat->wmo)
|
|
stat->wmo = MAX_MO;
|
|
|
|
/*
|
|
* CRP_CTL3_X (0~3)
|
|
* MaxOutstandingPort0Rd [7:0] (cpu use 0/1/2/3)
|
|
* MaxOutstandingPort0Wr [15:8] (cpu use 0/1/2/3)
|
|
* MaxOutstandingPort1Rd [23:16] (gpu use 0/1/2/3)
|
|
* MaxOutstandingPort1Wr [31:24] (gpu use 0/1/2/3)
|
|
*/
|
|
tmp_reg = __raw_readl(base);
|
|
|
|
tmp_reg &= ~(0xFF << RMO_PORT_0 | 0xFF << WMO_PORT_0);
|
|
tmp_reg = tmp_reg | (stat->rmo << RMO_PORT_0 | stat->wmo << WMO_PORT_0);
|
|
|
|
__raw_writel(tmp_reg, base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int get_scicpubts_mo(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
unsigned int tmp_reg_r = 0;
|
|
unsigned int tmp_reg_w = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
tmp_reg = __raw_readl(base);
|
|
|
|
tmp_reg_r = (tmp_reg & (0xFF << RMO_PORT_0)) >> RMO_PORT_0;
|
|
tmp_reg_w = (tmp_reg & (0xFF << WMO_PORT_0)) >> WMO_PORT_0;
|
|
|
|
stat->rmo = tmp_reg_r;
|
|
stat->wmo = tmp_reg_w;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int set_scigpubts_mo(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
if (stat->rmo > MAX_MO || !stat->rmo)
|
|
stat->rmo = MAX_MO;
|
|
|
|
if (stat->wmo > MAX_MO || !stat->wmo)
|
|
stat->wmo = MAX_MO;
|
|
|
|
/*
|
|
* CRP_CTL3_X (Olympus 0~3)
|
|
* MaxOutstandingPort0Rd [7:0] (Olympus cpu use 0/3, not use 1/2)
|
|
* MaxOutstandingPort0Wr [15:8] (Olympus cpu use 0/3, not use 1/2)
|
|
* MaxOutstandingPort1Rd [23:16] (Olympus gpu use 0/1/2/3)
|
|
* MaxOutstandingPort1Wr [31:24] (Olympus gpu use 0/1/2/3)
|
|
*/
|
|
tmp_reg = __raw_readl(base);
|
|
|
|
tmp_reg &= ~(0xFF << RMO_PORT_1 | 0xFF << WMO_PORT_1);
|
|
tmp_reg = tmp_reg | (stat->rmo << RMO_PORT_1 | stat->wmo << WMO_PORT_1);
|
|
|
|
__raw_writel(tmp_reg, base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int get_scigpubts_mo(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
unsigned int tmp_reg_r = 0;
|
|
unsigned int tmp_reg_w = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
tmp_reg = __raw_readl(base);
|
|
|
|
tmp_reg_r = (tmp_reg & (0xFF << RMO_PORT_1)) >> RMO_PORT_1;
|
|
tmp_reg_w = (tmp_reg & (0xFF << WMO_PORT_1)) >> WMO_PORT_1;
|
|
|
|
stat->rmo = tmp_reg_r;
|
|
stat->wmo = tmp_reg_w;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int set_scigpubts_qos(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
void __iomem *qos_base = NULL;
|
|
|
|
if (!stat)
|
|
return -ENODATA;
|
|
|
|
qos_base = stat->qos_va_base;
|
|
|
|
if (!qos_base)
|
|
return 0;
|
|
|
|
/* QoS on */
|
|
if (stat->arqos || stat->awqos) { /* on */
|
|
tmp_reg = __raw_readl(qos_base + CORE_QOS_EN);
|
|
tmp_reg = tmp_reg | (0x1 << SCIQOS_EN);
|
|
__raw_writel(tmp_reg, qos_base + CORE_QOS_EN);
|
|
} else {
|
|
/* QoS off */
|
|
tmp_reg = __raw_readl(qos_base + CORE_QOS_EN);
|
|
tmp_reg = tmp_reg & ~(0x1 << SCIQOS_EN);
|
|
__raw_writel(tmp_reg, qos_base + CORE_QOS_EN);
|
|
}
|
|
|
|
if (stat->arqos > SCIMAX_QOS)
|
|
stat->arqos = SCIMAX_QOS;
|
|
|
|
if (stat->awqos > SCIMAX_QOS)
|
|
stat->awqos = SCIMAX_QOS;
|
|
|
|
/* AxQoS value */
|
|
tmp_reg = __raw_readl(qos_base);
|
|
tmp_reg = tmp_reg & ~((SCIMAX_QOS << SCIQOS_W)| (SCIMAX_QOS << SCIQOS_R));
|
|
tmp_reg = tmp_reg | (stat->arqos << SCIQOS_R) | (stat->awqos << SCIQOS_W);
|
|
|
|
__raw_writel(tmp_reg, qos_base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int get_scigpubts_qos(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
unsigned int tmp_reg = 0;
|
|
unsigned int tmp_reg_r = 0;
|
|
unsigned int tmp_reg_w = 0;
|
|
void __iomem *qos_base = NULL;
|
|
|
|
if (!stat)
|
|
return -ENODATA;
|
|
|
|
qos_base = stat->qos_va_base;
|
|
|
|
if (!qos_base)
|
|
return 0;
|
|
|
|
tmp_reg = __raw_readl(qos_base + CORE_QOS_EN);
|
|
tmp_reg = (tmp_reg & (0x1 << SCIQOS_EN)) >> SCIQOS_EN;
|
|
|
|
if (tmp_reg)
|
|
stat->bypass = false;
|
|
else
|
|
stat->bypass = true;
|
|
|
|
tmp_reg_w = __raw_readl(qos_base);
|
|
tmp_reg_w = (tmp_reg_w & (SCIMAX_QOS << SCIQOS_W)) >> SCIQOS_W;
|
|
|
|
tmp_reg_r = __raw_readl(qos_base);
|
|
tmp_reg_r = (tmp_reg_r & (SCIMAX_QOS << SCIQOS_R)) >> SCIQOS_R;
|
|
|
|
stat->arqos = tmp_reg_r;
|
|
stat->awqos = tmp_reg_w;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int set_scigpubts(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
if (!stat->stat_on)
|
|
return 0;
|
|
|
|
ret = set_scigpubts_qos(base, stat);
|
|
if (ret) {
|
|
pr_err("%s[%d] failed! ret=%d\n", __func__, __LINE__, ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = set_scigpubts_mo(base, stat);
|
|
if (ret) {
|
|
pr_err("%s[%d] failed! ret=%d\n", __func__, __LINE__, ret);
|
|
return ret;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int get_scigpubts(void __iomem *base, struct bts_stat *stat)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (!base || !stat)
|
|
return -ENODATA;
|
|
|
|
ret = get_scigpubts_qos(base, stat);
|
|
if (ret) {
|
|
pr_err("%s[%d] failed! ret=%d\n", __func__, __LINE__, ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = get_scigpubts_mo(base, stat);
|
|
if (ret) {
|
|
pr_err("%s[%d] failed! ret=%d\n", __func__, __LINE__, ret);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************
|
|
* register ops functions *
|
|
****************************************************************/
|
|
int register_btsops(struct bts_info *info)
|
|
{
|
|
unsigned int type = info->type;
|
|
|
|
info->ops = kmalloc(sizeof(struct bts_ops), GFP_KERNEL);
|
|
if (info->ops == NULL)
|
|
return -ENOMEM;
|
|
|
|
switch (type) {
|
|
case IP_BTS:
|
|
info->ops->init_bts = NULL;
|
|
info->ops->set_bts = set_ipbts;
|
|
info->ops->get_bts = get_ipbts;
|
|
info->ops->set_qos = set_ipbts_qos;
|
|
info->ops->get_qos = get_ipbts_qos;
|
|
info->ops->set_mo = set_ipbts_mo;
|
|
info->ops->get_mo = get_ipbts_mo;
|
|
info->ops->set_urgent = set_ipbts_urgent;
|
|
info->ops->get_urgent = get_ipbts_urgent;
|
|
info->ops->set_blocking = set_ipbts_blocking;
|
|
info->ops->get_blocking = get_ipbts_blocking;
|
|
break;
|
|
case TREX_BTS:
|
|
info->ops->init_bts = init_trexbts;
|
|
info->ops->set_bts = NULL;
|
|
info->ops->get_bts = NULL;
|
|
info->ops->set_qos = NULL;
|
|
info->ops->get_qos = NULL;
|
|
info->ops->set_mo = NULL;
|
|
info->ops->get_mo = NULL;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
case BUSC_BTS:
|
|
info->ops->init_bts = init_qmax;
|
|
info->ops->set_bts = NULL;
|
|
info->ops->get_bts = NULL;
|
|
info->ops->set_qos = NULL;
|
|
info->ops->get_qos = NULL;
|
|
info->ops->set_mo = NULL;
|
|
info->ops->get_mo = NULL;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
case SCI_BTS:
|
|
info->ops->init_bts = init_sci;
|
|
info->ops->set_bts = set_scibts;
|
|
info->ops->get_bts = NULL;
|
|
info->ops->set_qos = NULL;
|
|
info->ops->get_qos = NULL;
|
|
info->ops->set_mo = set_sci_mo;
|
|
info->ops->get_mo = NULL;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
case SCI_CPU_BTS:
|
|
info->ops->init_bts = NULL;
|
|
info->ops->set_bts = set_scicpubts_mo;
|
|
info->ops->get_bts = get_scicpubts_mo;
|
|
info->ops->set_qos = NULL;
|
|
info->ops->get_qos = NULL;
|
|
info->ops->set_mo = set_scicpubts_mo;
|
|
info->ops->get_mo = get_scicpubts_mo;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
case SCI_GPU_BTS:
|
|
info->ops->init_bts = NULL;
|
|
info->ops->set_bts = set_scigpubts;
|
|
info->ops->get_bts = get_scigpubts;
|
|
info->ops->set_qos = set_scigpubts_qos;
|
|
info->ops->get_qos = get_scigpubts_qos;
|
|
info->ops->set_mo = set_scigpubts_mo;
|
|
info->ops->get_mo = get_scigpubts_mo;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
case SMC_BTS:
|
|
info->ops->init_bts = init_smc;
|
|
info->ops->set_bts = NULL;
|
|
info->ops->get_bts = NULL;
|
|
info->ops->set_qos = NULL;
|
|
info->ops->get_qos = NULL;
|
|
info->ops->set_mo = NULL;
|
|
info->ops->get_mo = NULL;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
case DREX_BTS:
|
|
case INTERNAL_BTS:
|
|
info->ops->init_bts = NULL;
|
|
info->ops->set_bts = NULL;
|
|
info->ops->get_bts = NULL;
|
|
info->ops->set_qos = NULL;
|
|
info->ops->get_qos = NULL;
|
|
info->ops->set_mo = NULL;
|
|
info->ops->get_mo = NULL;
|
|
info->ops->set_urgent = NULL;
|
|
info->ops->get_urgent = NULL;
|
|
info->ops->set_blocking = NULL;
|
|
info->ops->get_blocking = NULL;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(register_btsops);
|
|
|
|
MODULE_LICENSE("GPL");
|