8c9519c7da
commit 5208e7ced520a813b4f4774451fbac4e517e78b2 upstream.
The FIFO is 64 bytes, but the FCR is configured to fire the TX interrupt
when the FIFO is half empty (bit 3 = 0). Thus, we should only write 32
bytes when a TX interrupt occurs.
This fixes a problem observed on the PXA168 that dropped a bunch of TX
bytes during large transmissions.
Fixes: ab28f51c77cd ("serial: rewrite pxa2xx-uart to use 8250_core")
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20240519191929.122202-1-doug@schmorgal.com
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|---|---|---|
| .. | ||
| 8250.h | ||
| 8250_accent.c | ||
| 8250_acorn.c | ||
| 8250_aspeed_vuart.c | ||
| 8250_bcm2835aux.c | ||
| 8250_boca.c | ||
| 8250_core.c | ||
| 8250_dma.c | ||
| 8250_dw.c | ||
| 8250_dwlib.c | ||
| 8250_dwlib.h | ||
| 8250_early.c | ||
| 8250_em.c | ||
| 8250_exar.c | ||
| 8250_exar_st16c554.c | ||
| 8250_fintek.c | ||
| 8250_fourport.c | ||
| 8250_fsl.c | ||
| 8250_gsc.c | ||
| 8250_hp300.c | ||
| 8250_hub6.c | ||
| 8250_ingenic.c | ||
| 8250_ioc3.c | ||
| 8250_lpc18xx.c | ||
| 8250_lpss.c | ||
| 8250_men_mcb.c | ||
| 8250_mid.c | ||
| 8250_mtk.c | ||
| 8250_of.c | ||
| 8250_omap.c | ||
| 8250_pci.c | ||
| 8250_pnp.c | ||
| 8250_port.c | ||
| 8250_pxa.c | ||
| 8250_tegra.c | ||
| 8250_uniphier.c | ||
| Kconfig | ||
| Makefile | ||
| serial_cs.c | ||