454 lines
11 KiB
C
Executable file
454 lines
11 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0-or-later
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/* sound/soc/samsung/vts/vts.c
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*
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* ALSA SoC - Samsung VTS driver
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*
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* Copyright (c) 2021 Samsung Electronics Co. Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <sound/samsung/vts.h>
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#include <linux/firmware.h>
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#include <soc/samsung/exynos-pmu-if.h>
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#include <linux/delay.h>
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#include "vts_soc.h"
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#include "vts_soc_v2.h"
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#include "vts_dbg.h"
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#define LIMIT_IN_JIFFIES (msecs_to_jiffies(1000))
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void vts_cpu_power(struct device *dev, bool on)
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{
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vts_dev_info(dev, "%s(%d)\n", __func__, on);
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exynos_pmu_update(VTS_CPU_CONFIGURATION, VTS_CPU_LOCAL_PWR_CFG,
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on ? VTS_CPU_LOCAL_PWR_CFG : 0);
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}
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#define VTS_WFI_VAL (0x19A006)
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#define VTS_WFI_MASK (0xFFFFFF)
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#define VTS_WFI_CNT (5)
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int vts_cpu_enable(struct device *dev, bool enable)
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{
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/* WFI status register is removed located in VTS_CPU_IN */
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struct vts_data *data = dev_get_drvdata(dev);
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unsigned int status = 0;
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unsigned int status_prev = 0;
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unsigned int hit_rate = 0;
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unsigned long after;
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after = jiffies + LIMIT_IN_JIFFIES;
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#if 0
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do {
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schedule();
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exynos_pmu_read(VTS_CPU_IN, &status);
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} while (((status & VTS_CPU_IN_SLEEPING_MASK)
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!= VTS_CPU_IN_SLEEPING_MASK)
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&& time_is_after_eq_jiffies(after));
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if (time_is_before_jiffies(after)) {
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vts_err("vts cpu enable timeout\n");
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return -ETIME;
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}
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#else
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do {
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msleep(1);
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status_prev = status;
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status = readl(data->gpr_base + 0x0);
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if (((status & VTS_WFI_MASK) == VTS_WFI_VAL))
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/* if (((status & VTS_WFI_MASK) == status_prev)) */
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hit_rate = VTS_WFI_CNT + 2;
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else
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hit_rate ++;
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/* if (hit_rate >= VTS_WFI_CNT) */
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vts_dev_info(dev, "YAMIN PC : 0x%x 0x%x\n",
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status,
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status_prev);
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} while (time_is_after_eq_jiffies(after) &&
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hit_rate < VTS_WFI_CNT);
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if (time_is_before_jiffies(after)) {
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vts_err("[VTS] cpu disable timeout\n");
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return -ETIME;
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}
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#endif
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return 0;
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}
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void vts_reset_cpu(struct device *dev)
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{
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vts_cpu_enable(dev, false);
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vts_cpu_power(dev, false);
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vts_cpu_enable(dev, true);
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vts_cpu_power(dev, true);
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}
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void vts_pad_retention(bool retention)
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{
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if (!retention) {
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exynos_pmu_update(PAD_RETENTION_VTS_OPTION,
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0x1 << 11, 0x1 << 11);
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}
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}
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EXPORT_SYMBOL(vts_pad_retention);
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u32 vts_set_baaw(void __iomem *sfr_base, u64 base, u32 size)
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{
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u32 aligned_size = round_up(size, SZ_4M);
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u64 aligned_base = round_down(base, aligned_size);
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if (IS_ENABLED(CONFIG_SOC_S5E9925)) {
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if (IS_ENABLED(CONFIG_SOC_S5E9925_EVT0)) {
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/* EVT0 */
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/* set VTS BAAW config */
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writel(0x40100, sfr_base + 0x0);
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writel(0x40200, sfr_base + 0x4);
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writel(0x15900, sfr_base + 0x8);
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writel(0x80000003, sfr_base + 0xC);
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writel(0x40200, sfr_base + 0x10);
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writel(0x40300, sfr_base + 0x14);
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writel(0x14F00, sfr_base + 0x18);
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writel(0x80000003, sfr_base + 0x1C);
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pr_info("[vts] %s %d 0x%x\n", __func__, __LINE__,
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aligned_base / SZ_4K);
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/* GUIDE: writel(0x060000, sfr_base + 0x20); */
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writel(VTS_BAAW_BASE / SZ_4K, sfr_base + 0x20);
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/* GUIDE: writel(0x100000, sfr_base + 0x24); */
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writel((VTS_BAAW_BASE + aligned_size) / SZ_4K,
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sfr_base + 0x24);
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/* GUIDE: writel(0x060000, sfr_base + 0x28); */
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writel(aligned_base / SZ_4K, sfr_base + 0x28);
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writel(0x80000003, sfr_base + 0x2C);
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} else {
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/* EVT1 */
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/* set VTS BAAW config */
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/* VTS SRAM */
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writel(0x000000, sfr_base + 0x0);
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writel(0x000204, sfr_base + 0x4);
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writel(0x002500, sfr_base + 0x8);
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writel(0x80000003, sfr_base + 0xC);
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/* CHUB SRAM */
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writel(0x000300, sfr_base + 0x10);
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writel(0x000480, sfr_base + 0x14);
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writel(0x002800, sfr_base + 0x18);
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writel(0x80000003, sfr_base + 0x1C);
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/* ALIVE MAILBOX, CHUB_RTC */
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writel(0x040000, sfr_base + 0x20);
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writel(0x040100, sfr_base + 0x24);
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writel(0x014C00, sfr_base + 0x28);
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writel(0x80000003, sfr_base + 0x2C);
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/* CMGP SFR */
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writel(0x040100, sfr_base + 0x30);
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writel(0x040300, sfr_base + 0x34);
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writel(0x014E00, sfr_base + 0x38);
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writel(0x80000003, sfr_base + 0x3C);
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/* VTS SFR */
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writel(0x041000, sfr_base + 0x40);
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writel(0x0411F0, sfr_base + 0x44);
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writel(0x015300, sfr_base + 0x48);
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writel(0x80000003, sfr_base + 0x4C);
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/* CHUBVTS SFR */
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writel(0x042000, sfr_base + 0x50);
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writel(0x042030, sfr_base + 0x54);
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writel(0x0155D0, sfr_base + 0x58);
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writel(0x80000003, sfr_base + 0x5C);
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/* DRAM */
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pr_info("[vts] %s %d 0x%x\n", __func__, __LINE__,
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aligned_base / SZ_4K);
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/* GUIDE: writel(0x060000, sfr_base + 0x60); */
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writel(VTS_BAAW_BASE / SZ_4K, sfr_base + 0x60);
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/* GUIDE: writel(0x100000, sfr_base + 0x64); */
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writel((VTS_BAAW_BASE + aligned_size) / SZ_4K,
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sfr_base + 0x64);
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/* GUIDE: writel(0x060000, sfr_base + 0x68); */
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writel(aligned_base / SZ_4K, sfr_base + 0x68);
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writel(0x80000003, sfr_base + 0x6C);
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}
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}
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return base - aligned_base + VTS_BAAW_BASE;
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}
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int vts_acquire_sram(struct platform_device *pdev, int vts)
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{
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return 0;
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}
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EXPORT_SYMBOL(vts_acquire_sram);
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int vts_release_sram(struct platform_device *pdev, int vts)
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{
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return 0;
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}
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EXPORT_SYMBOL(vts_release_sram);
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int vts_clear_sram(struct platform_device *pdev)
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{
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struct vts_data *data = platform_get_drvdata(pdev);
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vts_info("%s\n", __func__);
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memset(data->sram_base, 0, data->sram_size);
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return 0;
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}
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EXPORT_SYMBOL(vts_clear_sram);
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static void vts_soc_complete_fw_request(
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const struct firmware *fw, void *context)
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{
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struct device *dev = context;
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struct vts_data *data = dev_get_drvdata(dev);
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unsigned int *pversion = NULL;
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if (!fw) {
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vts_dev_err(dev, "Failed to request firmware\n");
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return;
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}
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data->firmware = fw;
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pversion = (unsigned int *) (fw->data + VTSFW_VERSION_OFFSET);
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/* data->vtsfw_version = *pversion; */
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pversion = (unsigned int *) (fw->data + DETLIB_VERSION_OFFSET);
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/* data->vtsdetectlib_version = *pversion; */
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vts_dev_info(dev, "firmware loaded at %p (%zu)\n", fw->data, fw->size);
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}
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int vts_soc_runtime_resume(struct device *dev)
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{
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struct vts_data *data = dev_get_drvdata(dev);
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int clk_val = 49152000;
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const char* fw_name;
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int ret = 0;
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vts_dev_info(dev, "%s\n", __func__);
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#if IS_ENABLED(CONFIG_SOC_S5E9925_EVT0)
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clk_val = 73728000;
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#endif
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if (IS_ENABLED(CONFIG_SOC_S5E9925_EVT0)) {
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vts_dev_info(dev, "%s: EVT0 \n", __func__);
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fw_name = "vts_evt0.bin";
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} else {
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fw_name = "vts.bin";
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}
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if (data->clk_slif_src) {
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vts_dev_info(dev, "clk_slif_src bef:%d :%d\n",
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clk_val, clk_get_rate(data->clk_slif_src));
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ret = clk_set_rate(data->clk_slif_src, 76800000);
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if (ret < 0)
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vts_dev_err(dev, "clk_slif_src: %d\n", ret);
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vts_dev_info(dev, "clk_slif_src aft:%d\n",
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clk_get_rate(data->clk_slif_src));
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ret = clk_enable(data->clk_slif_src);
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if (ret < 0) {
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vts_dev_err(dev, "Failed to en slif_src:%d\n", ret);
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return ret;
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}
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}
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if (data->clk_slif_src1) {
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vts_dev_info(dev, "clk_slif_src1 bef:%d :%d\n",
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clk_val, clk_get_rate(data->clk_slif_src1));
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vts_dev_info(dev, "clk_slif_src1 aft:%d\n",
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clk_get_rate(data->clk_slif_src1));
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ret = clk_enable(data->clk_slif_src1);
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if (ret < 0) {
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vts_dev_err(dev, "Failed to en slif_src1:%d\n", ret);
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return ret;
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}
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}
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if (data->clk_slif_src2) {
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vts_dev_info(dev, "clk_slif_src2 bef:%d :%d\n",
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clk_val, clk_get_rate(data->clk_slif_src2));
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vts_dev_info(dev, "clk_slif_src2 aft:%d\n",
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clk_get_rate(data->clk_slif_src2));
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ret = clk_enable(data->clk_slif_src2);
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if (ret < 0) {
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vts_dev_err(dev, "Failed to en slif_src2:%d\n", ret);
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return ret;
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}
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} else {
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vts_dev_warn(dev, "clk_slif_src2 is null\n",
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clk_get_rate(data->clk_slif_src2));
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}
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if (data->clk_dmic_sync) {
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ret = clk_enable(data->clk_dmic_sync);
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if (ret < 0) {
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vts_dev_err(dev, "Failed to enable the clock\n");
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return ret;
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}
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} else {
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vts_dev_info(dev, "%s clk_dmic_sync is NULL\n", __func__);
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}
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vts_dev_info(dev, "dmic clock rate:%lu\n",
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clk_get_rate(data->clk_dmic_sync));
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if (data->clk_sys_mux) {
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ret = clk_set_rate(data->clk_sys_mux, VTS_SYS_CLOCK_MAX);
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if (ret < 0) {
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dev_err(dev, "clk_sys_mux: %d\n", ret);
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return ret;
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}
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} else {
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vts_dev_info(dev, "%s clk_sys_mux is NULL\n", __func__);
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}
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if (data->clk_sys) {
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if (data->target_sysclk == 0)
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ret = clk_set_rate(data->clk_sys, VTS_SYS_CLOCK);
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else
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ret = clk_set_rate(data->clk_sys, data->target_sysclk);
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if (ret < 0) {
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dev_err(dev, "clk_sys: %d\n", ret);
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return ret;
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}
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} else {
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vts_dev_info(dev, "%s clk_sys is NULL\n", __func__);
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}
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data->sysclk_rate = clk_get_rate(data->clk_sys);
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vts_dev_info(dev, "System Clock : %ld\n", data->sysclk_rate);
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/* SRAM intmem */
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if (data->intmem_code)
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writel(0x03FF0000, data->intmem_code + 0x4);
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if (data->intmem_data)
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writel(0x03FF0000, data->intmem_data + 0x4);
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if (data->intmem_pcm)
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writel(0x03FF0000, data->intmem_pcm + 0x4);
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if (data->intmem_data1)
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writel(0x03FF0000, data->intmem_data1 + 0x4);
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if (!data->firmware) {
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vts_dev_info(dev, "%s : request_firmware_direct: %s\n",
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fw_name,
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__func__);
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ret = request_firmware_direct(
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(const struct firmware **)&data->firmware,
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fw_name, dev);
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if (ret < 0) {
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vts_dev_err(dev, "request_firmware_direct failed\n");
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return ret;
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}
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vts_dev_info(dev, "vts_soc_complete_fw_request : OK\n");
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vts_soc_complete_fw_request(data->firmware, dev);
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}
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return ret;
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}
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#define YAMIN_MCU_VTS_QCH_CLKIN (0x70e8)
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int vts_soc_runtime_suspend(struct device *dev)
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{
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struct vts_data *data = dev_get_drvdata(dev);
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#if 0
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volatile unsigned long yamin_mcu_vts_qch_clkin;
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unsigned int status = 0;
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yamin_mcu_vts_qch_clkin =
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(volatile unsigned long)ioremap_wt(0x15507000, 0x100);
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pr_info("[VTS]YAMIN QCH(0xe8) 0x%08x\n",
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readl((volatile void *)(yamin_mcu_vts_qch_clkin
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+ 0xe8)));
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iounmap((volatile void __iomem *)yamin_mcu_vts_qch_clkin);
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exynos_pmu_read(YAMIN_MCU_VTS_QCH_CLKIN, &status);
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pr_info("[VTS]YAMIN QCH(0xe8) 0x%08x\n", status);
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#endif
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vts_dev_info(dev, "%s\n", __func__);
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if (data->clk_dmic_sync)
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clk_disable(data->clk_dmic_sync);
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if (data->clk_slif_src2)
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clk_disable(data->clk_slif_src2);
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if (data->clk_slif_src1)
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clk_disable(data->clk_slif_src1);
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if (data->clk_slif_src)
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clk_disable(data->clk_slif_src);
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return 0;
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}
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int vts_soc_cmpnt_probe(struct device *dev)
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{
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struct vts_data *data = dev_get_drvdata(dev);
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const char* fw_name;
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int ret;
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vts_dev_info(dev, "%s\n", __func__);
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if (IS_ENABLED(CONFIG_SOC_S5E9925_EVT0)) {
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vts_dev_info(dev, "%s: EVT0 \n", __func__);
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fw_name = "vts_evt0.bin";
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} else {
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fw_name = "vts.bin";
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}
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if (!data->firmware) {
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vts_dev_info(dev, "%s : request_firmware_direct: %s\n",
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fw_name,
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__func__);
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ret = request_firmware_direct(
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(const struct firmware **)&data->firmware,
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fw_name, dev);
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if (ret < 0) {
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vts_dev_err(dev, "Failed to request_firmware_nowait\n");
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} else {
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vts_dev_info(dev, "vts_soc_complete_fw_request : OK\n");
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vts_soc_complete_fw_request(data->firmware, dev);
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}
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}
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vts_dev_info(dev, "%s(%d)\n", __func__, __LINE__);
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return 0;
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}
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int vts_soc_probe(struct device *dev)
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{
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pr_info("%s\n", __func__);
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return 0;
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}
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void vts_soc_remove(struct device *dev)
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{
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pr_info("%s\n", __func__);
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}
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