kernel_samsung_a53x/drivers/pci/controller
Niklas Cassel d577a8237c PCI: dwc: endpoint: Fix advertised resizable BAR size
[ Upstream commit 72e34b8593e08a0ee759b7a038e0b178418ea6f8 ]

The commit message in commit fc9a77040b04 ("PCI: designware-ep: Configure
Resizable BAR cap to advertise the smallest size") claims that it modifies
the Resizable BAR capability to only advertise support for 1 MB size BARs.

However, the commit writes all zeroes to PCI_REBAR_CAP (the register which
contains the possible BAR sizes that a BAR be resized to).

According to the spec, it is illegal to not have a bit set in
PCI_REBAR_CAP, and 1 MB is the smallest size allowed.

Set bit 4 in PCI_REBAR_CAP, so that we actually advertise support for a
1 MB BAR size.

Before:
        Capabilities: [2e8 v1] Physical Resizable BAR
                BAR 0: current size: 1MB
                BAR 1: current size: 1MB
                BAR 2: current size: 1MB
                BAR 3: current size: 1MB
                BAR 4: current size: 1MB
                BAR 5: current size: 1MB
After:
        Capabilities: [2e8 v1] Physical Resizable BAR
                BAR 0: current size: 1MB, supported: 1MB
                BAR 1: current size: 1MB, supported: 1MB
                BAR 2: current size: 1MB, supported: 1MB
                BAR 3: current size: 1MB, supported: 1MB
                BAR 4: current size: 1MB, supported: 1MB
                BAR 5: current size: 1MB, supported: 1MB

Fixes: fc9a77040b04 ("PCI: designware-ep: Configure Resizable BAR cap to advertise the smallest size")
Link: https://lore.kernel.org/linux-pci/20240307111520.3303774-1-cassel@kernel.org
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <stable@vger.kernel.org> # 5.2
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-11-19 09:22:35 +01:00
..
cadence Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
dwc PCI: dwc: endpoint: Fix advertised resizable BAR size 2024-11-19 09:22:35 +01:00
mobiveil Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Kconfig Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
Makefile Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-aardvark.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-ftpci100.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-host-common.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-host-generic.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-hyperv-intf.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-hyperv.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-loongson.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-mvebu.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-rcar-gen2.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-tegra.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-thunder-ecam.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-thunder-pem.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-v3-semi.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-versatile.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-xgene-msi.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pci-xgene.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-altera-msi.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-altera.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-brcmstb.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-hisi-error.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-iproc-bcma.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-iproc-msi.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-iproc-platform.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-iproc.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-iproc.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-mediatek.c PCI: mediatek: Clear interrupt status before dispatching handler 2024-11-18 12:12:54 +01:00
pcie-rcar-ep.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rcar-host.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rcar.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rcar.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rockchip-ep.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rockchip-host.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rockchip.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-rockchip.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-tango.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-xilinx-cpm.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-xilinx-nwl.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
pcie-xilinx.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
vmd.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00