671f398e72
[ Upstream commit 7738a7ab9d12c5371ed97114ee2132d4512e9fd5 ] Add a quirk similar to eeprom_93xx46 to add an extra clock cycle before reading data from the EEPROM. The 93Cx6 family of EEPROMs output a "dummy 0 bit" between the writing of the op-code/address from the host to the EEPROM and the reading of the actual data from the EEPROM. More info can be found on page 6 of the AT93C46 datasheet (linked below). Similar notes are found in other 93xx6 datasheets. In summary the read operation for a 93Cx6 EEPROM is: Write to EEPROM: 110[A5-A0] (9 bits) Read from EEPROM: 0[D15-D0] (17 bits) Where: 110 is the start bit and READ OpCode [A5-A0] is the address to read from 0 is a "dummy bit" preceding the actual data [D15-D0] is the actual data. Looking at the READ timing diagrams in the 93Cx6 datasheets the dummy bit should be clocked out on the last address bit clock cycle meaning it should be discarded naturally. However, depending on the hardware configuration sometimes this dummy bit is not discarded. This is the case with Exar PCI UARTs which require an extra clock cycle between sending the address and reading the data. Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-5193-SEEPROM-AT93C46D-Datasheet.pdf Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Parker Newman <pnewman@connecttech.com> Link: https://lore.kernel.org/r/0f23973efefccd2544705a0480b4ad4c2353e407.1727880931.git.pnewman@connecttech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
382 lines
8.7 KiB
C
Executable file
382 lines
8.7 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2004 - 2006 rt2x00 SourceForge Project
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* <http://rt2x00.serialmonkey.com>
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*
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* Module: eeprom_93cx6
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* Abstract: EEPROM reader routines for 93cx6 chipsets.
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* Supported chipsets: 93c46 & 93c66.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/eeprom_93cx6.h>
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MODULE_AUTHOR("http://rt2x00.serialmonkey.com");
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MODULE_VERSION("1.0");
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MODULE_DESCRIPTION("EEPROM 93cx6 chip driver");
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MODULE_LICENSE("GPL");
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static inline void eeprom_93cx6_pulse_high(struct eeprom_93cx6 *eeprom)
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{
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eeprom->reg_data_clock = 1;
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eeprom->register_write(eeprom);
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/*
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* Add a short delay for the pulse to work.
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* According to the specifications the "maximum minimum"
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* time should be 450ns.
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*/
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ndelay(450);
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}
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static inline void eeprom_93cx6_pulse_low(struct eeprom_93cx6 *eeprom)
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{
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eeprom->reg_data_clock = 0;
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eeprom->register_write(eeprom);
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/*
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* Add a short delay for the pulse to work.
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* According to the specifications the "maximum minimum"
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* time should be 450ns.
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*/
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ndelay(450);
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}
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static void eeprom_93cx6_startup(struct eeprom_93cx6 *eeprom)
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{
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/*
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* Clear all flags, and enable chip select.
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*/
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eeprom->register_read(eeprom);
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eeprom->reg_data_in = 0;
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eeprom->reg_data_out = 0;
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eeprom->reg_data_clock = 0;
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eeprom->reg_chip_select = 1;
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eeprom->drive_data = 1;
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eeprom->register_write(eeprom);
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/*
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* kick a pulse.
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*/
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eeprom_93cx6_pulse_high(eeprom);
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eeprom_93cx6_pulse_low(eeprom);
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}
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static void eeprom_93cx6_cleanup(struct eeprom_93cx6 *eeprom)
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{
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/*
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* Clear chip_select and data_in flags.
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*/
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eeprom->register_read(eeprom);
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eeprom->reg_data_in = 0;
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eeprom->reg_chip_select = 0;
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eeprom->register_write(eeprom);
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/*
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* kick a pulse.
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*/
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eeprom_93cx6_pulse_high(eeprom);
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eeprom_93cx6_pulse_low(eeprom);
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}
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static void eeprom_93cx6_write_bits(struct eeprom_93cx6 *eeprom,
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const u16 data, const u16 count)
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{
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unsigned int i;
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eeprom->register_read(eeprom);
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/*
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* Clear data flags.
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*/
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eeprom->reg_data_in = 0;
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eeprom->reg_data_out = 0;
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eeprom->drive_data = 1;
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/*
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* Start writing all bits.
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*/
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for (i = count; i > 0; i--) {
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/*
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* Check if this bit needs to be set.
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*/
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eeprom->reg_data_in = !!(data & (1 << (i - 1)));
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/*
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* Write the bit to the eeprom register.
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*/
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eeprom->register_write(eeprom);
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/*
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* Kick a pulse.
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*/
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eeprom_93cx6_pulse_high(eeprom);
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eeprom_93cx6_pulse_low(eeprom);
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}
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eeprom->reg_data_in = 0;
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eeprom->register_write(eeprom);
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}
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static void eeprom_93cx6_read_bits(struct eeprom_93cx6 *eeprom,
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u16 *data, const u16 count)
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{
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unsigned int i;
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u16 buf = 0;
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eeprom->register_read(eeprom);
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/*
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* Clear data flags.
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*/
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eeprom->reg_data_in = 0;
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eeprom->reg_data_out = 0;
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eeprom->drive_data = 0;
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/*
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* Start reading all bits.
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*/
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for (i = count; i > 0; i--) {
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eeprom_93cx6_pulse_high(eeprom);
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eeprom->register_read(eeprom);
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/*
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* Clear data_in flag.
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*/
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eeprom->reg_data_in = 0;
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/*
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* Read if the bit has been set.
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*/
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if (eeprom->reg_data_out)
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buf |= (1 << (i - 1));
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eeprom_93cx6_pulse_low(eeprom);
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}
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*data = buf;
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}
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/**
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* eeprom_93cx6_read - Read a word from eeprom
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* @eeprom: Pointer to eeprom structure
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* @word: Word index from where we should start reading
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* @data: target pointer where the information will have to be stored
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*
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* This function will read the eeprom data as host-endian word
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* into the given data pointer.
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*/
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void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom, const u8 word,
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u16 *data)
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{
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u16 command;
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/*
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* Initialize the eeprom register
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*/
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eeprom_93cx6_startup(eeprom);
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/*
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* Select the read opcode and the word to be read.
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*/
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command = (PCI_EEPROM_READ_OPCODE << eeprom->width) | word;
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eeprom_93cx6_write_bits(eeprom, command,
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PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
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if (has_quirk_extra_read_cycle(eeprom)) {
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eeprom_93cx6_pulse_high(eeprom);
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eeprom_93cx6_pulse_low(eeprom);
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}
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/*
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* Read the requested 16 bits.
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*/
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eeprom_93cx6_read_bits(eeprom, data, 16);
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/*
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* Cleanup eeprom register.
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*/
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eeprom_93cx6_cleanup(eeprom);
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}
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EXPORT_SYMBOL_GPL(eeprom_93cx6_read);
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/**
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* eeprom_93cx6_multiread - Read multiple words from eeprom
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* @eeprom: Pointer to eeprom structure
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* @word: Word index from where we should start reading
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* @data: target pointer where the information will have to be stored
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* @words: Number of words that should be read.
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*
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* This function will read all requested words from the eeprom,
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* this is done by calling eeprom_93cx6_read() multiple times.
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* But with the additional change that while the eeprom_93cx6_read
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* will return host ordered bytes, this method will return little
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* endian words.
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*/
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void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom, const u8 word,
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__le16 *data, const u16 words)
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{
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unsigned int i;
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u16 tmp;
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for (i = 0; i < words; i++) {
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tmp = 0;
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eeprom_93cx6_read(eeprom, word + i, &tmp);
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data[i] = cpu_to_le16(tmp);
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}
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}
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EXPORT_SYMBOL_GPL(eeprom_93cx6_multiread);
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/**
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* eeprom_93cx6_readb - Read a byte from eeprom
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* @eeprom: Pointer to eeprom structure
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* @byte: Byte index from where we should start reading
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* @data: target pointer where the information will have to be stored
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*
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* This function will read a byte of the eeprom data
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* into the given data pointer.
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*/
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void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom, const u8 byte,
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u8 *data)
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{
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u16 command;
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u16 tmp;
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/*
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* Initialize the eeprom register
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*/
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eeprom_93cx6_startup(eeprom);
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/*
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* Select the read opcode and the byte to be read.
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*/
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command = (PCI_EEPROM_READ_OPCODE << (eeprom->width + 1)) | byte;
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eeprom_93cx6_write_bits(eeprom, command,
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PCI_EEPROM_WIDTH_OPCODE + eeprom->width + 1);
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if (has_quirk_extra_read_cycle(eeprom)) {
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eeprom_93cx6_pulse_high(eeprom);
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eeprom_93cx6_pulse_low(eeprom);
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}
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/*
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* Read the requested 8 bits.
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*/
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eeprom_93cx6_read_bits(eeprom, &tmp, 8);
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*data = tmp & 0xff;
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/*
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* Cleanup eeprom register.
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*/
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eeprom_93cx6_cleanup(eeprom);
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}
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EXPORT_SYMBOL_GPL(eeprom_93cx6_readb);
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/**
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* eeprom_93cx6_multireadb - Read multiple bytes from eeprom
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* @eeprom: Pointer to eeprom structure
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* @byte: Index from where we should start reading
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* @data: target pointer where the information will have to be stored
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* @bytes: Number of bytes that should be read.
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*
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* This function will read all requested bytes from the eeprom,
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* this is done by calling eeprom_93cx6_readb() multiple times.
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*/
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void eeprom_93cx6_multireadb(struct eeprom_93cx6 *eeprom, const u8 byte,
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u8 *data, const u16 bytes)
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{
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unsigned int i;
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for (i = 0; i < bytes; i++)
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eeprom_93cx6_readb(eeprom, byte + i, &data[i]);
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}
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EXPORT_SYMBOL_GPL(eeprom_93cx6_multireadb);
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/**
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* eeprom_93cx6_wren - set the write enable state
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* @eeprom: Pointer to eeprom structure
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* @enable: true to enable writes, otherwise disable writes
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*
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* Set the EEPROM write enable state to either allow or deny
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* writes depending on the @enable value.
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*/
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void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable)
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{
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u16 command;
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/* start the command */
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eeprom_93cx6_startup(eeprom);
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/* create command to enable/disable */
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command = enable ? PCI_EEPROM_EWEN_OPCODE : PCI_EEPROM_EWDS_OPCODE;
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command <<= (eeprom->width - 2);
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eeprom_93cx6_write_bits(eeprom, command,
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PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
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eeprom_93cx6_cleanup(eeprom);
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}
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EXPORT_SYMBOL_GPL(eeprom_93cx6_wren);
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/**
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* eeprom_93cx6_write - write data to the EEPROM
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* @eeprom: Pointer to eeprom structure
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* @addr: Address to write data to.
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* @data: The data to write to address @addr.
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*
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* Write the @data to the specified @addr in the EEPROM and
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* waiting for the device to finish writing.
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*
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* Note, since we do not expect large number of write operations
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* we delay in between parts of the operation to avoid using excessive
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* amounts of CPU time busy waiting.
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*/
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void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data)
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{
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int timeout = 100;
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u16 command;
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/* start the command */
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eeprom_93cx6_startup(eeprom);
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command = PCI_EEPROM_WRITE_OPCODE << eeprom->width;
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command |= addr;
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/* send write command */
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eeprom_93cx6_write_bits(eeprom, command,
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PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
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/* send data */
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eeprom_93cx6_write_bits(eeprom, data, 16);
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/* get ready to check for busy */
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eeprom->drive_data = 0;
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eeprom->reg_chip_select = 1;
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eeprom->register_write(eeprom);
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/* wait at-least 250ns to get DO to be the busy signal */
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usleep_range(1000, 2000);
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/* wait for DO to go high to signify finish */
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while (true) {
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eeprom->register_read(eeprom);
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if (eeprom->reg_data_out)
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break;
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usleep_range(1000, 2000);
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if (--timeout <= 0) {
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printk(KERN_ERR "%s: timeout\n", __func__);
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break;
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}
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}
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eeprom_93cx6_cleanup(eeprom);
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}
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EXPORT_SYMBOL_GPL(eeprom_93cx6_write);
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