kernel_samsung_a53x/arch/x86/entry
Pawan Gupta 0fdc02f439 x86/entry_64: Add VERW just before userspace transition
commit 3c7501722e6b31a6e56edd23cea5e77dbb9ffd1a upstream.

Mitigation for MDS is to use VERW instruction to clear any secrets in
CPU Buffers. Any memory accesses after VERW execution can still remain
in CPU buffers. It is safer to execute VERW late in return to user path
to minimize the window in which kernel data can end up in CPU buffers.
There are not many kernel secrets to be had after SWITCH_TO_USER_CR3.

Add support for deploying VERW mitigation after user register state is
restored. This helps minimize the chances of kernel data ending up into
CPU buffers after executing VERW.

Note that the mitigation at the new location is not yet enabled.

  Corner case not handled
  =======================
  Interrupts returning to kernel don't clear CPUs buffers since the
  exit-to-user path is expected to do that anyways. But, there could be
  a case when an NMI is generated in kernel after the exit-to-user path
  has cleared the buffers. This case is not handled and NMI returning to
  kernel don't clear CPU buffers because:

  1. It is rare to get an NMI after VERW, but before returning to user.
  2. For an unprivileged user, there is no known way to make that NMI
     less rare or target it.
  3. It would take a large number of these precisely-timed NMIs to mount
     an actual attack.  There's presumably not enough bandwidth.
  4. The NMI in question occurs after a VERW, i.e. when user state is
     restored and most interesting data is already scrubbed. Whats left
     is only the data that NMI touches, and that may or may not be of
     any interest.

  [ pawan: resolved conflict in syscall_return_via_sysret, added
           CLEAR_CPU_BUFFERS to USERGS_SYSRET64 ]

Suggested-by: Dave Hansen <dave.hansen@intel.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/all/20240213-delay-verw-v8-2-a6216d83edb7%40linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-19 09:22:40 +01:00
..
syscalls Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
vdso Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
vsyscall Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
calling.h Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
common.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
entry.S x86/bugs: Add asm helpers for executing VERW 2024-11-19 09:22:40 +01:00
entry_32.S x86/stackprotector/32: Make the canary into a regular percpu variable 2024-11-19 09:22:37 +01:00
entry_64.S x86/entry_64: Add VERW just before userspace transition 2024-11-19 09:22:40 +01:00
entry_64_compat.S x86/entry_64: Add VERW just before userspace transition 2024-11-19 09:22:40 +01:00
Makefile Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
syscall_32.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
syscall_64.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
syscall_x32.c Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
thunk_32.S Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00
thunk_64.S Import A536BXXU9EXDC 2024-06-15 16:02:09 -03:00