182 lines
4.9 KiB
C
Executable file
182 lines
4.9 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2009 Samsung Electronics Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*/
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#ifndef __SPI_S3C64XX_H
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#define __SPI_S3C64XX_H
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#include <linux/dmaengine.h>
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/*
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* The configuration of spi dma mode
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*/
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enum {
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DMA_MODE = 0,
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CPU_MODE = 1,
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};
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/*
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* The configuration of spi swap mode
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*/
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enum {
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NO_SWAP_MODE = 0,
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SWAP_MODE = 1,
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};
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/*
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* The configuration of spi secure mode
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*/
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enum {
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NONSECURE_MODE = 0,
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SECURE_MODE = 1,
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};
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enum {
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MANUAL_CS_MODE = 0,
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AUTO_CS_MODE = 1,
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};
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/*
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* Located domain
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*/
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enum spi_domain {
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DOMAIN_TOP = 0,
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DOMAIN_ISP,
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DOMAIN_CAM1,
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};
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struct platform_device;
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/**
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* struct s3c64xx_spi_csinfo - ChipSelect description
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* @fb_delay: Slave specific feedback delay.
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* Refer to FB_CLK_SEL register definition in SPI chapter.
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* @line: Custom 'identity' of the CS line.
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*
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* This is per SPI-Slave Chipselect information.
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* Allocate and initialize one in machine init code and make the
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* spi_board_info.controller_data point to it.
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*/
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struct s3c64xx_spi_csinfo {
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u8 fb_delay;
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u8 cs_mode;
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unsigned line;
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unsigned int cs_delay;
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};
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/**
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* struct s3c64xx_spi_info - SPI Controller defining structure
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* @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
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* @num_cs: Number of CS this controller emulates.
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* @cfg_gpio: Configure pins for this SPI controller.
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*/
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struct s3c64xx_spi_info {
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struct list_head node;
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unsigned int need_hw_init;
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int src_clk_nr;
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int num_cs;
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int dma_mode;
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int swap_mode;
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int secure_mode;
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int (*cfg_gpio)(void);
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dma_filter_fn filter;
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enum spi_domain domain;
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unsigned int dbg_mode;
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struct regmap *usi_reg;
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unsigned int usi_offset;
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struct regmap *dma_sysreg;
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int dma_sysreg_offset_tx;
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int dma_sysreg_offset_rx;
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int dma_sysreg_value;
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int timeout;
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};
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struct s3c64xx_spi_dma_data {
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struct dma_chan *ch;
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dma_cookie_t cookie;
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enum dma_transfer_direction direction;
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unsigned long dmach;
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};
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/**
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* struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver.
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* @clk: Pointer to the spi clock.
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* @src_clk: Pointer to the clock used to generate SPI signals.
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* @master: Pointer to the SPI Protocol master.
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* @cntrlr_info: Platform specific data for the controller this driver manages.
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* @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint.
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* @queue: To log SPI xfer requests.
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* @lock: Controller specific lock.
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* @state: Set of FLAGS to indicate status.
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* @rx_dmach: Controller's DMA channel for Rx.
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* @tx_dmach: Controller's DMA channel for Tx.
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* @sfr_start: BUS address of SPI controller regs.
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* @regs: Pointer to ioremap'ed controller registers.
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* @irq: interrupt
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* @xfer_completion: To indicate completion of xfer task.
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* @cur_mode: Stores the active configuration of the controller.
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* @cur_bpw: Stores the active bits per word settings.
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* @cur_speed: Stores the active xfer clock speed.
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*/
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struct s3c64xx_spi_driver_data {
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void __iomem *regs;
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struct clk *clk;
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struct clk *src_clk;
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struct platform_device *pdev;
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struct spi_master *master;
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struct s3c64xx_spi_info *cntrlr_info;
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struct spi_device *tgl_spi;
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struct list_head queue;
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spinlock_t lock;
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unsigned long sfr_start;
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struct completion xfer_completion;
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unsigned state;
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unsigned cur_mode, cur_bpw;
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unsigned cur_speed;
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unsigned int target_speed;
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struct s3c64xx_spi_dma_data rx_dma;
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struct s3c64xx_spi_dma_data tx_dma;
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struct samsung_dma_ops *ops;
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struct s3c64xx_spi_port_config *port_conf;
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unsigned int port_id;
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unsigned long gpios[4];
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struct pinctrl *pinctrl;
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struct pinctrl_state *pin_def;
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struct pinctrl_state *pin_idle;
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int is_probed;
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int spi_clkoff_time;
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int idle_ip_index;
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};
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/**
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* s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
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* initialization code.
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* @cfg_gpio: Pointer to gpio setup function.
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* @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
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* @num_cs: Number of elements in the 'cs' array.
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*
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* Call this from machine init code for each SPI Controller that
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* has some chips attached to it.
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*/
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extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
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int src_clk_nr, int num_cs);
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extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
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int src_clk_nr, int num_cs);
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extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
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int src_clk_nr, int num_cs);
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/* defined by architecture to configure gpio */
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extern int s3c64xx_spi0_cfg_gpio(void);
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extern int s3c64xx_spi1_cfg_gpio(void);
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extern int s3c64xx_spi2_cfg_gpio(void);
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extern struct s3c64xx_spi_info s3c64xx_spi0_pdata;
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extern struct s3c64xx_spi_info s3c64xx_spi1_pdata;
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extern struct s3c64xx_spi_info s3c64xx_spi2_pdata;
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#endif /*__SPI_S3C64XX_H */
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