/dts-v1/;

/ {
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "Qualcomm Technologies, Inc. SM8150 MTP";
	compatible = "qcom,sm8150-mtp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	clocks {

		xo-board {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x249f000>;
			clock-output-names = "xo_board";
			phandle = <0x37>;
		};

		sleep-clk {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x7ffc>;
			clock-output-names = "sleep_clk";
			phandle = <0x11>;
		};
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x00>;
			enable-method = "psci";
			next-level-cache = <0x02>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x40>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x02>;

				l3-cache {
					compatible = "cache";
					phandle = <0x04>;
				};
			};
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x100>;
			enable-method = "psci";
			next-level-cache = <0x05>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x41>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x05>;
			};
		};

		cpu@200 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x200>;
			enable-method = "psci";
			next-level-cache = <0x06>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x42>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x06>;
			};
		};

		cpu@300 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x300>;
			enable-method = "psci";
			next-level-cache = <0x07>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x43>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x07>;
			};
		};

		cpu@400 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x400>;
			enable-method = "psci";
			next-level-cache = <0x08>;
			qcom,freq-domain = <0x03 0x01>;
			#cooling-cells = <0x02>;
			phandle = <0x4c>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x08>;
			};
		};

		cpu@500 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x500>;
			enable-method = "psci";
			next-level-cache = <0x09>;
			qcom,freq-domain = <0x03 0x01>;
			#cooling-cells = <0x02>;
			phandle = <0x4d>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x09>;
			};
		};

		cpu@600 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x600>;
			enable-method = "psci";
			next-level-cache = <0x0a>;
			qcom,freq-domain = <0x03 0x01>;
			#cooling-cells = <0x02>;
			phandle = <0x4e>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x0a>;
			};
		};

		cpu@700 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x700>;
			enable-method = "psci";
			next-level-cache = <0x0b>;
			qcom,freq-domain = <0x03 0x02>;
			#cooling-cells = <0x02>;
			phandle = <0x4f>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x0b>;
			};
		};
	};

	firmware {

		scm {
			compatible = "qcom,scm-sm8150", "qcom,scm";
			#reset-cells = <0x01>;
			phandle = <0x63>;
		};
	};

	hwlock {
		compatible = "qcom,tcsr-mutex";
		syscon = <0x0c 0x00 0x1000>;
		#hwlock-cells = <0x01>;
		phandle = <0x0e>;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x00 0x80000000 0x00 0x00>;
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <0x01 0x05 0x04>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		memory@85700000 {
			reg = <0x00 0x85700000 0x00 0x600000>;
			no-map;
			phandle = <0x64>;
		};

		memory@85d00000 {
			reg = <0x00 0x85d00000 0x00 0x140000>;
			no-map;
			phandle = <0x65>;
		};

		memory@85f00000 {
			reg = <0x00 0x85f00000 0x00 0x20000>;
			no-map;
			phandle = <0x66>;
		};

		memory@85f20000 {
			compatible = "qcom,cmd-db";
			reg = <0x00 0x85f20000 0x00 0x20000>;
			no-map;
			phandle = <0x67>;
		};

		memory@86000000 {
			reg = <0x00 0x86000000 0x00 0x200000>;
			no-map;
			phandle = <0x0d>;
		};

		memory@86200000 {
			reg = <0x00 0x86200000 0x00 0x3900000>;
			no-map;
			phandle = <0x68>;
		};

		memory@89b00000 {
			compatible = "qcom,rmtfs-mem";
			reg = <0x00 0x89b00000 0x00 0x200000>;
			no-map;
			qcom,client-id = <0x01>;
			qcom,vmid = <0x0f>;
			phandle = <0x69>;
		};

		memory@8b700000 {
			reg = <0x00 0x8b700000 0x00 0x500000>;
			no-map;
			phandle = <0x6a>;
		};

		memory@8bc00000 {
			reg = <0x00 0x8bc00000 0x00 0x180000>;
			no-map;
			phandle = <0x6b>;
		};

		memory@8bd80000 {
			reg = <0x00 0x8bd80000 0x00 0x80000>;
			no-map;
			phandle = <0x6c>;
		};

		memory@8be00000 {
			reg = <0x00 0x8be00000 0x00 0x1a00000>;
			no-map;
			phandle = <0x35>;
		};

		memory@8d800000 {
			reg = <0x00 0x8d800000 0x00 0x9600000>;
			no-map;
			phandle = <0x28>;
		};

		memory@96e00000 {
			reg = <0x00 0x96e00000 0x00 0x500000>;
			no-map;
			phandle = <0x6d>;
		};

		memory@97300000 {
			reg = <0x00 0x97300000 0x00 0x1400000>;
			no-map;
			phandle = <0x1f>;
		};

		memory@98700000 {
			reg = <0x00 0x98700000 0x00 0x10000>;
			no-map;
			phandle = <0x6e>;
		};

		memory@98710000 {
			reg = <0x00 0x98710000 0x00 0x5000>;
			no-map;
			phandle = <0x6f>;
		};

		memory@98715000 {
			reg = <0x00 0x98715000 0x00 0x2000>;
			no-map;
			phandle = <0x24>;
		};

		memory@98800000 {
			reg = <0x00 0x98800000 0x00 0x100000>;
			no-map;
			phandle = <0x70>;
		};

		memory@98900000 {
			reg = <0x00 0x98900000 0x00 0x1400000>;
			no-map;
			phandle = <0x2b>;
		};

		memory@9e400000 {
			reg = <0x00 0x9e400000 0x00 0x1400000>;
			no-map;
			phandle = <0x71>;
		};
	};

	smem {
		compatible = "qcom,smem";
		memory-region = <0x0d>;
		hwlocks = <0x0e 0x03>;
	};

	smp2p-cdsp {
		compatible = "qcom,smp2p";
		qcom,smem = <0x5e 0x1b0>;
		interrupts = <0x00 0x240 0x01>;
		mboxes = <0x0f 0x06>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x05>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x2c>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x2a>;
		};
	};

	smp2p-lpass {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1bb 0x1ad>;
		interrupts = <0x00 0x9e 0x01>;
		mboxes = <0x0f 0x0a>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x02>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x36>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x34>;
		};
	};

	smp2p-mpss {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1b3 0x1ac>;
		interrupts = <0x00 0x1c3 0x01>;
		mboxes = <0x0f 0x0e>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x01>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x29>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x27>;
		};
	};

	smp2p-slpi {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1e1 0x1ae>;
		interrupts = <0x00 0xac 0x01>;
		mboxes = <0x0f 0x1a>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x03>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x20>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x1c>;
		};
	};

	soc@0 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges = <0x00 0x00 0x00 0x00 0x10 0x00>;
		dma-ranges = <0x00 0x00 0x00 0x00 0x10 0x00>;
		compatible = "simple-bus";
		phandle = <0x72>;

		clock-controller@100000 {
			compatible = "qcom,gcc-sm8150";
			reg = <0x00 0x100000 0x00 0x1f0000>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			#power-domain-cells = <0x01>;
			clock-names = "bi_tcxo", "sleep_clk";
			clocks = <0x10 0x00 0x11>;
			phandle = <0x12>;
		};

		geniqup@ac0000 {
			compatible = "qcom,geni-se-qup";
			reg = <0x00 0xac0000 0x00 0x6000>;
			clock-names = "m-ahb", "s-ahb";
			clocks = <0x12 0x7b 0x12 0x7c>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			status = "okay";
			phandle = <0x73>;

			serial@a90000 {
				compatible = "qcom,geni-debug-uart";
				reg = <0x00 0xa90000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x12 0x69>;
				interrupts = <0x00 0x165 0x04>;
				status = "okay";
				phandle = <0x74>;
			};
		};

		interconnect@1500000 {
			compatible = "qcom,sm8150-config-noc";
			reg = <0x00 0x1500000 0x00 0x7400>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x75>;
		};

		interconnect@1620000 {
			compatible = "qcom,sm8150-system-noc";
			reg = <0x00 0x1620000 0x00 0x19400>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x76>;
		};

		interconnect@163a000 {
			compatible = "qcom,sm8150-mc-virt";
			reg = <0x00 0x163a000 0x00 0x1000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x77>;
		};

		interconnect@16e0000 {
			compatible = "qcom,sm8150-aggre1-noc";
			reg = <0x00 0x16e0000 0x00 0xd080>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x78>;
		};

		interconnect@1700000 {
			compatible = "qcom,sm8150-aggre2-noc";
			reg = <0x00 0x1700000 0x00 0x20000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x79>;
		};

		interconnect@1720000 {
			compatible = "qcom,sm8150-compute-noc";
			reg = <0x00 0x1720000 0x00 0x7000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x7a>;
		};

		interconnect@1740000 {
			compatible = "qcom,sm8150-mmss-noc";
			reg = <0x00 0x1740000 0x00 0x1c100>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x7b>;
		};

		ufshc@1d84000 {
			compatible = "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
			reg = <0x00 0x1d84000 0x00 0x2500>;
			interrupts = <0x00 0x109 0x04>;
			phys = <0x14>;
			phy-names = "ufsphy";
			lanes-per-direction = <0x02>;
			#reset-cells = <0x01>;
			resets = <0x12 0x19>;
			reset-names = "rst";
			clock-names = "core_clk", "bus_aggr_clk", "iface_clk", "core_clk_unipro", "ref_clk", "tx_lane0_sync_clk", "rx_lane0_sync_clk", "rx_lane1_sync_clk";
			clocks = <0x12 0x9d 0x12 0x03 0x12 0x9c 0x12 0xa9 0x10 0x00 0x12 0xa8 0x12 0xa6 0x12 0xa7>;
			freq-table-hz = <0x23c3460 0x11e1a300 0x00 0x00 0x00 0x00 0x23c3460 0x11e1a300 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			status = "okay";
			reset-gpios = <0x15 0xaf 0x01>;
			vcc-supply = <0x16>;
			vcc-max-microamp = <0xb71b0>;
			vccq-supply = <0x17>;
			vccq-max-microamp = <0xaae60>;
			vccq2-supply = <0x18>;
			vccq2-max-microamp = <0xb71b0>;
			phandle = <0x19>;
		};

		phy@1d87000 {
			compatible = "qcom,sm8150-qmp-ufs-phy";
			reg = <0x00 0x1d87000 0x00 0x1c0>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			clock-names = "ref", "ref_aux";
			clocks = <0x12 0x9b 0x12 0xa3>;
			resets = <0x19 0x00>;
			reset-names = "ufsphy";
			status = "okay";
			vdda-phy-supply = <0x1a>;
			vdda-max-microamp = <0x16058>;
			vdda-pll-supply = <0x1b>;
			vdda-pll-max-microamp = <0x4a38>;
			phandle = <0x7c>;

			lanes@1d87400 {
				reg = <0x00 0x1d87400 0x00 0x108 0x00 0x1d87600 0x00 0x1e0 0x00 0x1d87c00 0x00 0x1dc 0x00 0x1d87800 0x00 0x108 0x00 0x1d87a00 0x00 0x1e0>;
				#phy-cells = <0x00>;
				phandle = <0x14>;
			};
		};

		interconnect@1e00000 {
			compatible = "qcom,sm8150-ipa-virt";
			reg = <0x00 0x1e00000 0x00 0x1000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x7d>;
		};

		syscon@1f40000 {
			compatible = "syscon";
			reg = <0x00 0x1f40000 0x00 0x40000>;
			phandle = <0x0c>;
		};

		remoteproc@2400000 {
			compatible = "qcom,sm8150-slpi-pas";
			reg = <0x00 0x2400000 0x00 0x4040>;
			interrupts-extended = <0x01 0x00 0x1ee 0x01 0x1c 0x00 0x01 0x1c 0x01 0x01 0x1c 0x02 0x01 0x1c 0x03 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			clocks = <0x10 0x00>;
			clock-names = "xo";
			power-domains = <0x1d 0x03 0x1e 0x03 0x1e 0x02>;
			power-domain-names = "load_state", "lcx", "lmx";
			memory-region = <0x1f>;
			qcom,smem-states = <0x20 0x00>;
			qcom,smem-state-names = "stop";
			status = "okay";
			phandle = <0x7e>;

			glink-edge {
				interrupts = <0x00 0xaa 0x01>;
				label = "dsps";
				qcom,remote-pid = <0x03>;
				mboxes = <0x0f 0x18>;
			};
		};

		gpu@2c00000 {
			compatible = "qcom,adreno-640.1", "qcom,adreno", "amd,imageon";
			#stream-id-cells = <0x10>;
			reg = <0x00 0x2c00000 0x00 0x40000>;
			reg-names = "kgsl_3d0_reg_memory";
			interrupts = <0x00 0x12c 0x04>;
			iommus = <0x21 0x00 0x401>;
			operating-points-v2 = <0x22>;
			qcom,gmu = <0x23>;
			phandle = <0x7f>;

			zap-shader {
				memory-region = <0x24>;
			};

			opp-table {
				compatible = "operating-points-v2";
				phandle = <0x22>;

				opp-675000000 {
					opp-hz = <0x00 0x283baec0>;
					opp-level = <0x140>;
				};

				opp-585000000 {
					opp-hz = <0x00 0x22de6440>;
					opp-level = <0x100>;
				};

				opp-499200000 {
					opp-hz = <0x00 0x1dc13000>;
					opp-level = <0xe0>;
				};

				opp-427000000 {
					opp-hz = <0x00 0x197380c0>;
					opp-level = <0xc0>;
				};

				opp-345000000 {
					opp-hz = <0x00 0x14904840>;
					opp-level = <0x80>;
				};

				opp-257000000 {
					opp-hz = <0x00 0xf518240>;
					opp-level = <0x40>;
				};
			};
		};

		gmu@2c6a000 {
			compatible = "qcom,adreno-gmu-640.1", "qcom,adreno-gmu";
			reg = <0x00 0x2c6a000 0x00 0x30000 0x00 0xb290000 0x00 0x10000 0x00 0xb490000 0x00 0x10000>;
			reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
			interrupts = <0x00 0x130 0x04 0x00 0x131 0x04>;
			interrupt-names = "hfi", "gmu";
			clocks = <0x25 0x00 0x25 0x03 0x25 0x06 0x12 0x13 0x12 0x28>;
			clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
			power-domains = <0x25 0x00 0x25 0x01>;
			power-domain-names = "cx", "gx";
			iommus = <0x21 0x05 0x400>;
			operating-points-v2 = <0x26>;
			phandle = <0x23>;

			opp-table {
				compatible = "operating-points-v2";
				phandle = <0x26>;

				opp-200000000 {
					opp-hz = <0x00 0xbebc200>;
					opp-level = <0x30>;
				};
			};
		};

		clock-controller@2c90000 {
			compatible = "qcom,sm8150-gpucc";
			reg = <0x00 0x2c90000 0x00 0x9000>;
			clocks = <0x10 0x00 0x12 0x25 0x12 0x26>;
			clock-names = "bi_tcxo", "gcc_gpu_gpll0_clk_src", "gcc_gpu_gpll0_div_clk_src";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			#power-domain-cells = <0x01>;
			phandle = <0x25>;
		};

		iommu@2ca0000 {
			compatible = "qcom,sm8150-smmu-500", "arm,mmu-500";
			reg = <0x00 0x2ca0000 0x00 0x10000>;
			#iommu-cells = <0x02>;
			#global-interrupts = <0x01>;
			interrupts = <0x00 0x2a2 0x04 0x00 0x2a9 0x04 0x00 0x2aa 0x04 0x00 0x2ab 0x04 0x00 0x2ac 0x04 0x00 0x2ad 0x04 0x00 0x2ae 0x04 0x00 0x2af 0x04 0x00 0x2b0 0x04>;
			clocks = <0x25 0x00 0x12 0x28 0x12 0x29>;
			clock-names = "ahb", "bus", "iface";
			power-domains = <0x25 0x00>;
			phandle = <0x21>;
		};

		pinctrl@3100000 {
			compatible = "qcom,sm8150-pinctrl";
			reg = <0x00 0x3100000 0x00 0x300000 0x00 0x3500000 0x00 0x300000 0x00 0x3900000 0x00 0x300000 0x00 0x3d00000 0x00 0x300000>;
			reg-names = "west", "east", "north", "south";
			interrupts = <0x00 0xd0 0x04>;
			gpio-ranges = <0x15 0x00 0x00 0xb0>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			gpio-reserved-ranges = <0x00 0x04 0x7e 0x04>;
			phandle = <0x15>;
		};

		remoteproc@4080000 {
			compatible = "qcom,sm8150-mpss-pas";
			reg = <0x00 0x4080000 0x00 0x4040>;
			interrupts-extended = <0x01 0x00 0x10a 0x01 0x27 0x00 0x01 0x27 0x01 0x01 0x27 0x02 0x01 0x27 0x03 0x01 0x27 0x07 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack", "shutdown-ack";
			clocks = <0x10 0x00>;
			clock-names = "xo";
			power-domains = <0x1d 0x02 0x1e 0x07 0x1e 0x00>;
			power-domain-names = "load_state", "cx", "mss";
			memory-region = <0x28>;
			qcom,smem-states = <0x29 0x00>;
			qcom,smem-state-names = "stop";
			phandle = <0x80>;

			glink-edge {
				interrupts = <0x00 0x1c1 0x01>;
				label = "modem";
				qcom,remote-pid = <0x01>;
				mboxes = <0x0f 0x0c>;
			};
		};

		remoteproc@8300000 {
			compatible = "qcom,sm8150-cdsp-pas";
			reg = <0x00 0x8300000 0x00 0x4040>;
			interrupts-extended = <0x01 0x00 0x242 0x01 0x2a 0x00 0x01 0x2a 0x01 0x01 0x2a 0x02 0x01 0x2a 0x03 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			clocks = <0x10 0x00>;
			clock-names = "xo";
			power-domains = <0x1d 0x00 0x1e 0x07>;
			power-domain-names = "load_state", "cx";
			memory-region = <0x2b>;
			qcom,smem-states = <0x2c 0x00>;
			qcom,smem-state-names = "stop";
			status = "okay";
			phandle = <0x81>;

			glink-edge {
				interrupts = <0x00 0x23e 0x01>;
				label = "cdsp";
				qcom,remote-pid = <0x05>;
				mboxes = <0x0f 0x04>;
			};
		};

		phy@88e2000 {
			compatible = "qcom,sm8150-usb-hs-phy", "qcom,usb-snps-hs-7nm-phy";
			reg = <0x00 0x88e2000 0x00 0x400>;
			status = "okay";
			#phy-cells = <0x00>;
			clocks = <0x10 0x00>;
			clock-names = "ref";
			resets = <0x12 0x0f>;
			vdda-pll-supply = <0x1a>;
			vdda33-supply = <0x2d>;
			vdda18-supply = <0x2e>;
			phandle = <0x2f>;
		};

		phy@88e9000 {
			compatible = "qcom,sm8150-qmp-usb3-phy";
			reg = <0x00 0x88e9000 0x00 0x18c 0x00 0x88e8000 0x00 0x10>;
			reg-names = "reg-base", "dp_com";
			status = "okay";
			#clock-cells = <0x01>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			clocks = <0x12 0xb7 0x10 0x00 0x12 0xb6 0x12 0xb9>;
			clock-names = "aux", "ref_clk_src", "ref", "com_aux";
			resets = <0x12 0x12 0x12 0x11>;
			reset-names = "phy", "common";
			vdda-phy-supply = <0x1b>;
			vdda-pll-supply = <0x1a>;
			phandle = <0x82>;

			lanes@88e9200 {
				reg = <0x00 0x88e9200 0x00 0x200 0x00 0x88e9400 0x00 0x200 0x00 0x88e9c00 0x00 0x218 0x00 0x88e9600 0x00 0x200 0x00 0x88e9800 0x00 0x200 0x00 0x88e9a00 0x00 0x100>;
				#phy-cells = <0x00>;
				clocks = <0x12 0xba>;
				clock-names = "pipe0";
				clock-output-names = "usb3_phy_pipe_clk_src";
				phandle = <0x30>;
			};
		};

		interconnect@9160000 {
			compatible = "qcom,sm8150-dc-noc";
			reg = <0x00 0x9160000 0x00 0x3200>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x83>;
		};

		interconnect@9680000 {
			compatible = "qcom,sm8150-gem-noc";
			reg = <0x00 0x9680000 0x00 0x3e200>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x84>;
		};

		usb@a6f8800 {
			compatible = "qcom,sm8150-dwc3", "qcom,dwc3";
			reg = <0x00 0xa6f8800 0x00 0x400>;
			status = "okay";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			dma-ranges;
			clocks = <0x12 0x0c 0x12 0xac 0x12 0x05 0x12 0xae 0x12 0xb0 0x12 0xbb>;
			clock-names = "cfg_noc", "core", "iface", "mock_utmi", "sleep", "xo";
			assigned-clocks = <0x12 0xae 0x12 0xac>;
			assigned-clock-rates = <0x124f800 0xbebc200>;
			interrupts = <0x00 0x83 0x04 0x00 0x1e6 0x04 0x00 0x1e8 0x04 0x00 0x1e9 0x04>;
			interrupt-names = "hs_phy_irq", "ss_phy_irq", "dm_hs_phy_irq", "dp_hs_phy_irq";
			power-domains = <0x12 0x04>;
			resets = <0x12 0x1a>;
			phandle = <0x85>;

			dwc3@a600000 {
				compatible = "snps,dwc3";
				reg = <0x00 0xa600000 0x00 0xcd00>;
				interrupts = <0x00 0x85 0x04>;
				snps,dis_u2_susphy_quirk;
				snps,dis_enblslpm_quirk;
				phys = <0x2f 0x30>;
				phy-names = "usb2-phy", "usb3-phy";
				dr_mode = "peripheral";
				phandle = <0x86>;
			};
		};

		interconnect@ac00000 {
			compatible = "qcom,sm8150-camnoc-virt";
			reg = <0x00 0xac00000 0x00 0x1000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x13>;
			phandle = <0x87>;
		};

		power-controller@c300000 {
			compatible = "qcom,sm8150-aoss-qmp";
			reg = <0x00 0xc300000 0x00 0x100000>;
			interrupts = <0x00 0x185 0x01>;
			mboxes = <0x0f 0x00>;
			#clock-cells = <0x00>;
			#power-domain-cells = <0x01>;
			phandle = <0x1d>;
		};

		thermal-sensor@c263000 {
			compatible = "qcom,sm8150-tsens", "qcom,tsens-v2";
			reg = <0x00 0xc263000 0x00 0x1ff 0x00 0xc222000 0x00 0x1ff>;
			#qcom,sensors = <0x10>;
			interrupts = <0x00 0x1fa 0x04 0x00 0x1fc 0x04>;
			interrupt-names = "uplow", "critical";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x3e>;
		};

		thermal-sensor@c265000 {
			compatible = "qcom,sm8150-tsens", "qcom,tsens-v2";
			reg = <0x00 0xc265000 0x00 0x1ff 0x00 0xc223000 0x00 0x1ff>;
			#qcom,sensors = <0x08>;
			interrupts = <0x00 0x1fb 0x04 0x00 0x1fd 0x04>;
			interrupt-names = "uplow", "critical";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x5f>;
		};

		spmi@c440000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = <0x00 0xc440000 0x00 0x1100 0x00 0xc600000 0x00 0x2000000 0x00 0xe600000 0x00 0x100000 0x00 0xe700000 0x00 0xa0000 0x00 0xc40a000 0x00 0x26000>;
			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
			interrupt-names = "periph_irq";
			interrupts = <0x00 0x1e1 0x04>;
			qcom,ee = <0x00>;
			qcom,channel = <0x00>;
			#address-cells = <0x02>;
			#size-cells = <0x00>;
			interrupt-controller;
			#interrupt-cells = <0x04>;
			cell-index = <0x00>;
			phandle = <0x88>;

			pmic@0 {
				compatible = "qcom,pm8150", "qcom,spmi-pmic";
				reg = <0x00 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x89>;

				power-on@800 {
					compatible = "qcom,pm8998-pon";
					reg = <0x800>;
					phandle = <0x8a>;

					pwrkey {
						compatible = "qcom,pm8941-pwrkey";
						interrupts = <0x00 0x08 0x00 0x03>;
						debounce = <0x3d09>;
						bias-pull-up;
						linux,code = <0x74>;
						status = "okay";
					};

					resin {
						compatible = "qcom,pm8941-resin";
						interrupts = <0x00 0x08 0x01 0x03>;
						debounce = <0x3d09>;
						bias-pull-up;
						linux,code = <0x72>;
					};
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x00 0x24 0x00 0x03>;
					io-channels = <0x31 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x60>;
				};

				adc@3100 {
					compatible = "qcom,spmi-adc5";
					reg = <0x3100>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					interrupts = <0x00 0x31 0x00 0x01>;
					phandle = <0x31>;

					ref-gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "ref_gnd";
					};

					vref-1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "vref_1p25";
					};

					die-temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "die_temp";
					};
				};

				rtc@6000 {
					compatible = "qcom,pm8941-rtc";
					reg = <0x6000>;
					reg-names = "rtc", "alarm";
					interrupts = <0x00 0x61 0x01 0x00>;
					status = "disabled";
				};

				gpio@c000 {
					compatible = "qcom,pm8150-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupt-controller;
					#interrupt-cells = <0x02>;
					phandle = <0x8b>;
				};
			};

			pmic@1 {
				compatible = "qcom,pm8150", "qcom,spmi-pmic";
				reg = <0x01 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
			};

			pmic@2 {
				compatible = "qcom,pm8150b", "qcom,spmi-pmic";
				reg = <0x02 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				power-on@800 {
					compatible = "qcom,pm8916-pon";
					reg = <0x800>;
					status = "disabled";
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x02 0x24 0x00 0x03>;
					io-channels = <0x32 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x61>;
				};

				adc@3100 {
					compatible = "qcom,spmi-adc5";
					reg = <0x3100>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					interrupts = <0x02 0x31 0x00 0x01>;
					phandle = <0x32>;

					ref-gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "ref_gnd";
					};

					vref-1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "vref_1p25";
					};

					die-temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "die_temp";
					};

					chg-temp@9 {
						reg = <0x09>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "chg_temp";
					};
				};

				gpio@c000 {
					compatible = "qcom,pm8150b-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupt-controller;
					#interrupt-cells = <0x02>;
					phandle = <0x8c>;
				};
			};

			pmic@3 {
				compatible = "qcom,pm8150b", "qcom,spmi-pmic";
				reg = <0x03 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
			};

			pmic@4 {
				compatible = "qcom,pm8150l", "qcom,spmi-pmic";
				reg = <0x04 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				power-on@800 {
					compatible = "qcom,pm8916-pon";
					reg = <0x800>;
					status = "disabled";
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x04 0x24 0x00 0x03>;
					io-channels = <0x33 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x62>;
				};

				adc@3100 {
					compatible = "qcom,spmi-adc5";
					reg = <0x3100>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					interrupts = <0x04 0x31 0x00 0x01>;
					phandle = <0x33>;

					ref-gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "ref_gnd";
					};

					vref-1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "vref_1p25";
					};

					die-temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "die_temp";
					};
				};

				gpio@c000 {
					compatible = "qcom,pm8150l-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupt-controller;
					#interrupt-cells = <0x02>;
					phandle = <0x8d>;
				};
			};

			pmic@5 {
				compatible = "qcom,pm8150l", "qcom,spmi-pmic";
				reg = <0x05 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
			};
		};

		remoteproc@17300000 {
			compatible = "qcom,sm8150-adsp-pas";
			reg = <0x00 0x17300000 0x00 0x4040>;
			interrupts-extended = <0x01 0x00 0xa2 0x01 0x34 0x00 0x01 0x34 0x01 0x01 0x34 0x02 0x01 0x34 0x03 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			clocks = <0x10 0x00>;
			clock-names = "xo";
			power-domains = <0x1d 0x01 0x1e 0x07>;
			power-domain-names = "load_state", "cx";
			memory-region = <0x35>;
			qcom,smem-states = <0x36 0x00>;
			qcom,smem-state-names = "stop";
			status = "okay";
			phandle = <0x8e>;

			glink-edge {
				interrupts = <0x00 0x9c 0x01>;
				label = "lpass";
				qcom,remote-pid = <0x02>;
				mboxes = <0x0f 0x08>;
			};
		};

		interrupt-controller@17a00000 {
			compatible = "arm,gic-v3";
			interrupt-controller;
			#interrupt-cells = <0x03>;
			reg = <0x00 0x17a00000 0x00 0x10000 0x00 0x17a60000 0x00 0x100000>;
			interrupts = <0x01 0x09 0x04>;
			phandle = <0x01>;
		};

		mailbox@17c00000 {
			compatible = "qcom,sm8150-apss-shared";
			reg = <0x00 0x17c00000 0x00 0x1000>;
			#mbox-cells = <0x01>;
			phandle = <0x0f>;
		};

		watchdog@17c10000 {
			compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";
			reg = <0x00 0x17c10000 0x00 0x1000>;
			clocks = <0x11>;
		};

		timer@17c20000 {
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0x00 0x17c20000 0x00 0x1000>;
			clock-frequency = <0x124f800>;

			frame@17c21000 {
				frame-number = <0x00>;
				interrupts = <0x00 0x08 0x04 0x00 0x06 0x04>;
				reg = <0x00 0x17c21000 0x00 0x1000 0x00 0x17c22000 0x00 0x1000>;
			};

			frame@17c23000 {
				frame-number = <0x01>;
				interrupts = <0x00 0x09 0x04>;
				reg = <0x00 0x17c23000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c25000 {
				frame-number = <0x02>;
				interrupts = <0x00 0x0a 0x04>;
				reg = <0x00 0x17c25000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c27000 {
				frame-number = <0x03>;
				interrupts = <0x00 0x0b 0x04>;
				reg = <0x00 0x17c26000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c29000 {
				frame-number = <0x04>;
				interrupts = <0x00 0x0c 0x04>;
				reg = <0x00 0x17c29000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c2b000 {
				frame-number = <0x05>;
				interrupts = <0x00 0x0d 0x04>;
				reg = <0x00 0x17c2b000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c2d000 {
				frame-number = <0x06>;
				interrupts = <0x00 0x0e 0x04>;
				reg = <0x00 0x17c2d000 0x00 0x1000>;
				status = "disabled";
			};
		};

		rsc@18200000 {
			label = "apps_rsc";
			compatible = "qcom,rpmh-rsc";
			reg = <0x00 0x18200000 0x00 0x10000 0x00 0x18210000 0x00 0x10000 0x00 0x18220000 0x00 0x10000>;
			reg-names = "drv-0", "drv-1", "drv-2";
			interrupts = <0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04>;
			qcom,tcs-offset = <0xd00>;
			qcom,drv-id = <0x02>;
			qcom,tcs-config = <0x02 0x02 0x00 0x03 0x01 0x03 0x03 0x01>;
			phandle = <0x8f>;

			clock-controller {
				compatible = "qcom,sm8150-rpmh-clk";
				#clock-cells = <0x01>;
				clock-names = "xo";
				clocks = <0x37>;
				phandle = <0x10>;
			};

			power-controller {
				compatible = "qcom,sm8150-rpmhpd";
				#power-domain-cells = <0x01>;
				operating-points-v2 = <0x38>;
				phandle = <0x1e>;

				opp-table {
					compatible = "operating-points-v2";
					phandle = <0x38>;

					opp1 {
						opp-level = <0x10>;
						phandle = <0x90>;
					};

					opp2 {
						opp-level = <0x30>;
						phandle = <0x91>;
					};

					opp3 {
						opp-level = <0x40>;
						phandle = <0x92>;
					};

					opp4 {
						opp-level = <0x80>;
						phandle = <0x93>;
					};

					opp5 {
						opp-level = <0xc0>;
						phandle = <0x94>;
					};

					opp6 {
						opp-level = <0xe0>;
						phandle = <0x95>;
					};

					opp7 {
						opp-level = <0x100>;
						phandle = <0x96>;
					};

					opp8 {
						opp-level = <0x140>;
						phandle = <0x97>;
					};

					opp9 {
						opp-level = <0x150>;
						phandle = <0x98>;
					};

					opp10 {
						opp-level = <0x180>;
						phandle = <0x99>;
					};

					opp11 {
						opp-level = <0x1a0>;
						phandle = <0x9a>;
					};
				};
			};

			bcm_voter {
				compatible = "qcom,bcm-voter";
				phandle = <0x13>;
			};

			pm8150-rpmh-regulators {
				compatible = "qcom,pm8150-rpmh-regulators";
				qcom,pmic-id = "a";
				vdd-s1-supply = <0x39>;
				vdd-s2-supply = <0x39>;
				vdd-s3-supply = <0x39>;
				vdd-s4-supply = <0x39>;
				vdd-s5-supply = <0x39>;
				vdd-s6-supply = <0x39>;
				vdd-s7-supply = <0x39>;
				vdd-s8-supply = <0x39>;
				vdd-s9-supply = <0x39>;
				vdd-s10-supply = <0x39>;
				vdd-l1-l8-l11-supply = <0x3a>;
				vdd-l2-l10-supply = <0x3b>;
				vdd-l3-l4-l5-l18-supply = <0x3a>;
				vdd-l6-l9-supply = <0x3c>;
				vdd-l7-l12-l14-l15-supply = <0x3d>;
				vdd-l13-l16-l17-supply = <0x3b>;

				smps5 {
					regulator-min-microvolt = <0x1d0d80>;
					regulator-max-microvolt = <0x1e8480>;
					phandle = <0x3d>;
				};

				smps6 {
					regulator-min-microvolt = <0xe09c0>;
					regulator-max-microvolt = <0x113640>;
					phandle = <0x3a>;
				};

				ldo1 {
					regulator-min-microvolt = <0xb7980>;
					regulator-max-microvolt = <0xb7980>;
					regulator-initial-mode = <0x03>;
					phandle = <0x9b>;
				};

				ldo2 {
					regulator-min-microvolt = <0x2ee000>;
					regulator-max-microvolt = <0x2ee000>;
					regulator-initial-mode = <0x03>;
					phandle = <0x2d>;
				};

				ldo3 {
					regulator-min-microvolt = "", "\aS";
					regulator-max-microvolt = <0xe38a0>;
					regulator-initial-mode = <0x03>;
					phandle = <0x9c>;
				};

				ldo5 {
					regulator-min-microvolt = <0xd6d80>;
					regulator-max-microvolt = <0xd6d80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x1a>;
				};

				ldo6 {
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x9d>;
				};

				ldo7 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0x9e>;
				};

				ldo9 {
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x17>;
				};

				ldo10 {
					regulator-min-microvolt = <0x263540>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x16>;
				};

				ldo11 {
					regulator-min-microvolt = "", "\f5";
					regulator-max-microvolt = "", "\f5";
					regulator-initial-mode = <0x03>;
					phandle = <0x9f>;
				};

				ldo12 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0x2e>;
				};

				ldo13 {
					regulator-min-microvolt = <0x294280>;
					regulator-max-microvolt = <0x294280>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa0>;
				};

				ldo14 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1cafc0>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa1>;
				};

				ldo15 {
					regulator-min-microvolt = <0x1a0040>;
					regulator-max-microvolt = <0x1a0040>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa2>;
				};

				ldo16 {
					regulator-min-microvolt = <0x294280>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa3>;
				};

				ldo17 {
					regulator-min-microvolt = <0x2b9440>;
					regulator-max-microvolt = <0x2de600>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa4>;
				};
			};

			pm8150l-rpmh-regulators {
				compatible = "qcom,pm8150l-rpmh-regulators";
				qcom,pmic-id = "c";
				vdd-s1-supply = <0x39>;
				vdd-s2-supply = <0x39>;
				vdd-s3-supply = <0x39>;
				vdd-s4-supply = <0x39>;
				vdd-s5-supply = <0x39>;
				vdd-s6-supply = <0x39>;
				vdd-s7-supply = <0x39>;
				vdd-s8-supply = <0x39>;
				vdd-l1-l8-supply = <0x18>;
				vdd-l2-l3-supply = <0x3c>;
				vdd-l4-l5-l6-supply = <0x3b>;
				vdd-l7-l11-supply = <0x3b>;
				vdd-l9-l10-supply = <0x3b>;
				vdd-bob-supply = <0x39>;
				vdd-flash-supply = <0x3b>;
				vdd-rgb-supply = <0x3b>;

				bob {
					regulator-min-microvolt = <0x2de600>;
					regulator-max-microvolt = "", "=\t";
					regulator-initial-mode = <0x02>;
					regulator-allow-bypass;
					phandle = <0x3b>;
				};

				smps8 {
					regulator-min-microvolt = <0x14a140>;
					regulator-max-microvolt = <0x14a140>;
					phandle = <0x3c>;
				};

				ldo1 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa5>;
				};

				ldo2 {
					regulator-min-microvolt = <0x13e5c0>;
					regulator-max-microvolt = <0x13e5c0>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa6>;
				};

				ldo3 {
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x1b>;
				};

				ldo4 {
					regulator-min-microvolt = <0x1a0040>;
					regulator-max-microvolt = <0x2cad80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa7>;
				};

				ldo5 {
					regulator-min-microvolt = <0x1a0040>;
					regulator-max-microvolt = <0x2cad80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa8>;
				};

				ldo6 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xa9>;
				};

				ldo7 {
					regulator-min-microvolt = <0x2b9440>;
					regulator-max-microvolt = "", "/]";
					regulator-initial-mode = <0x03>;
					phandle = <0xaa>;
				};

				ldo8 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xab>;
				};

				ldo9 {
					regulator-min-microvolt = <0x294280>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xac>;
				};

				ldo10 {
					regulator-min-microvolt = <0x2dc6c0>;
					regulator-max-microvolt = <0x328980>;
					regulator-initial-mode = <0x03>;
					phandle = <0xad>;
				};

				ldo11 {
					regulator-min-microvolt = <0x2dc6c0>;
					regulator-max-microvolt = <0x328980>;
					regulator-initial-mode = <0x03>;
					phandle = <0xae>;
				};
			};

			pm8009-rpmh-regulators {
				compatible = "qcom,pm8009-rpmh-regulators";
				qcom,pmic-id = "f";
				vdd-s1-supply = <0x39>;
				vdd-s2-supply = <0x3b>;
				vdd-l2-supply = <0x3c>;
				vdd-l5-l6-supply = <0x3b>;

				ldo2 {
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xaf>;
				};

				ldo5 {
					regulator-min-microvolt = <0x2ab980>;
					regulator-max-microvolt = <0x2ab980>;
					regulator-initial-mode = <0x03>;
					phandle = <0xb0>;
				};

				ldo6 {
					regulator-initial-mode = <0x03>;
					regulator-min-microvolt = <0x2b9440>;
					regulator-max-microvolt = <0x2b9440>;
					phandle = <0xb1>;
				};
			};
		};

		interconnect@18321000 {
			compatible = "qcom,sm8150-osm-l3";
			reg = <0x00 0x18321000 0x00 0x1400>;
			clocks = <0x10 0x00 0x12 0xc5>;
			clock-names = "xo", "alternate";
			#interconnect-cells = <0x01>;
			phandle = <0xb2>;
		};

		cpufreq@18323000 {
			compatible = "qcom,cpufreq-hw";
			reg = <0x00 0x18323000 0x00 0x1400 0x00 0x18325800 0x00 0x1400 0x00 0x18327800 0x00 0x1400>;
			reg-names = "freq-domain0", "freq-domain1", "freq-domain2";
			clocks = <0x10 0x00 0x12 0xc5>;
			clock-names = "xo", "alternate";
			#freq-domain-cells = <0x01>;
			phandle = <0x03>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x01 0x08 0x01 0x02 0x08 0x01 0x03 0x08 0x01 0x00 0x08>;
	};

	thermal-zones {

		cpu0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x01>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x3f>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x44>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb3>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x3f>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x44>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x02>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x45>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x46>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb4>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x45>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x46>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu2-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x03>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x47>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x48>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb5>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x47>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x48>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu3-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x04>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x49>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x4a>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb6>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x49>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x4a>;
					cooling-device = <0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu4-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x07>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x4b>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x50>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb7>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x4b>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x50>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu5-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x08>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x51>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x52>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb8>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x51>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x52>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu6-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x09>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x53>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x54>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xb9>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x53>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x54>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu7-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x0a>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x55>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x56>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xba>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x55>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x56>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu4-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x0b>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x57>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x58>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xbb>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x57>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x58>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu5-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x0c>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x59>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5a>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xbc>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x59>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x5a>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu6-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x0d>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5b>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5c>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xbd>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x5b>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x5c>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu7-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x0e>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5d>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5e>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0xbe>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x5d>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x5e>;
					cooling-device = <0x4c 0xffffffff 0xffffffff 0x4d 0xffffffff 0xffffffff 0x4e 0xffffffff 0xffffffff 0x4f 0xffffffff 0xffffffff>;
				};
			};
		};

		aoss0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x00>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xbf>;
				};
			};
		};

		cluster0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x05>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc0>;
				};

				cluster0_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xc1>;
				};
			};
		};

		cluster1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x06>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc2>;
				};

				cluster1_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xc3>;
				};
			};
		};

		gpu-thermal-top {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x3e 0x0f>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc4>;
				};
			};
		};

		aoss1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x00>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc5>;
				};
			};
		};

		wlan-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x01>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc6>;
				};
			};
		};

		video-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x02>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc7>;
				};
			};
		};

		mem-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x03>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc8>;
				};
			};
		};

		q6-hvx-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x04>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xc9>;
				};
			};
		};

		camera-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x05>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xca>;
				};
			};
		};

		compute-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x06>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xcb>;
				};
			};
		};

		modem-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x07>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xcc>;
				};
			};
		};

		npu-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x08>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xcd>;
				};
			};
		};

		modem-vec-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x09>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xce>;
				};
			};
		};

		modem-scl-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x0a>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xcf>;
				};
			};
		};

		gpu-thermal-bottom {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x5f 0x0b>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xd0>;
				};
			};
		};

		pm8150 {
			polling-delay-passive = <0x64>;
			polling-delay = <0x00>;
			thermal-sensors = <0x60>;

			trips {

				trip0 {
					temperature = <0x17318>;
					hysteresis = <0x00>;
					type = "passive";
				};

				trip1 {
					temperature = <0x1c138>;
					hysteresis = <0x00>;
					type = "hot";
				};

				trip2 {
					temperature = <0x23668>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};
		};

		pm8150b {
			polling-delay-passive = <0x64>;
			polling-delay = <0x00>;
			thermal-sensors = <0x61>;

			trips {

				trip0 {
					temperature = <0x17318>;
					hysteresis = <0x00>;
					type = "passive";
				};

				trip1 {
					temperature = <0x1c138>;
					hysteresis = <0x00>;
					type = "hot";
				};

				trip2 {
					temperature = <0x23668>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};
		};

		pm8150l {
			polling-delay-passive = <0x64>;
			polling-delay = <0x00>;
			thermal-sensors = <0x62>;

			trips {

				trip0 {
					temperature = <0x17318>;
					hysteresis = <0x00>;
					type = "passive";
				};

				trip1 {
					temperature = <0x1c138>;
					hysteresis = <0x00>;
					type = "hot";
				};

				trip2 {
					temperature = <0x23668>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};
		};
	};

	aliases {
		serial0 = "/soc@0/geniqup@ac0000/serial@a90000";
	};

	vph-pwr-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vph_pwr";
		regulator-min-microvolt = <0x387520>;
		regulator-max-microvolt = <0x387520>;
		phandle = <0x39>;
	};

	pm8150-s4 {
		compatible = "regulator-fixed";
		regulator-name = "vreg_s4a_1p8";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <0x39>;
		phandle = <0x18>;
	};

	__symbols__ {
		xo_board = "/clocks/xo-board";
		sleep_clk = "/clocks/sleep-clk";
		CPU0 = "/cpus/cpu@0";
		L2_0 = "/cpus/cpu@0/l2-cache";
		L3_0 = "/cpus/cpu@0/l2-cache/l3-cache";
		CPU1 = "/cpus/cpu@100";
		L2_100 = "/cpus/cpu@100/l2-cache";
		CPU2 = "/cpus/cpu@200";
		L2_200 = "/cpus/cpu@200/l2-cache";
		CPU3 = "/cpus/cpu@300";
		L2_300 = "/cpus/cpu@300/l2-cache";
		CPU4 = "/cpus/cpu@400";
		L2_400 = "/cpus/cpu@400/l2-cache";
		CPU5 = "/cpus/cpu@500";
		L2_500 = "/cpus/cpu@500/l2-cache";
		CPU6 = "/cpus/cpu@600";
		L2_600 = "/cpus/cpu@600/l2-cache";
		CPU7 = "/cpus/cpu@700";
		L2_700 = "/cpus/cpu@700/l2-cache";
		scm = "/firmware/scm";
		tcsr_mutex = "/hwlock";
		hyp_mem = "/reserved-memory/memory@85700000";
		xbl_mem = "/reserved-memory/memory@85d00000";
		aop_mem = "/reserved-memory/memory@85f00000";
		aop_cmd_db = "/reserved-memory/memory@85f20000";
		smem_mem = "/reserved-memory/memory@86000000";
		tz_mem = "/reserved-memory/memory@86200000";
		rmtfs_mem = "/reserved-memory/memory@89b00000";
		camera_mem = "/reserved-memory/memory@8b700000";
		wlan_mem = "/reserved-memory/memory@8bc00000";
		npu_mem = "/reserved-memory/memory@8bd80000";
		adsp_mem = "/reserved-memory/memory@8be00000";
		mpss_mem = "/reserved-memory/memory@8d800000";
		venus_mem = "/reserved-memory/memory@96e00000";
		slpi_mem = "/reserved-memory/memory@97300000";
		ipa_fw_mem = "/reserved-memory/memory@98700000";
		ipa_gsi_mem = "/reserved-memory/memory@98710000";
		gpu_mem = "/reserved-memory/memory@98715000";
		spss_mem = "/reserved-memory/memory@98800000";
		cdsp_mem = "/reserved-memory/memory@98900000";
		qseecom_mem = "/reserved-memory/memory@9e400000";
		cdsp_smp2p_out = "/smp2p-cdsp/master-kernel";
		cdsp_smp2p_in = "/smp2p-cdsp/slave-kernel";
		adsp_smp2p_out = "/smp2p-lpass/master-kernel";
		adsp_smp2p_in = "/smp2p-lpass/slave-kernel";
		modem_smp2p_out = "/smp2p-mpss/master-kernel";
		modem_smp2p_in = "/smp2p-mpss/slave-kernel";
		slpi_smp2p_out = "/smp2p-slpi/master-kernel";
		slpi_smp2p_in = "/smp2p-slpi/slave-kernel";
		soc = "/soc@0";
		gcc = "/soc@0/clock-controller@100000";
		qupv3_id_1 = "/soc@0/geniqup@ac0000";
		uart2 = "/soc@0/geniqup@ac0000/serial@a90000";
		config_noc = "/soc@0/interconnect@1500000";
		system_noc = "/soc@0/interconnect@1620000";
		mc_virt = "/soc@0/interconnect@163a000";
		aggre1_noc = "/soc@0/interconnect@16e0000";
		aggre2_noc = "/soc@0/interconnect@1700000";
		compute_noc = "/soc@0/interconnect@1720000";
		mmss_noc = "/soc@0/interconnect@1740000";
		ufs_mem_hc = "/soc@0/ufshc@1d84000";
		ufs_mem_phy = "/soc@0/phy@1d87000";
		ufs_mem_phy_lanes = "/soc@0/phy@1d87000/lanes@1d87400";
		ipa_virt = "/soc@0/interconnect@1e00000";
		tcsr_mutex_regs = "/soc@0/syscon@1f40000";
		remoteproc_slpi = "/soc@0/remoteproc@2400000";
		gpu = "/soc@0/gpu@2c00000";
		gpu_opp_table = "/soc@0/gpu@2c00000/opp-table";
		gmu = "/soc@0/gmu@2c6a000";
		gmu_opp_table = "/soc@0/gmu@2c6a000/opp-table";
		gpucc = "/soc@0/clock-controller@2c90000";
		adreno_smmu = "/soc@0/iommu@2ca0000";
		tlmm = "/soc@0/pinctrl@3100000";
		remoteproc_mpss = "/soc@0/remoteproc@4080000";
		remoteproc_cdsp = "/soc@0/remoteproc@8300000";
		usb_1_hsphy = "/soc@0/phy@88e2000";
		usb_1_qmpphy = "/soc@0/phy@88e9000";
		usb_1_ssphy = "/soc@0/phy@88e9000/lanes@88e9200";
		dc_noc = "/soc@0/interconnect@9160000";
		gem_noc = "/soc@0/interconnect@9680000";
		usb_1 = "/soc@0/usb@a6f8800";
		usb_1_dwc3 = "/soc@0/usb@a6f8800/dwc3@a600000";
		camnoc_virt = "/soc@0/interconnect@ac00000";
		aoss_qmp = "/soc@0/power-controller@c300000";
		tsens0 = "/soc@0/thermal-sensor@c263000";
		tsens1 = "/soc@0/thermal-sensor@c265000";
		spmi_bus = "/soc@0/spmi@c440000";
		pm8150_0 = "/soc@0/spmi@c440000/pmic@0";
		pon = "/soc@0/spmi@c440000/pmic@0/power-on@800";
		pm8150_temp = "/soc@0/spmi@c440000/pmic@0/temp-alarm@2400";
		pm8150_adc = "/soc@0/spmi@c440000/pmic@0/adc@3100";
		pm8150_gpios = "/soc@0/spmi@c440000/pmic@0/gpio@c000";
		pm8150b_temp = "/soc@0/spmi@c440000/pmic@2/temp-alarm@2400";
		pm8150b_adc = "/soc@0/spmi@c440000/pmic@2/adc@3100";
		pm8150b_gpios = "/soc@0/spmi@c440000/pmic@2/gpio@c000";
		pm8150l_temp = "/soc@0/spmi@c440000/pmic@4/temp-alarm@2400";
		pm8150l_adc = "/soc@0/spmi@c440000/pmic@4/adc@3100";
		pm8150l_gpios = "/soc@0/spmi@c440000/pmic@4/gpio@c000";
		remoteproc_adsp = "/soc@0/remoteproc@17300000";
		intc = "/soc@0/interrupt-controller@17a00000";
		apss_shared = "/soc@0/mailbox@17c00000";
		apps_rsc = "/soc@0/rsc@18200000";
		rpmhcc = "/soc@0/rsc@18200000/clock-controller";
		rpmhpd = "/soc@0/rsc@18200000/power-controller";
		rpmhpd_opp_table = "/soc@0/rsc@18200000/power-controller/opp-table";
		rpmhpd_opp_ret = "/soc@0/rsc@18200000/power-controller/opp-table/opp1";
		rpmhpd_opp_min_svs = "/soc@0/rsc@18200000/power-controller/opp-table/opp2";
		rpmhpd_opp_low_svs = "/soc@0/rsc@18200000/power-controller/opp-table/opp3";
		rpmhpd_opp_svs = "/soc@0/rsc@18200000/power-controller/opp-table/opp4";
		rpmhpd_opp_svs_l1 = "/soc@0/rsc@18200000/power-controller/opp-table/opp5";
		rpmhpd_opp_svs_l2 = "/soc@0/rsc@18200000/power-controller/opp-table/opp6";
		rpmhpd_opp_nom = "/soc@0/rsc@18200000/power-controller/opp-table/opp7";
		rpmhpd_opp_nom_l1 = "/soc@0/rsc@18200000/power-controller/opp-table/opp8";
		rpmhpd_opp_nom_l2 = "/soc@0/rsc@18200000/power-controller/opp-table/opp9";
		rpmhpd_opp_turbo = "/soc@0/rsc@18200000/power-controller/opp-table/opp10";
		rpmhpd_opp_turbo_l1 = "/soc@0/rsc@18200000/power-controller/opp-table/opp11";
		apps_bcm_voter = "/soc@0/rsc@18200000/bcm_voter";
		vreg_s5a_2p0 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/smps5";
		vreg_s6a_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/smps6";
		vdda_wcss_pll = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo1";
		vreg_l1a_0p75 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo1";
		vdd_pdphy = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo2";
		vdda_usb_hs_3p1 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo2";
		vreg_l2a_3p1 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo2";
		vreg_l3a_0p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo3";
		vdd_usb_hs_core = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_csi_0_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_csi_1_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_csi_2_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_csi_3_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_dsi_0_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_dsi_1_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_dsi_0_pll_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_dsi_1_pll_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_pcie_1ln_core = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_pcie_2ln_core = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_pll_hv_cc_ebi01 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_pll_hv_cc_ebi23 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_qrefs_0p875_5 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_sp_sensor = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_ufs_2ln_core_1 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_ufs_2ln_core_2 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_usb_ss_dp_core_1 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_usb_ss_dp_core_2 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_qlink_lv = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vdda_qlink_lv_ck = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vreg_l5a_0p875 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vreg_l6a_1p2 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo6";
		vreg_l7a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo7";
		vddpx_10 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo9";
		vreg_l9a_1p2 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo9";
		vreg_l10a_2p5 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo10";
		vreg_l11a_0p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo11";
		vdd_qfprom = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vdd_qfprom_sp = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vdda_apc_cs_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vdda_gfx_cs_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vdda_usb_hs_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vdda_qrefs_vref_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vddpx_10_a = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vreg_l12a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vreg_l13a_2p7 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo13";
		vreg_l14a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo14";
		vreg_l15a_1p7 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo15";
		vreg_l16a_2p7 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo16";
		vreg_l17a_3p0 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo17";
		vreg_bob = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/bob";
		vreg_s8c_1p3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/smps8";
		vreg_l1c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo1";
		vdda_wcss_adcdac_1 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo2";
		vdda_wcss_adcdac_22 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo2";
		vreg_l2c_1p3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo2";
		vdda_hv_ebi0 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vdda_hv_ebi1 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vdda_hv_ebi2 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vdda_hv_ebi3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vdda_hv_refgen0 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vdda_qlink_hv_ck = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vreg_l3c_1p2 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vddpx_5 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo4";
		vreg_l4c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo4";
		vddpx_6 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo5";
		vreg_l5c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo5";
		vddpx_2 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo6";
		vreg_l6c_2p9 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo6";
		vreg_l7c_3p0 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo7";
		vreg_l8c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo8";
		vreg_l9c_2p9 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo9";
		vreg_l10c_3p3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo10";
		vreg_l11c_3p3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo11";
		vreg_l2f_1p2 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo2";
		vreg_l5f_2p85 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo5";
		vreg_l6f_2p85 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo6";
		osm_l3 = "/soc@0/interconnect@18321000";
		cpufreq_hw = "/soc@0/cpufreq@18323000";
		cpu0_alert0 = "/thermal-zones/cpu0-thermal/trips/trip-point0";
		cpu0_alert1 = "/thermal-zones/cpu0-thermal/trips/trip-point1";
		cpu0_crit = "/thermal-zones/cpu0-thermal/trips/cpu_crit";
		cpu1_alert0 = "/thermal-zones/cpu1-thermal/trips/trip-point0";
		cpu1_alert1 = "/thermal-zones/cpu1-thermal/trips/trip-point1";
		cpu1_crit = "/thermal-zones/cpu1-thermal/trips/cpu_crit";
		cpu2_alert0 = "/thermal-zones/cpu2-thermal/trips/trip-point0";
		cpu2_alert1 = "/thermal-zones/cpu2-thermal/trips/trip-point1";
		cpu2_crit = "/thermal-zones/cpu2-thermal/trips/cpu_crit";
		cpu3_alert0 = "/thermal-zones/cpu3-thermal/trips/trip-point0";
		cpu3_alert1 = "/thermal-zones/cpu3-thermal/trips/trip-point1";
		cpu3_crit = "/thermal-zones/cpu3-thermal/trips/cpu_crit";
		cpu4_top_alert0 = "/thermal-zones/cpu4-top-thermal/trips/trip-point0";
		cpu4_top_alert1 = "/thermal-zones/cpu4-top-thermal/trips/trip-point1";
		cpu4_top_crit = "/thermal-zones/cpu4-top-thermal/trips/cpu_crit";
		cpu5_top_alert0 = "/thermal-zones/cpu5-top-thermal/trips/trip-point0";
		cpu5_top_alert1 = "/thermal-zones/cpu5-top-thermal/trips/trip-point1";
		cpu5_top_crit = "/thermal-zones/cpu5-top-thermal/trips/cpu_crit";
		cpu6_top_alert0 = "/thermal-zones/cpu6-top-thermal/trips/trip-point0";
		cpu6_top_alert1 = "/thermal-zones/cpu6-top-thermal/trips/trip-point1";
		cpu6_top_crit = "/thermal-zones/cpu6-top-thermal/trips/cpu_crit";
		cpu7_top_alert0 = "/thermal-zones/cpu7-top-thermal/trips/trip-point0";
		cpu7_top_alert1 = "/thermal-zones/cpu7-top-thermal/trips/trip-point1";
		cpu7_top_crit = "/thermal-zones/cpu7-top-thermal/trips/cpu_crit";
		cpu4_bottom_alert0 = "/thermal-zones/cpu4-bottom-thermal/trips/trip-point0";
		cpu4_bottom_alert1 = "/thermal-zones/cpu4-bottom-thermal/trips/trip-point1";
		cpu4_bottom_crit = "/thermal-zones/cpu4-bottom-thermal/trips/cpu_crit";
		cpu5_bottom_alert0 = "/thermal-zones/cpu5-bottom-thermal/trips/trip-point0";
		cpu5_bottom_alert1 = "/thermal-zones/cpu5-bottom-thermal/trips/trip-point1";
		cpu5_bottom_crit = "/thermal-zones/cpu5-bottom-thermal/trips/cpu_crit";
		cpu6_bottom_alert0 = "/thermal-zones/cpu6-bottom-thermal/trips/trip-point0";
		cpu6_bottom_alert1 = "/thermal-zones/cpu6-bottom-thermal/trips/trip-point1";
		cpu6_bottom_crit = "/thermal-zones/cpu6-bottom-thermal/trips/cpu_crit";
		cpu7_bottom_alert0 = "/thermal-zones/cpu7-bottom-thermal/trips/trip-point0";
		cpu7_bottom_alert1 = "/thermal-zones/cpu7-bottom-thermal/trips/trip-point1";
		cpu7_bottom_crit = "/thermal-zones/cpu7-bottom-thermal/trips/cpu_crit";
		aoss0_alert0 = "/thermal-zones/aoss0-thermal/trips/trip-point0";
		cluster0_alert0 = "/thermal-zones/cluster0-thermal/trips/trip-point0";
		cluster0_crit = "/thermal-zones/cluster0-thermal/trips/cluster0_crit";
		cluster1_alert0 = "/thermal-zones/cluster1-thermal/trips/trip-point0";
		cluster1_crit = "/thermal-zones/cluster1-thermal/trips/cluster1_crit";
		gpu1_alert0 = "/thermal-zones/gpu-thermal-top/trips/trip-point0";
		aoss1_alert0 = "/thermal-zones/aoss1-thermal/trips/trip-point0";
		wlan_alert0 = "/thermal-zones/wlan-thermal/trips/trip-point0";
		video_alert0 = "/thermal-zones/video-thermal/trips/trip-point0";
		mem_alert0 = "/thermal-zones/mem-thermal/trips/trip-point0";
		q6_hvx_alert0 = "/thermal-zones/q6-hvx-thermal/trips/trip-point0";
		camera_alert0 = "/thermal-zones/camera-thermal/trips/trip-point0";
		compute_alert0 = "/thermal-zones/compute-thermal/trips/trip-point0";
		modem_alert0 = "/thermal-zones/modem-thermal/trips/trip-point0";
		npu_alert0 = "/thermal-zones/npu-thermal/trips/trip-point0";
		modem_vec_alert0 = "/thermal-zones/modem-vec-thermal/trips/trip-point0";
		modem_scl_alert0 = "/thermal-zones/modem-scl-thermal/trips/trip-point0";
		gpu2_alert0 = "/thermal-zones/gpu-thermal-bottom/trips/trip-point0";
		vph_pwr = "/vph-pwr-regulator";
		vreg_s4a_1p8 = "/pm8150-s4";
	};
};