/dts-v1/;

/ {
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
	compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", "qcom,qcs404";

	chosen {
		stdout-path = "serial0";
	};

	clocks {

		xo-board {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x124f800>;
			phandle = <0x1a>;
		};

		sleep-clk {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x8000>;
			phandle = <0x44>;
		};
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x100>;
			enable-method = "psci";
			cpu-idle-states = <0x02>;
			next-level-cache = <0x03>;
			#cooling-cells = <0x02>;
			clocks = <0x04>;
			operating-points-v2 = <0x05>;
			power-domains = <0x06>;
			power-domain-names = "cpr";
			phandle = <0x5b>;
		};

		cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x101>;
			enable-method = "psci";
			cpu-idle-states = <0x02>;
			next-level-cache = <0x03>;
			#cooling-cells = <0x02>;
			clocks = <0x04>;
			operating-points-v2 = <0x05>;
			power-domains = <0x06>;
			power-domain-names = "cpr";
			phandle = <0x5c>;
		};

		cpu@102 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x102>;
			enable-method = "psci";
			cpu-idle-states = <0x02>;
			next-level-cache = <0x03>;
			#cooling-cells = <0x02>;
			clocks = <0x04>;
			operating-points-v2 = <0x05>;
			power-domains = <0x06>;
			power-domain-names = "cpr";
			phandle = <0x5d>;
		};

		cpu@103 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x103>;
			enable-method = "psci";
			cpu-idle-states = <0x02>;
			next-level-cache = <0x03>;
			#cooling-cells = <0x02>;
			clocks = <0x04>;
			operating-points-v2 = <0x05>;
			power-domains = <0x06>;
			power-domain-names = "cpr";
			phandle = <0x5e>;
		};

		l2-cache {
			compatible = "cache";
			cache-level = <0x02>;
			phandle = <0x03>;
		};

		idle-states {
			entry-method = "psci";

			cpu-sleep-0 {
				compatible = "arm,idle-state";
				idle-state-name = "standalone-power-collapse";
				arm,psci-suspend-param = <0x40000003>;
				entry-latency-us = <0x7d>;
				exit-latency-us = <0xb4>;
				min-residency-us = <0x253>;
				local-timer-stop;
				phandle = <0x02>;
			};
		};
	};

	cpu-opp-table {
		compatible = "operating-points-v2-kryo-cpu";
		opp-shared;
		phandle = <0x05>;

		opp-1094400000 {
			opp-hz = <0x00 0x413b3800>;
			required-opps = <0x07>;
		};

		opp-1248000000 {
			opp-hz = <0x00 0x4a62f800>;
			required-opps = <0x08>;
		};

		opp-1401600000 {
			opp-hz = <0x00 0x538ab800>;
			required-opps = <0x09>;
		};
	};

	cpr-opp-table {
		compatible = "operating-points-v2-qcom-level";
		phandle = <0x46>;

		opp1 {
			opp-level = <0x01>;
			qcom,opp-fuse-level = <0x01>;
			phandle = <0x07>;
		};

		opp2 {
			opp-level = <0x02>;
			qcom,opp-fuse-level = <0x02>;
			phandle = <0x08>;
		};

		opp3 {
			opp-level = <0x03>;
			qcom,opp-fuse-level = <0x03>;
			phandle = <0x09>;
		};
	};

	firmware {

		scm {
			compatible = "qcom,scm-qcs404", "qcom,scm";
			#reset-cells = <0x01>;
			phandle = <0x66>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x00 0x80000000 0x00 0x00>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		memory@85900000 {
			reg = <0x00 0x85900000 0x00 0x500000>;
			no-map;
			phandle = <0x67>;
		};

		memory@85e00000 {
			reg = <0x00 0x85e00000 0x00 0x100000>;
			no-map;
			phandle = <0x68>;
		};

		memory@85f00000 {
			reg = <0x00 0x85f00000 0x00 0x200000>;
			no-map;
			phandle = <0x0f>;
		};

		memory@86100000 {
			reg = <0x00 0x86100000 0x00 0x300000>;
			no-map;
			phandle = <0x69>;
		};

		memory@86400000 {
			reg = <0x00 0x86400000 0x00 0x1100000>;
			no-map;
			phandle = <0x25>;
		};

		memory@87500000 {
			reg = <0x00 0x87500000 0x00 0x1a00000>;
			no-map;
			phandle = <0x55>;
		};

		memory@88f00000 {
			reg = <0x00 0x88f00000 0x00 0x600000>;
			no-map;
			phandle = <0x1d>;
		};

		memory@89500000 {
			reg = <0x00 0x89500000 0x00 0x100000>;
			no-map;
			phandle = <0x2f>;
		};

		memory@9f800000 {
			reg = <0x00 0x9f800000 0x00 0x800000>;
			no-map;
			phandle = <0x6a>;
		};
	};

	rpm-glink {
		compatible = "qcom,glink-rpm";
		interrupts = <0x00 0xa8 0x01>;
		qcom,rpm-msg-ram = <0x0a>;
		mboxes = <0x04 0x00>;

		glink-channel {
			compatible = "qcom,rpm-qcs404";
			qcom,glink-channels = "rpm_requests";
			phandle = <0x6b>;

			clock-controller {
				compatible = "qcom,rpmcc-qcs404";
				#clock-cells = <0x01>;
				phandle = <0x13>;
			};

			power-controller {
				compatible = "qcom,qcs404-rpmpd";
				#power-domain-cells = <0x01>;
				operating-points-v2 = <0x0b>;
				phandle = <0x6c>;

				opp-table {
					compatible = "operating-points-v2";
					phandle = <0x0b>;

					opp1 {
						opp-level = <0x10>;
						phandle = <0x6d>;
					};

					opp2 {
						opp-level = <0x20>;
						phandle = <0x6e>;
					};

					opp3 {
						opp-level = <0x30>;
						phandle = <0x6f>;
					};

					opp4 {
						opp-level = <0x40>;
						phandle = <0x70>;
					};

					opp5 {
						opp-level = <0x80>;
						phandle = <0x71>;
					};

					opp6 {
						opp-level = <0xc0>;
						phandle = <0x72>;
					};

					opp7 {
						opp-level = <0x100>;
						phandle = <0x73>;
					};

					opp8 {
						opp-level = <0x140>;
						phandle = <0x74>;
					};

					opp9 {
						opp-level = <0x180>;
						phandle = <0x75>;
					};

					opp10 {
						opp-level = <0x1a0>;
						phandle = <0x76>;
					};

					opp11 {
						opp-level = <0x200>;
						phandle = <0x77>;
					};
				};
			};

			pms405-regulators {
				compatible = "qcom,rpm-pms405-regulators";
				vdd_s1-supply = <0x0c>;
				vdd_s2-supply = <0x0c>;
				vdd_s3-supply = <0x0c>;
				vdd_s4-supply = <0x0c>;
				vdd_s5-supply = <0x0c>;
				vdd_l1_l2-supply = <0x0d>;
				vdd_l3_l8-supply = <0x0d>;
				vdd_l4-supply = <0x0d>;
				vdd_l5_l6-supply = <0x0e>;
				vdd_l7-supply = <0x0c>;
				vdd_l9-supply = <0x0d>;
				vdd_l10_l11_l12_l13-supply = <0x0c>;

				s4 {
					regulator-min-microvolt = <0x1a5e00>;
					regulator-max-microvolt = <0x1d4c00>;
					phandle = <0x0e>;
				};

				s5 {
					regulator-min-microvolt = <0x14a140>;
					regulator-max-microvolt = <0x14a140>;
					phandle = <0x0d>;
				};

				l1 {
					regulator-min-microvolt = <0x12ebc0>;
					regulator-max-microvolt = <0x14a140>;
					phandle = <0x31>;
				};

				l2 {
					regulator-min-microvolt = <0xffdc0>;
					regulator-max-microvolt = <0x138800>;
					phandle = <0x30>;
				};

				l3 {
					regulator-min-microvolt = <0xffdc0>;
					regulator-max-microvolt = <0x11b340>;
					phandle = <0x14>;
				};

				l4 {
					regulator-min-microvolt = <0x1174c0>;
					regulator-max-microvolt = <0x132a40>;
					phandle = <0x16>;
				};

				l5 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					phandle = <0x15>;
				};

				l6 {
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-always-on;
					phandle = <0x33>;
				};

				l7 {
					regulator-min-microvolt = <0x18a880>;
					regulator-max-microvolt = <0x2dc6c0>;
					phandle = <0x78>;
				};

				l8 {
					regulator-min-microvolt = <0x115580>;
					regulator-max-microvolt = <0x14a140>;
					phandle = <0x79>;
				};

				l10 {
					regulator-min-microvolt = <0x2cccc0>;
					regulator-max-microvolt = <0x2f1e80>;
					phandle = <0x7a>;
				};

				l11 {
					regulator-min-microvolt = <0x292340>;
					regulator-max-microvolt = <0x326a40>;
					phandle = <0x7b>;
				};

				l12 {
					regulator-min-microvolt = <0x2e8a10>;
					regulator-max-microvolt = <0x325aa0>;
					phandle = <0x17>;
				};

				l13 {
					regulator-min-microvolt = <0x2dc6c0>;
					regulator-max-microvolt = <0x325aa0>;
					phandle = <0x7c>;
				};
			};
		};
	};

	smem {
		compatible = "qcom,smem";
		memory-region = <0x0f>;
		qcom,rpm-msg-ram = <0x0a>;
		hwlocks = <0x10 0x03>;
	};

	hwlock {
		compatible = "qcom,tcsr-mutex";
		syscon = <0x11 0x00 0x1000>;
		#hwlock-cells = <0x01>;
		phandle = <0x10>;
	};

	soc@0 {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges = <0x00 0x00 0x00 0xffffffff>;
		compatible = "simple-bus";
		phandle = <0x7d>;

		clock-controller@800000 {
			compatible = "qcom,qcs404-turingcc";
			reg = <0x800000 0x30000>;
			clocks = <0x12 0x8f>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			status = "disabled";
			phandle = <0x1b>;
		};

		memory@60000 {
			compatible = "qcom,rpm-msg-ram";
			reg = <0x60000 0x6000>;
			phandle = <0x0a>;
		};

		phy@78000 {
			compatible = "qcom,usb-ss-28nm-phy";
			reg = <0x78000 0x400>;
			#phy-cells = <0x00>;
			clocks = <0x13 0x4a 0x12 0x5f 0x12 0x5e>;
			clock-names = "ref", "ahb", "pipe";
			resets = <0x12 0x06 0x12 0x08>;
			reset-names = "com", "phy";
			status = "okay";
			vdd-supply = <0x14>;
			vdda1p8-supply = <0x15>;
			phandle = <0x20>;
		};

		phy@7a000 {
			compatible = "qcom,usb-hs-28nm-femtophy";
			reg = <0x7a000 0x200>;
			#phy-cells = <0x00>;
			clocks = <0x13 0x4a 0x12 0x5f 0x12 0x59>;
			clock-names = "ref", "ahb", "sleep";
			resets = <0x12 0x04 0x12 0x05>;
			reset-names = "phy", "por";
			status = "okay";
			vdd-supply = <0x16>;
			vdda1p8-supply = <0x15>;
			vdda3p3-supply = <0x17>;
			phandle = <0x1f>;
		};

		phy@7c000 {
			compatible = "qcom,usb-hs-28nm-femtophy";
			reg = <0x7c000 0x200>;
			#phy-cells = <0x00>;
			clocks = <0x13 0x4a 0x12 0x5f 0x12 0x59>;
			clock-names = "ref", "ahb", "sleep";
			resets = <0x12 0x03 0x12 0x02>;
			reset-names = "phy", "por";
			status = "okay";
			vdd-supply = <0x16>;
			vdda1p8-supply = <0x15>;
			vdda3p3-supply = <0x17>;
			phandle = <0x21>;
		};

		qfprom@a4000 {
			compatible = "qcom,qfprom";
			reg = <0xa4000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			phandle = <0x7e>;

			caldata@d0 {
				reg = <0x1f8 0x14>;
				phandle = <0x18>;
			};

			speedbin@13c {
				reg = <0x13c 0x04>;
				bits = <0x02 0x03>;
				phandle = <0x7f>;
			};

			qoffset1@231 {
				reg = <0x231 0x04>;
				bits = <0x04 0x07>;
				phandle = <0x47>;
			};

			qoffset2@232 {
				reg = <0x232 0x04>;
				bits = <0x03 0x07>;
				phandle = <0x48>;
			};

			qoffset3@233 {
				reg = <0x233 0x04>;
				bits = <0x02 0x07>;
				phandle = <0x49>;
			};

			ivoltage1@229 {
				reg = <0x229 0x04>;
				bits = <0x04 0x06>;
				phandle = <0x4a>;
			};

			ivoltage2@22a {
				reg = <0x22a 0x04>;
				bits = <0x02 0x06>;
				phandle = <0x4b>;
			};

			ivoltage3@22b {
				reg = <0x22b 0x04>;
				bits = <0x00 0x06>;
				phandle = <0x4c>;
			};

			quot1@22b {
				reg = <0x22b 0x04>;
				bits = <0x06 0x0c>;
				phandle = <0x4d>;
			};

			quot2@22d {
				reg = <0x22d 0x04>;
				bits = <0x02 0x0c>;
				phandle = <0x4e>;
			};

			quot3@230 {
				reg = <0x230 0x04>;
				bits = <0x00 0x0c>;
				phandle = <0x4f>;
			};

			ring1@228 {
				reg = <0x228 0x04>;
				bits = <0x00 0x03>;
				phandle = <0x50>;
			};

			ring2@228 {
				reg = <0x228 0x04>;
				bits = <0x04 0x03>;
				phandle = <0x51>;
			};

			ring3@229 {
				reg = <0x229 0x04>;
				bits = <0x00 0x03>;
				phandle = <0x52>;
			};

			revision@218 {
				reg = <0x218 0x04>;
				bits = <0x03 0x03>;
				phandle = <0x53>;
			};
		};

		rng@e3000 {
			compatible = "qcom,prng-ee";
			reg = <0xe3000 0x1000>;
			clocks = <0x12 0x4e>;
			clock-names = "core";
			phandle = <0x80>;
		};

		interconnect@400000 {
			reg = <0x400000 0x80000>;
			compatible = "qcom,qcs404-bimc";
			#interconnect-cells = <0x01>;
			clock-names = "bus", "bus_a";
			clocks = <0x13 0x06 0x13 0x07>;
			phandle = <0x81>;
		};

		thermal-sensor@4a9000 {
			compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
			reg = <0x4a9000 0x1000 0x4a8000 0x1000>;
			nvmem-cells = <0x18>;
			nvmem-cell-names = "calib";
			#qcom,sensors = <0x0a>;
			interrupts = <0x00 0xb8 0x04>;
			interrupt-names = "uplow";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x59>;
		};

		interconnect@500000 {
			reg = <0x500000 0x15080>;
			compatible = "qcom,qcs404-pcnoc";
			#interconnect-cells = <0x01>;
			clock-names = "bus", "bus_a";
			clocks = <0x13 0x1a 0x13 0x1b>;
			phandle = <0x82>;
		};

		interconnect@580000 {
			reg = <0x580000 0x23080>;
			compatible = "qcom,qcs404-snoc";
			#interconnect-cells = <0x01>;
			clock-names = "bus", "bus_a";
			clocks = <0x13 0x04 0x13 0x05>;
			phandle = <0x83>;
		};

		remoteproc@b00000 {
			compatible = "qcom,qcs404-cdsp-pas";
			reg = <0xb00000 0x4040>;
			interrupts-extended = <0x01 0x00 0xe5 0x01 0x19 0x00 0x01 0x19 0x01 0x01 0x19 0x02 0x01 0x19 0x03 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			clocks = <0x1a 0x12 0x8f 0x12 0x91 0x12 0x90 0x1b 0x02 0x1b 0x03 0x1b 0x01 0x1b 0x00>;
			clock-names = "xo", "sway", "tbu", "bimc", "ahb_aon", "q6ss_slave", "q6ss_master", "q6_axim";
			resets = <0x12 0x0e>;
			reset-names = "restart";
			qcom,halt-regs = <0x1c 0x19004>;
			memory-region = <0x1d>;
			qcom,smem-states = <0x1e 0x00>;
			qcom,smem-state-names = "stop";
			status = "okay";
			phandle = <0x84>;

			glink-edge {
				interrupts = <0x00 0x8d 0x01>;
				qcom,remote-pid = <0x05>;
				mboxes = <0x04 0x0c>;
				label = "cdsp";
			};
		};

		usb@7678800 {
			compatible = "qcom,dwc3";
			reg = <0x7678800 0x400>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;
			clocks = <0x12 0x5a 0x12 0x57 0x12 0x5c 0x12 0x5b>;
			clock-names = "core", "iface", "sleep", "mock_utmi";
			assigned-clocks = <0x12 0x58 0x12 0x5a>;
			assigned-clock-rates = <0x124f800 0xbebc200>;
			status = "okay";
			phandle = <0x85>;

			dwc3@7580000 {
				compatible = "snps,dwc3";
				reg = <0x7580000 0xcd00>;
				interrupts = <0x00 0x1a 0x04>;
				phys = <0x1f 0x20>;
				phy-names = "usb2-phy", "usb3-phy";
				snps,has-lpm-erratum;
				snps,hird-threshold = [10];
				snps,usb3_lpm_capable;
				dr_mode = "host";
			};
		};

		usb@79b8800 {
			compatible = "qcom,dwc3";
			reg = <0x79b8800 0x400>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;
			clocks = <0x12 0x60 0x12 0x49 0x12 0x7a 0x12 0x58>;
			clock-names = "core", "iface", "sleep", "mock_utmi";
			assigned-clocks = <0x12 0x58 0x12 0x60>;
			assigned-clock-rates = <0x124f800 0x7f28155>;
			status = "okay";
			phandle = <0x86>;

			dwc3@78c0000 {
				compatible = "snps,dwc3";
				reg = <0x78c0000 0xcc00>;
				interrupts = <0x00 0x2c 0x04>;
				phys = <0x21>;
				phy-names = "usb2-phy";
				snps,has-lpm-erratum;
				snps,hird-threshold = [10];
				snps,usb3_lpm_capable;
				dr_mode = "peripheral";
			};
		};

		pinctrl@1000000 {
			compatible = "qcom,qcs404-pinctrl";
			reg = <0x1000000 0x200000 0x1300000 0x200000 0x7b00000 0x200000>;
			reg-names = "south", "north", "east";
			interrupts = <0x00 0xd0 0x04>;
			gpio-ranges = <0x22 0x00 0x00 0x78>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x22>;

			blsp1-i2c0-default {
				pins = "gpio32", "gpio33";
				function = "blsp_i2c0";
				phandle = <0x35>;
			};

			blsp1-i2c1-default {
				pins = "gpio24", "gpio25";
				function = "blsp_i2c1";
				phandle = <0x37>;
			};

			blsp1-i2c2-default {
				phandle = <0x39>;

				sda {
					pins = "gpio19";
					function = "blsp_i2c_sda_a2";
				};

				scl {
					pins = "gpio20";
					function = "blsp_i2c_scl_a2";
				};
			};

			blsp1-i2c3-default {
				pins = "gpio84", "gpio85";
				function = "blsp_i2c3";
				phandle = <0x3b>;
			};

			blsp1-i2c4-default {
				pins = "gpio117", "gpio118";
				function = "blsp_i2c4";
				phandle = <0x3d>;
			};

			blsp1-uart0-default {
				pins = "gpio30", "gpio31", "gpio32", "gpio33";
				function = "blsp_uart0";
				phandle = <0x2a>;
			};

			blsp1-uart1-default {
				pins = "gpio22", "gpio23";
				function = "blsp_uart1";
				phandle = <0x2b>;
			};

			blsp1-uart2-default {
				phandle = <0x2c>;

				rx {
					pins = "gpio18";
					function = "blsp_uart_rx_a2";
					drive-strength = <0x02>;
					bias-disable;
				};

				tx {
					pins = "gpio17";
					function = "blsp_uart_tx_a2";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			blsp1-uart3-default {
				pins = "gpio82", "gpio83", "gpio84", "gpio85";
				function = "blsp_uart3";
				phandle = <0x32>;

				cts {
					pins = "gpio84";
					bias-disable;
				};

				rts-tx {
					pins = "gpio85", "gpio82";
					drive-strength = <0x02>;
					bias-disable;
				};

				rx {
					pins = "gpio83";
					bias-pull-up;
				};
			};

			blsp2-i2c0-default {
				pins = "gpio28", "gpio29";
				function = "blsp_i2c5";
				phandle = <0x41>;
			};

			blsp1-spi0-default {
				pins = "gpio30", "gpio31", "gpio32", "gpio33";
				function = "blsp_spi0";
				phandle = <0x36>;
			};

			blsp1-spi1-default {
				pins = "gpio22", "gpio23", "gpio24", "gpio25";
				function = "blsp_spi1";
				phandle = <0x38>;
			};

			blsp1-spi2-default {
				pins = "gpio17", "gpio18", "gpio19", "gpio20";
				function = "blsp_spi2";
				phandle = <0x3a>;
			};

			blsp1-spi3-default {
				pins = "gpio82", "gpio83", "gpio84", "gpio85";
				function = "blsp_spi3";
				phandle = <0x3c>;
			};

			blsp1-spi4-default {
				pins = "gpio37", "gpio38", "gpio117", "gpio118";
				function = "blsp_spi4";
				phandle = <0x3e>;
			};

			blsp2-spi0-default {
				pins = "gpio26", "gpio27", "gpio28", "gpio29";
				function = "blsp_spi5";
				phandle = <0x42>;
			};

			blsp2-uart0-default {
				pins = "gpio26", "gpio27", "gpio28", "gpio29";
				function = "blsp_uart5";
				phandle = <0x40>;
			};

			perst {
				pins = "gpio43";
				function = "gpio";
				drive-strength = <0x02>;
				bias-disable;
				output-low;
				phandle = <0x58>;
			};

			sdc1-on {
				phandle = <0x27>;

				clk {
					pins = "sdc1_clk";
					bias-disable;
					drive-strength = <0x10>;
				};

				cmd {
					pins = "sdc1_cmd";
					bias-pull-up;
					drive-strength = <0x0a>;
				};

				data {
					pins = "sdc1_data";
					bias-pull-up;
					drive-strength = <0x0a>;
				};

				rclk {
					pins = "sdc1_rclk";
					bias-pull-down;
				};
			};

			sdc1-off {
				phandle = <0x28>;

				clk {
					pins = "sdc1_clk";
					bias-disable;
					drive-strength = <0x02>;
				};

				cmd {
					pins = "sdc1_cmd";
					bias-pull-up;
					drive-strength = <0x02>;
				};

				data {
					pins = "sdc1_data";
					bias-pull-up;
					drive-strength = <0x02>;
				};

				rclk {
					pins = "sdc1_rclk";
					bias-pull-down;
				};
			};

			usb3-id-pin {
				phandle = <0x87>;

				pinmux {
					pins = "gpio116";
					function = "gpio";
				};

				pinconf {
					pins = "gpio116";
					drive-strength = <0x02>;
					bias-pull-up;
					input-enable;
				};
			};

			ethernet-defaults {
				phandle = <0x2d>;

				int {
					pins = "gpio61";
					function = "rgmii_int";
					bias-disable;
					drive-strength = <0x02>;
				};

				mdc {
					pins = "gpio76";
					function = "rgmii_mdc";
					bias-pull-up;
				};

				mdio {
					pins = "gpio75";
					function = "rgmii_mdio";
					bias-pull-up;
				};

				tx {
					pins = "gpio67", "gpio66", "gpio65", "gpio64";
					function = "rgmii_tx";
					bias-pull-up;
					drive-strength = <0x10>;
				};

				rx {
					pins = "gpio73", "gpio72", "gpio71", "gpio70";
					function = "rgmii_rx";
					bias-disable;
					drive-strength = <0x02>;
				};

				tx-ctl {
					pins = "gpio68";
					function = "rgmii_ctl";
					bias-pull-up;
					drive-strength = <0x10>;
				};

				rx-ctl {
					pins = "gpio74";
					function = "rgmii_ctl";
					bias-disable;
					drive-strength = <0x02>;
				};

				tx-ck {
					pins = "gpio63";
					function = "rgmii_ck";
					bias-pull-up;
					drive-strength = <0x10>;
				};

				rx-ck {
					pins = "gpio69";
					function = "rgmii_ck";
					bias-disable;
					drive-strength = <0x02>;
				};
			};
		};

		clock-controller@1800000 {
			compatible = "qcom,gcc-qcs404";
			reg = <0x1800000 0x80000>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			assigned-clocks = <0x12 0x00>;
			assigned-clock-rates = <0x124f800>;
			protected-clocks = <0x90 0x8f 0x92 0x91 0x8d 0x8e>;
			phandle = <0x12>;
		};

		syscon@1905000 {
			compatible = "syscon";
			reg = <0x1905000 0x20000>;
			phandle = <0x11>;
		};

		syscon@1937000 {
			compatible = "syscon";
			reg = <0x1937000 0x25000>;
			phandle = <0x1c>;
		};

		spmi@200f000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = <0x200f000 0x1000 0x2400000 0x800000 0x2c00000 0x800000 0x3800000 0x200000 0x200a000 0x2100>;
			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
			interrupt-names = "periph_irq";
			interrupts = <0x00 0xbe 0x04>;
			qcom,ee = <0x00>;
			qcom,channel = <0x00>;
			#address-cells = <0x02>;
			#size-cells = <0x00>;
			interrupt-controller;
			#interrupt-cells = <0x04>;
			phandle = <0x88>;

			pms405@0 {
				compatible = "qcom,spmi-pmic";
				reg = <0x00 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x89>;

				gpio@c000 {
					compatible = "qcom,pms405-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupts = <0x00 0xc0 0x00 0x00 0x00 0xc1 0x00 0x00 0x00 0xc2 0x00 0x00 0x00 0xc3 0x00 0x00 0x00 0xc4 0x00 0x00 0x00 0xc5 0x00 0x00 0x00 0xc6 0x00 0x00 0x00 0xc7 0x00 0x00 0x00 0xc8 0x00 0x00 0x00 0xc9 0x00 0x00 0x00 0xca 0x00 0x00 0x00 0xcb 0x00 0x00>;
					phandle = <0x64>;

					usb-vbus-boost-pin {
						phandle = <0x65>;

						pinconf {
							pins = "gpio3";
							function = "normal";
							output-low;
							power-source = <0x01>;
						};
					};

					usb3-vbus-pin {
						phandle = <0x8a>;

						pinconf {
							pins = "gpio12";
							function = "normal";
							input-enable;
							bias-pull-down;
							power-source = <0x01>;
						};
					};
				};

				pon@800 {
					compatible = "qcom,pms405-pon";
					reg = <0x800>;
					mode-bootloader = <0x02>;
					mode-recovery = <0x01>;

					pwrkey {
						compatible = "qcom,pm8941-pwrkey";
						interrupts = <0x00 0x08 0x00 0x03>;
						debounce = <0x3d09>;
						bias-pull-up;
						linux,code = <0x74>;
					};
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x00 0x24 0x00 0x01>;
					io-channels = <0x23 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x63>;
				};

				adc@3100 {
					compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
					reg = <0x3100>;
					interrupts = <0x00 0x31 0x00 0x01>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					phandle = <0x23>;

					ref_gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
					};

					vref_1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
					};

					vph_pwr@131 {
						reg = <0x83>;
						qcom,pre-scaling = <0x01 0x03>;
						phandle = <0x8b>;
					};

					die_temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
					};

					thermistor1@77 {
						reg = <0x4d>;
						qcom,ratiometric;
						qcom,hw-settle-time = <0xc8>;
						qcom,pre-scaling = <0x01 0x01>;
						phandle = <0x8c>;
					};

					thermistor3@79 {
						reg = <0x4f>;
						qcom,ratiometric;
						qcom,hw-settle-time = <0xc8>;
						qcom,pre-scaling = <0x01 0x01>;
						phandle = <0x8d>;
					};

					xo_temp@76 {
						reg = <0x4c>;
						qcom,ratiometric;
						qcom,hw-settle-time = <0xc8>;
						qcom,pre-scaling = <0x01 0x01>;
						phandle = <0x8e>;
					};
				};

				rtc@6000 {
					compatible = "qcom,pm8941-rtc";
					reg = <0x6000>;
					reg-names = "rtc", "alarm";
					interrupts = <0x00 0x61 0x01 0x00>;
				};
			};

			pms405@1 {
				compatible = "qcom,spmi-pmic";
				reg = <0x01 0x00>;
				phandle = <0x8f>;

				regulators {
					compatible = "qcom,pms405-regulators";
					vdd_s3-supply = <0x0c>;
					phandle = <0x90>;

					s3 {
						regulator-always-on;
						regulator-boot-on;
						regulator-name = "vdd_apc";
						regulator-initial-mode = <0x01>;
						regulator-min-microvolt = <0xffdc0>;
						regulator-max-microvolt = <0x151e40>;
						phandle = <0x45>;
					};
				};
			};
		};

		remoteproc@7400000 {
			compatible = "qcom,qcs404-wcss-pas";
			reg = <0x7400000 0x4040>;
			interrupts-extended = <0x01 0x00 0x99 0x01 0x24 0x00 0x01 0x24 0x01 0x01 0x24 0x02 0x01 0x24 0x03 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			clocks = <0x1a>;
			clock-names = "xo";
			memory-region = <0x25>;
			qcom,smem-states = <0x26 0x00>;
			qcom,smem-state-names = "stop";
			status = "okay";
			phandle = <0x91>;

			glink-edge {
				interrupts = <0x00 0x9c 0x01>;
				qcom,remote-pid = <0x01>;
				mboxes = <0x04 0x10>;
				label = "wcss";
			};
		};

		phy@7786000 {
			compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";
			reg = <0x7786000 0xb8>;
			clocks = <0x12 0x47>;
			resets = <0x12 0x0c 0x12 0x15>;
			reset-names = "phy", "pipe";
			clock-output-names = "pcie_0_pipe_clk";
			#phy-cells = <0x00>;
			status = "okay";
			vdda-vp-supply = <0x14>;
			vdda-vph-supply = <0x15>;
			phandle = <0x57>;
		};

		sdcc@7804000 {
			compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
			reg = <0x7804000 0x1000 0x7805000 0x1000>;
			reg-names = "hc", "cqhci";
			interrupts = <0x00 0x7b 0x04 0x00 0x8a 0x04>;
			interrupt-names = "hc_irq", "pwr_irq";
			clocks = <0x12 0x53 0x12 0x52 0x1a>;
			clock-names = "core", "iface", "xo";
			status = "okay";
			supports-cqe;
			mmc-ddr-1_8v;
			mmc-hs400-1_8v;
			bus-width = <0x08>;
			non-removable;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x27>;
			pinctrl-1 = <0x28>;
			phandle = <0x92>;
		};

		dma@7884000 {
			compatible = "qcom,bam-v1.7.0";
			reg = <0x7884000 0x25000>;
			interrupts = <0x00 0xee 0x04>;
			clocks = <0x12 0x1b>;
			clock-names = "bam_clk";
			#dma-cells = <0x01>;
			qcom,ee = <0x00>;
			status = "okay";
			qcom,controlled-remotely;
			phandle = <0x29>;
		};

		serial@78af000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x78af000 0x200>;
			interrupts = <0x00 0x6b 0x04>;
			clocks = <0x12 0x26 0x12 0x1b>;
			clock-names = "core", "iface";
			dmas = <0x29 0x01 0x29 0x00>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x2a>;
			status = "disabled";
			phandle = <0x93>;
		};

		serial@78b0000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x78b0000 0x200>;
			interrupts = <0x00 0x6c 0x04>;
			clocks = <0x12 0x27 0x12 0x1b>;
			clock-names = "core", "iface";
			dmas = <0x29 0x03 0x29 0x02>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x2b>;
			status = "disabled";
			phandle = <0x94>;
		};

		serial@78b1000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x78b1000 0x200>;
			interrupts = <0x00 0x76 0x04>;
			clocks = <0x12 0x28 0x12 0x1b>;
			clock-names = "core", "iface";
			dmas = <0x29 0x05 0x29 0x04>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x2c>;
			status = "okay";
			phandle = <0x95>;
		};

		ethernet@7a80000 {
			compatible = "qcom,qcs404-ethqos";
			reg = <0x7a80000 0x10000 0x7a96000 0x100>;
			reg-names = "stmmaceth", "rgmii";
			clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
			clocks = <0x12 0x31 0x12 0x34 0x12 0x32 0x12 0x33>;
			interrupts = <0x00 0x38 0x04 0x00 0x37 0x04>;
			interrupt-names = "macirq", "eth_lpi";
			snps,tso;
			rx-fifo-depth = <0x1000>;
			tx-fifo-depth = <0x1000>;
			status = "okay";
			snps,reset-gpio = <0x22 0x3c 0x01>;
			snps,reset-active-low;
			snps,reset-delays-us = <0x00 0x2710 0x2710>;
			pinctrl-names = "default";
			pinctrl-0 = <0x2d>;
			phy-handle = <0x2e>;
			phy-mode = "rgmii";
			phandle = <0x96>;

			mdio {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				compatible = "snps,dwmac-mdio";

				phy@4 {
					compatible = "ethernet-phy-ieee802.3-c22";
					device_type = "ethernet-phy";
					reg = <0x04>;
					phandle = <0x2e>;
				};
			};
		};

		wifi@a000000 {
			compatible = "qcom,wcn3990-wifi";
			reg = <0xa000000 0x800000>;
			reg-names = "membase";
			memory-region = <0x2f>;
			interrupts = <0x00 0x115 0x04 0x00 0x116 0x04 0x00 0x117 0x04 0x00 0x118 0x04 0x00 0x119 0x04 0x00 0x11a 0x04 0x00 0x11b 0x04 0x00 0x11c 0x04 0x00 0x11d 0x04 0x00 0x11e 0x04 0x00 0x11f 0x04 0x00 0x120 0x04>;
			status = "okay";
			vdd-0.8-cx-mx-supply = <0x30>;
			vdd-1.8-xo-supply = <0x15>;
			vdd-1.3-rfa-supply = <0x31>;
			phandle = <0x97>;
		};

		serial@78b2000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x78b2000 0x200>;
			interrupts = <0x00 0x77 0x04>;
			clocks = <0x12 0x29 0x12 0x1b>;
			clock-names = "core", "iface";
			dmas = <0x29 0x07 0x29 0x06>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x32>;
			status = "okay";
			phandle = <0x98>;

			bluetooth {
				compatible = "qcom,wcn3990-bt";
				vddio-supply = <0x33>;
				vddxo-supply = <0x15>;
				vddrf-supply = <0x31>;
				vddch0-supply = <0x34>;
				local-bd-address = [02 00 00 00 5a ad];
				max-speed = <0x30d400>;
			};
		};

		i2c@78b5000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x78b5000 0x600>;
			interrupts = <0x00 0x5f 0x04>;
			clocks = <0x12 0x1b 0x12 0x1c>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x35>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x99>;
		};

		spi@78b5000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x78b5000 0x600>;
			interrupts = <0x00 0x5f 0x04>;
			clocks = <0x12 0x1b 0x12 0x1d>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x36>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x9a>;
		};

		i2c@78b6000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x78b6000 0x600>;
			interrupts = <0x00 0x60 0x04>;
			clocks = <0x12 0x1b 0x12 0x1e>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x37>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x9b>;
		};

		spi@78b6000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x78b6000 0x600>;
			interrupts = <0x00 0x60 0x04>;
			clocks = <0x12 0x1b 0x12 0x1f>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x38>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x9c>;
		};

		i2c@78b7000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x78b7000 0x600>;
			interrupts = <0x00 0x61 0x04>;
			clocks = <0x12 0x1b 0x12 0x20>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x39>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x9d>;
		};

		spi@78b7000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x78b7000 0x600>;
			interrupts = <0x00 0x61 0x04>;
			clocks = <0x12 0x1b 0x12 0x21>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x3a>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x9e>;
		};

		i2c@78b8000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x78b8000 0x600>;
			interrupts = <0x00 0x62 0x04>;
			clocks = <0x12 0x1b 0x12 0x22>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x3b>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x9f>;
		};

		spi@78b8000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x78b8000 0x600>;
			interrupts = <0x00 0x62 0x04>;
			clocks = <0x12 0x1b 0x12 0x23>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x3c>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0xa0>;
		};

		i2c@78b9000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x78b9000 0x600>;
			interrupts = <0x00 0x63 0x04>;
			clocks = <0x12 0x1b 0x12 0x24>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x3d>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0xa1>;
		};

		spi@78b9000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x78b9000 0x600>;
			interrupts = <0x00 0x63 0x04>;
			clocks = <0x12 0x1b 0x12 0x25>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x3e>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0xa2>;
		};

		dma@7ac4000 {
			compatible = "qcom,bam-v1.7.0";
			reg = <0x7ac4000 0x17000>;
			interrupts = <0x00 0xef 0x04>;
			clocks = <0x12 0x2a>;
			clock-names = "bam_clk";
			#dma-cells = <0x01>;
			qcom,ee = <0x00>;
			status = "disabled";
			qcom,controlled-remotely;
			phandle = <0x3f>;
		};

		serial@7aef000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x7aef000 0x200>;
			interrupts = <0x00 0x129 0x04>;
			clocks = <0x12 0x2d 0x12 0x2a>;
			clock-names = "core", "iface";
			dmas = <0x3f 0x01 0x3f 0x00>;
			dma-names = "rx", "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x40>;
			status = "disabled";
			phandle = <0xa3>;
		};

		i2c@7af5000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0x7af5000 0x600>;
			interrupts = <0x00 0x12b 0x04>;
			clocks = <0x12 0x2a 0x12 0x2b>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x41>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0xa4>;
		};

		spi@7af5000 {
			compatible = "qcom,spi-qup-v2.2.1";
			reg = <0x7af5000 0x600>;
			interrupts = <0x00 0x12b 0x04>;
			clocks = <0x12 0x2a 0x12 0x2c>;
			clock-names = "iface", "core";
			pinctrl-names = "default";
			pinctrl-0 = <0x42>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0xa5>;
		};

		imem@8600000 {
			compatible = "simple-mfd";
			reg = <0x8600000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x8600000 0x1000>;

			pil-reloc@94c {
				compatible = "qcom,pil-reloc-info";
				reg = <0x94c 0xc8>;
			};
		};

		interrupt-controller@b000000 {
			compatible = "qcom,msm-qgic2";
			interrupt-controller;
			#interrupt-cells = <0x03>;
			reg = <0xb000000 0x1000 0xb002000 0x1000>;
			phandle = <0x01>;
		};

		mailbox@b011000 {
			compatible = "qcom,qcs404-apcs-apps-global", "syscon";
			reg = <0xb011000 0x1000>;
			#mbox-cells = <0x01>;
			clocks = <0x43 0x12 0x7b>;
			clock-names = "pll", "aux";
			#clock-cells = <0x00>;
			phandle = <0x04>;
		};

		clock-controller@b016000 {
			compatible = "qcom,hfpll";
			reg = <0xb016000 0x30>;
			#clock-cells = <0x00>;
			clock-output-names = "apcs_hfpll";
			clocks = <0x1a>;
			clock-names = "xo";
			phandle = <0x43>;
		};

		watchdog@b017000 {
			compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt";
			reg = <0xb017000 0x1000>;
			clocks = <0x44>;
		};

		power-controller@b018000 {
			compatible = "qcom,qcs404-cpr", "qcom,cpr";
			reg = <0xb018000 0x1000>;
			interrupts = <0x00 0x0f 0x01>;
			clocks = <0x1a>;
			clock-names = "ref";
			vdd-apc-supply = <0x45>;
			#power-domain-cells = <0x00>;
			operating-points-v2 = <0x46>;
			acc-syscon = <0x1c>;
			nvmem-cells = <0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53>;
			nvmem-cell-names = "cpr_quotient_offset1", "cpr_quotient_offset2", "cpr_quotient_offset3", "cpr_init_voltage1", "cpr_init_voltage2", "cpr_init_voltage3", "cpr_quotient1", "cpr_quotient2", "cpr_quotient3", "cpr_ring_osc1", "cpr_ring_osc2", "cpr_ring_osc3", "cpr_fuse_revision";
			phandle = <0x06>;
		};

		timer@b120000 {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0xb120000 0x1000>;
			clock-frequency = <0x124f800>;

			frame@b121000 {
				frame-number = <0x00>;
				interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>;
				reg = <0xb121000 0x1000 0xb122000 0x1000>;
			};

			frame@b123000 {
				frame-number = <0x01>;
				interrupts = <0x00 0x09 0x04>;
				reg = <0xb123000 0x1000>;
				status = "disabled";
			};

			frame@b124000 {
				frame-number = <0x02>;
				interrupts = <0x00 0x0a 0x04>;
				reg = <0xb124000 0x1000>;
				status = "disabled";
			};

			frame@b125000 {
				frame-number = <0x03>;
				interrupts = <0x00 0x0b 0x04>;
				reg = <0xb125000 0x1000>;
				status = "disabled";
			};

			frame@b126000 {
				frame-number = <0x04>;
				interrupts = <0x00 0x0c 0x04>;
				reg = <0xb126000 0x1000>;
				status = "disabled";
			};

			frame@b127000 {
				frame-number = <0x05>;
				interrupts = <0x00 0x0d 0x04>;
				reg = <0xb127000 0x1000>;
				status = "disabled";
			};

			frame@b128000 {
				frame-number = <0x06>;
				interrupts = <0x00 0x0e 0x04>;
				reg = <0xb128000 0x1000>;
				status = "disabled";
			};
		};

		remoteproc@c700000 {
			compatible = "qcom,qcs404-adsp-pas";
			reg = <0xc700000 0x4040>;
			interrupts-extended = <0x01 0x00 0x125 0x01 0x54 0x00 0x01 0x54 0x01 0x01 0x54 0x02 0x01 0x54 0x03 0x01>;
			interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
			clocks = <0x1a>;
			clock-names = "xo";
			memory-region = <0x55>;
			qcom,smem-states = <0x56 0x00>;
			qcom,smem-state-names = "stop";
			status = "okay";
			phandle = <0xa6>;

			glink-edge {
				interrupts = <0x00 0x121 0x01>;
				qcom,remote-pid = <0x02>;
				mboxes = <0x04 0x08>;
				label = "adsp";
			};
		};

		pci@10000000 {
			compatible = "qcom,pcie-qcs404", "snps,dw-pcie";
			reg = <0x10000000 0xf1d 0x10000f20 0xa8 0x7780000 0x2000 0x10001000 0x2000>;
			reg-names = "dbi", "elbi", "parf", "config";
			device_type = "pci";
			linux,pci-domain = <0x00>;
			bus-range = <0x00 0xff>;
			num-lanes = <0x01>;
			#address-cells = <0x03>;
			#size-cells = <0x02>;
			ranges = <0x81000000 0x00 0x00 0x10003000 0x00 0x10000 0x82000000 0x00 0x10013000 0x10013000 0x00 0x7ed000>;
			interrupts = <0x00 0x10a 0x04>;
			interrupt-names = "msi";
			#interrupt-cells = <0x01>;
			interrupt-map-mask = <0x00 0x00 0x00 0x07>;
			interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x44 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xe0 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x10b 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x10c 0x04>;
			clocks = <0x12 0x45 0x12 0x44 0x12 0x46 0x12 0x48>;
			clock-names = "iface", "aux", "master_bus", "slave_bus";
			resets = <0x12 0x12 0x12 0x11 0x12 0x0f 0x12 0x13 0x12 0x09 0x12 0x10>;
			reset-names = "axi_m", "axi_s", "axi_m_sticky", "pipe_sticky", "pwr", "ahb";
			phys = <0x57>;
			phy-names = "pciephy";
			status = "okay";
			perst-gpio = <0x22 0x2b 0x01>;
			pinctrl-names = "default";
			pinctrl-0 = <0x58>;
			phandle = <0xa7>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x02 0xff08 0x01 0x03 0xff08 0x01 0x04 0xff08 0x01 0x01 0xff08>;
	};

	smp2p-adsp {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1bb 0x1ad>;
		interrupts = <0x00 0x123 0x01>;
		mboxes = <0x04 0x0a>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x02>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x56>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x54>;
		};
	};

	smp2p-cdsp {
		compatible = "qcom,smp2p";
		qcom,smem = <0x5e 0x1b0>;
		interrupts = <0x00 0x8f 0x01>;
		mboxes = <0x04 0x0e>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x05>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x1e>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x19>;
		};
	};

	smp2p-wcss {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1b3 0x1ac>;
		interrupts = <0x00 0x9e 0x01>;
		mboxes = <0x04 0x12>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x01>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x26>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x24>;
		};
	};

	thermal-zones {

		aoss-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x00>;

			trips {

				trip-point0 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xa8>;
				};
			};
		};

		q6-hvx-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x01>;

			trips {

				trip-point0 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xa9>;
				};
			};
		};

		lpass-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x02>;

			trips {

				trip-point0 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xaa>;
				};
			};
		};

		wlan-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x03>;

			trips {

				trip-point0 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xab>;
				};
			};
		};

		cluster-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x04>;

			trips {

				trip-point0 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xac>;
				};

				trip-point1 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5a>;
				};

				cluster_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xad>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x5a>;
					cooling-device = <0x5b 0xffffffff 0xffffffff 0x5c 0xffffffff 0xffffffff 0x5d 0xffffffff 0xffffffff 0x5e 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x05>;

			trips {

				trip-point0 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xae>;
				};

				trip-point1 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x5f>;
				};

				cpu_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xaf>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x5f>;
					cooling-device = <0x5b 0xffffffff 0xffffffff 0x5c 0xffffffff 0xffffffff 0x5d 0xffffffff 0xffffffff 0x5e 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x06>;

			trips {

				trip-point0 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xb0>;
				};

				trip-point1 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x60>;
				};

				cpu_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xb1>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x60>;
					cooling-device = <0x5b 0xffffffff 0xffffffff 0x5c 0xffffffff 0xffffffff 0x5d 0xffffffff 0xffffffff 0x5e 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu2-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x07>;

			trips {

				trip-point0 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xb2>;
				};

				trip-point1 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x61>;
				};

				cpu_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xb3>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x61>;
					cooling-device = <0x5b 0xffffffff 0xffffffff 0x5c 0xffffffff 0xffffffff 0x5d 0xffffffff 0xffffffff 0x5e 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu3-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x08>;

			trips {

				trip-point0 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xb4>;
				};

				trip-point1 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x62>;
				};

				cpu_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xb5>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x62>;
					cooling-device = <0x5b 0xffffffff 0xffffffff 0x5c 0xffffffff 0xffffffff 0x5d 0xffffffff 0xffffffff 0x5e 0xffffffff 0xffffffff>;
				};
			};
		};

		gpu-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x59 0x09>;

			trips {

				trip-point0 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0xb6>;
				};
			};
		};

		pms405 {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x63>;

			trips {

				pms405-alert0 {
					temperature = <0x19a28>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0xb7>;
				};

				pms405-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xb8>;
				};
			};
		};
	};

	aliases {
		serial0 = "/soc@0/serial@78b1000";
		serial1 = "/soc@0/serial@78b2000";
	};

	vph-pwr-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vph_pwr";
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x0c>;
	};

	vdd-esmps3-3p3-regulator {
		compatible = "regulator-fixed";
		regulator-name = "eSMPS3_3P3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-always-on;
		phandle = <0x34>;
	};

	regulator-usb3-vbus {
		compatible = "regulator-fixed";
		regulator-name = "VBUS_BOOST_5V";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		gpio = <0x64 0x03 0x00>;
		pinctrl-names = "default";
		pinctrl-0 = <0x65>;
		vin-supply = <0x0c>;
		enable-active-high;
		regulator-always-on;
		phandle = <0xb9>;
	};

	__symbols__ {
		xo_board = "/clocks/xo-board";
		sleep_clk = "/clocks/sleep-clk";
		CPU0 = "/cpus/cpu@100";
		CPU1 = "/cpus/cpu@101";
		CPU2 = "/cpus/cpu@102";
		CPU3 = "/cpus/cpu@103";
		L2_0 = "/cpus/l2-cache";
		CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
		cpu_opp_table = "/cpu-opp-table";
		cpr_opp_table = "/cpr-opp-table";
		cpr_opp1 = "/cpr-opp-table/opp1";
		cpr_opp2 = "/cpr-opp-table/opp2";
		cpr_opp3 = "/cpr-opp-table/opp3";
		scm = "/firmware/scm";
		tz_apps_mem = "/reserved-memory/memory@85900000";
		xbl_mem = "/reserved-memory/memory@85e00000";
		smem_region = "/reserved-memory/memory@85f00000";
		tz_mem = "/reserved-memory/memory@86100000";
		wlan_fw_mem = "/reserved-memory/memory@86400000";
		adsp_fw_mem = "/reserved-memory/memory@87500000";
		cdsp_fw_mem = "/reserved-memory/memory@88f00000";
		wlan_msa_mem = "/reserved-memory/memory@89500000";
		uefi_mem = "/reserved-memory/memory@9f800000";
		rpm_requests = "/rpm-glink/glink-channel";
		rpmcc = "/rpm-glink/glink-channel/clock-controller";
		rpmpd = "/rpm-glink/glink-channel/power-controller";
		rpmpd_opp_table = "/rpm-glink/glink-channel/power-controller/opp-table";
		rpmpd_opp_ret = "/rpm-glink/glink-channel/power-controller/opp-table/opp1";
		rpmpd_opp_ret_plus = "/rpm-glink/glink-channel/power-controller/opp-table/opp2";
		rpmpd_opp_min_svs = "/rpm-glink/glink-channel/power-controller/opp-table/opp3";
		rpmpd_opp_low_svs = "/rpm-glink/glink-channel/power-controller/opp-table/opp4";
		rpmpd_opp_svs = "/rpm-glink/glink-channel/power-controller/opp-table/opp5";
		rpmpd_opp_svs_plus = "/rpm-glink/glink-channel/power-controller/opp-table/opp6";
		rpmpd_opp_nom = "/rpm-glink/glink-channel/power-controller/opp-table/opp7";
		rpmpd_opp_nom_plus = "/rpm-glink/glink-channel/power-controller/opp-table/opp8";
		rpmpd_opp_turbo = "/rpm-glink/glink-channel/power-controller/opp-table/opp9";
		rpmpd_opp_turbo_no_cpr = "/rpm-glink/glink-channel/power-controller/opp-table/opp10";
		rpmpd_opp_turbo_plus = "/rpm-glink/glink-channel/power-controller/opp-table/opp11";
		vreg_s4_1p8 = "/rpm-glink/glink-channel/pms405-regulators/s4";
		vreg_s5_1p35 = "/rpm-glink/glink-channel/pms405-regulators/s5";
		vreg_l1_1p3 = "/rpm-glink/glink-channel/pms405-regulators/l1";
		vreg_l2_1p275 = "/rpm-glink/glink-channel/pms405-regulators/l2";
		vreg_l3_1p05 = "/rpm-glink/glink-channel/pms405-regulators/l3";
		vreg_l4_1p2 = "/rpm-glink/glink-channel/pms405-regulators/l4";
		vreg_l5_1p8 = "/rpm-glink/glink-channel/pms405-regulators/l5";
		vreg_l6_1p8 = "/rpm-glink/glink-channel/pms405-regulators/l6";
		vreg_l7_1p8 = "/rpm-glink/glink-channel/pms405-regulators/l7";
		vreg_l8_1p2 = "/rpm-glink/glink-channel/pms405-regulators/l8";
		vreg_l10_3p3 = "/rpm-glink/glink-channel/pms405-regulators/l10";
		vreg_l11_sdc2 = "/rpm-glink/glink-channel/pms405-regulators/l11";
		vreg_l12_3p3 = "/rpm-glink/glink-channel/pms405-regulators/l12";
		vreg_l13_3p3 = "/rpm-glink/glink-channel/pms405-regulators/l13";
		tcsr_mutex = "/hwlock";
		soc = "/soc@0";
		turingcc = "/soc@0/clock-controller@800000";
		rpm_msg_ram = "/soc@0/memory@60000";
		usb3_phy = "/soc@0/phy@78000";
		usb2_phy_prim = "/soc@0/phy@7a000";
		usb2_phy_sec = "/soc@0/phy@7c000";
		qfprom = "/soc@0/qfprom@a4000";
		tsens_caldata = "/soc@0/qfprom@a4000/caldata@d0";
		cpr_efuse_speedbin = "/soc@0/qfprom@a4000/speedbin@13c";
		cpr_efuse_quot_offset1 = "/soc@0/qfprom@a4000/qoffset1@231";
		cpr_efuse_quot_offset2 = "/soc@0/qfprom@a4000/qoffset2@232";
		cpr_efuse_quot_offset3 = "/soc@0/qfprom@a4000/qoffset3@233";
		cpr_efuse_init_voltage1 = "/soc@0/qfprom@a4000/ivoltage1@229";
		cpr_efuse_init_voltage2 = "/soc@0/qfprom@a4000/ivoltage2@22a";
		cpr_efuse_init_voltage3 = "/soc@0/qfprom@a4000/ivoltage3@22b";
		cpr_efuse_quot1 = "/soc@0/qfprom@a4000/quot1@22b";
		cpr_efuse_quot2 = "/soc@0/qfprom@a4000/quot2@22d";
		cpr_efuse_quot3 = "/soc@0/qfprom@a4000/quot3@230";
		cpr_efuse_ring1 = "/soc@0/qfprom@a4000/ring1@228";
		cpr_efuse_ring2 = "/soc@0/qfprom@a4000/ring2@228";
		cpr_efuse_ring3 = "/soc@0/qfprom@a4000/ring3@229";
		cpr_efuse_revision = "/soc@0/qfprom@a4000/revision@218";
		rng = "/soc@0/rng@e3000";
		bimc = "/soc@0/interconnect@400000";
		tsens = "/soc@0/thermal-sensor@4a9000";
		pcnoc = "/soc@0/interconnect@500000";
		snoc = "/soc@0/interconnect@580000";
		remoteproc_cdsp = "/soc@0/remoteproc@b00000";
		usb3 = "/soc@0/usb@7678800";
		usb2 = "/soc@0/usb@79b8800";
		tlmm = "/soc@0/pinctrl@1000000";
		blsp1_i2c0_default = "/soc@0/pinctrl@1000000/blsp1-i2c0-default";
		blsp1_i2c1_default = "/soc@0/pinctrl@1000000/blsp1-i2c1-default";
		blsp1_i2c2_default = "/soc@0/pinctrl@1000000/blsp1-i2c2-default";
		blsp1_i2c3_default = "/soc@0/pinctrl@1000000/blsp1-i2c3-default";
		blsp1_i2c4_default = "/soc@0/pinctrl@1000000/blsp1-i2c4-default";
		blsp1_uart0_default = "/soc@0/pinctrl@1000000/blsp1-uart0-default";
		blsp1_uart1_default = "/soc@0/pinctrl@1000000/blsp1-uart1-default";
		blsp1_uart2_default = "/soc@0/pinctrl@1000000/blsp1-uart2-default";
		blsp1_uart3_default = "/soc@0/pinctrl@1000000/blsp1-uart3-default";
		blsp2_i2c0_default = "/soc@0/pinctrl@1000000/blsp2-i2c0-default";
		blsp1_spi0_default = "/soc@0/pinctrl@1000000/blsp1-spi0-default";
		blsp1_spi1_default = "/soc@0/pinctrl@1000000/blsp1-spi1-default";
		blsp1_spi2_default = "/soc@0/pinctrl@1000000/blsp1-spi2-default";
		blsp1_spi3_default = "/soc@0/pinctrl@1000000/blsp1-spi3-default";
		blsp1_spi4_default = "/soc@0/pinctrl@1000000/blsp1-spi4-default";
		blsp2_spi0_default = "/soc@0/pinctrl@1000000/blsp2-spi0-default";
		blsp2_uart0_default = "/soc@0/pinctrl@1000000/blsp2-uart0-default";
		perst_state = "/soc@0/pinctrl@1000000/perst";
		sdc1_on = "/soc@0/pinctrl@1000000/sdc1-on";
		sdc1_off = "/soc@0/pinctrl@1000000/sdc1-off";
		usb3_id_pin = "/soc@0/pinctrl@1000000/usb3-id-pin";
		ethernet_defaults = "/soc@0/pinctrl@1000000/ethernet-defaults";
		gcc = "/soc@0/clock-controller@1800000";
		tcsr_mutex_regs = "/soc@0/syscon@1905000";
		tcsr = "/soc@0/syscon@1937000";
		spmi_bus = "/soc@0/spmi@200f000";
		pms405_0 = "/soc@0/spmi@200f000/pms405@0";
		pms405_gpios = "/soc@0/spmi@200f000/pms405@0/gpio@c000";
		usb_vbus_boost_pin = "/soc@0/spmi@200f000/pms405@0/gpio@c000/usb-vbus-boost-pin";
		usb3_vbus_pin = "/soc@0/spmi@200f000/pms405@0/gpio@c000/usb3-vbus-pin";
		pms405_temp = "/soc@0/spmi@200f000/pms405@0/temp-alarm@2400";
		pms405_adc = "/soc@0/spmi@200f000/pms405@0/adc@3100";
		pon_1 = "/soc@0/spmi@200f000/pms405@0/adc@3100/vph_pwr@131";
		pa_therm1 = "/soc@0/spmi@200f000/pms405@0/adc@3100/thermistor1@77";
		pa_therm3 = "/soc@0/spmi@200f000/pms405@0/adc@3100/thermistor3@79";
		xo_therm = "/soc@0/spmi@200f000/pms405@0/adc@3100/xo_temp@76";
		pms405_1 = "/soc@0/spmi@200f000/pms405@1";
		pms405_spmi_regulators = "/soc@0/spmi@200f000/pms405@1/regulators";
		pms405_s3 = "/soc@0/spmi@200f000/pms405@1/regulators/s3";
		remoteproc_wcss = "/soc@0/remoteproc@7400000";
		pcie_phy = "/soc@0/phy@7786000";
		sdcc1 = "/soc@0/sdcc@7804000";
		blsp1_dma = "/soc@0/dma@7884000";
		blsp1_uart0 = "/soc@0/serial@78af000";
		blsp1_uart1 = "/soc@0/serial@78b0000";
		blsp1_uart2 = "/soc@0/serial@78b1000";
		ethernet = "/soc@0/ethernet@7a80000";
		phy1 = "/soc@0/ethernet@7a80000/mdio/phy@4";
		wifi = "/soc@0/wifi@a000000";
		blsp1_uart3 = "/soc@0/serial@78b2000";
		blsp1_i2c0 = "/soc@0/i2c@78b5000";
		blsp1_spi0 = "/soc@0/spi@78b5000";
		blsp1_i2c1 = "/soc@0/i2c@78b6000";
		blsp1_spi1 = "/soc@0/spi@78b6000";
		blsp1_i2c2 = "/soc@0/i2c@78b7000";
		blsp1_spi2 = "/soc@0/spi@78b7000";
		blsp1_i2c3 = "/soc@0/i2c@78b8000";
		blsp1_spi3 = "/soc@0/spi@78b8000";
		blsp1_i2c4 = "/soc@0/i2c@78b9000";
		blsp1_spi4 = "/soc@0/spi@78b9000";
		blsp2_dma = "/soc@0/dma@7ac4000";
		blsp2_uart0 = "/soc@0/serial@7aef000";
		blsp2_i2c0 = "/soc@0/i2c@7af5000";
		blsp2_spi0 = "/soc@0/spi@7af5000";
		intc = "/soc@0/interrupt-controller@b000000";
		apcs_glb = "/soc@0/mailbox@b011000";
		apcs_hfpll = "/soc@0/clock-controller@b016000";
		cpr = "/soc@0/power-controller@b018000";
		remoteproc_adsp = "/soc@0/remoteproc@c700000";
		pcie = "/soc@0/pci@10000000";
		adsp_smp2p_out = "/smp2p-adsp/master-kernel";
		adsp_smp2p_in = "/smp2p-adsp/slave-kernel";
		cdsp_smp2p_out = "/smp2p-cdsp/master-kernel";
		cdsp_smp2p_in = "/smp2p-cdsp/slave-kernel";
		wcss_smp2p_out = "/smp2p-wcss/master-kernel";
		wcss_smp2p_in = "/smp2p-wcss/slave-kernel";
		aoss_alert0 = "/thermal-zones/aoss-thermal/trips/trip-point0";
		q6_hvx_alert0 = "/thermal-zones/q6-hvx-thermal/trips/trip-point0";
		lpass_alert0 = "/thermal-zones/lpass-thermal/trips/trip-point0";
		wlan_alert0 = "/thermal-zones/wlan-thermal/trips/trip-point0";
		cluster_alert0 = "/thermal-zones/cluster-thermal/trips/trip-point0";
		cluster_alert1 = "/thermal-zones/cluster-thermal/trips/trip-point1";
		cluster_crit = "/thermal-zones/cluster-thermal/trips/cluster_crit";
		cpu0_alert0 = "/thermal-zones/cpu0-thermal/trips/trip-point0";
		cpu0_alert1 = "/thermal-zones/cpu0-thermal/trips/trip-point1";
		cpu0_crit = "/thermal-zones/cpu0-thermal/trips/cpu_crit";
		cpu1_alert0 = "/thermal-zones/cpu1-thermal/trips/trip-point0";
		cpu1_alert1 = "/thermal-zones/cpu1-thermal/trips/trip-point1";
		cpu1_crit = "/thermal-zones/cpu1-thermal/trips/cpu_crit";
		cpu2_alert0 = "/thermal-zones/cpu2-thermal/trips/trip-point0";
		cpu2_alert1 = "/thermal-zones/cpu2-thermal/trips/trip-point1";
		cpu2_crit = "/thermal-zones/cpu2-thermal/trips/cpu_crit";
		cpu3_alert0 = "/thermal-zones/cpu3-thermal/trips/trip-point0";
		cpu3_alert1 = "/thermal-zones/cpu3-thermal/trips/trip-point1";
		cpu3_crit = "/thermal-zones/cpu3-thermal/trips/cpu_crit";
		gpu_alert0 = "/thermal-zones/gpu-thermal/trips/trip-point0";
		pms405_alert0 = "/thermal-zones/pms405/trips/pms405-alert0";
		pms405_crit = "/thermal-zones/pms405/trips/pms405-crit";
		vph_pwr = "/vph-pwr-regulator";
		vdd_ch0_3p3 = "/vdd-esmps3-3p3-regulator";
		vdd_esmps3_3p3 = "/vdd-esmps3-3p3-regulator";
		usb3_vbus_reg = "/regulator-usb3-vbus";
	};
};