/dts-v1/;

/ {
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "LG Nexus 5X";
	compatible = "lg,bullhead", "qcom,msm8992";
	qcom,msm-id = <0xfb 0x00 0xfc 0x00>;
	qcom,board-id = <0xb64 0x00>;
	qcom,pmic-id = <0x10009 0x1000a 0x00 0x00>;

	chosen {
		stdout-path = "serial0:115200n8";
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x00 0x00>;
			next-level-cache = <0x02>;
			enable-method = "psci";
			phandle = <0x04>;

			l2-cache {
				compatible = "cache";
				cache-level = <0x02>;
				phandle = <0x02>;
			};
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x00 0x01>;
			next-level-cache = <0x02>;
			enable-method = "psci";
			phandle = <0x05>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x00 0x02>;
			next-level-cache = <0x02>;
			enable-method = "psci";
			phandle = <0x06>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x00 0x03>;
			next-level-cache = <0x02>;
			enable-method = "psci";
			phandle = <0x07>;
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <0x00 0x100>;
			next-level-cache = <0x03>;
			enable-method = "psci";
			phandle = <0x08>;

			l2-cache {
				compatible = "cache";
				cache-level = <0x02>;
				phandle = <0x03>;
			};
		};

		cpu@101 {
			device_type = "cpu";
			compatible = "arm,cortex-a57";
			reg = <0x00 0x101>;
			next-level-cache = <0x03>;
			enable-method = "psci";
			phandle = <0x09>;
		};

		cpu-map {

			cluster0 {

				core0 {
					cpu = <0x04>;
				};

				core1 {
					cpu = <0x05>;
				};

				core2 {
					cpu = <0x06>;
				};

				core3 {
					cpu = <0x07>;
				};
			};

			cluster1 {

				core0 {
					cpu = <0x08>;
				};

				core1 {
					cpu = <0x09>;
				};
			};
		};
	};

	clocks {

		xo_board {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x124f800>;
			phandle = <0x0f>;
		};

		sleep_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x8000>;
			phandle = <0x2d>;
		};
	};

	firmware {

		scm {
			compatible = "qcom,scm-msm8994", "qcom,scm";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00 0x00 0x00 0x00>;
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <0x01 0x07 0xf04>;
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		smem@6a00000 {
			reg = <0x00 0x6a00000 0x00 0x200000>;
			no-map;
			phandle = <0x0b>;
		};

		ramoops@1ff00000 {
			compatible = "ramoops";
			reg = <0x00 0x1ff00000 0x00 0x40000>;
			console-size = <0x10000>;
			record-size = <0x10000>;
			ftrace-size = <0x10000>;
			pmsg-size = <0x20000>;
		};
	};

	hwmutex {
		compatible = "qcom,sfpb-mutex";
		syscon = <0x0a 0x00 0x100>;
		#hwlock-cells = <0x01>;
		phandle = <0x0d>;
	};

	smem {
		compatible = "qcom,smem";
		memory-region = <0x0b>;
		qcom,rpm-msg-ram = <0x0c>;
		hwlocks = <0x0d 0x03>;
	};

	soc {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges = <0x00 0x00 0x00 0xffffffff>;
		compatible = "simple-bus";

		interrupt-controller@f9000000 {
			compatible = "qcom,msm-qgic2";
			interrupt-controller;
			#interrupt-cells = <0x03>;
			reg = <0xf9000000 0x1000 0xf9002000 0x1000>;
			phandle = <0x01>;
		};

		mailbox@f900d000 {
			compatible = "qcom,msm8994-apcs-kpss-global", "syscon";
			reg = <0xf900d000 0x2000>;
			#mbox-cells = <0x01>;
			phandle = <0x27>;
		};

		timer@f9020000 {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0xf9020000 0x1000>;

			frame@f9021000 {
				frame-number = <0x00>;
				interrupts = <0x00 0x09 0x04 0x00 0x08 0x04>;
				reg = <0xf9021000 0x1000 0xf9022000 0x1000>;
			};

			frame@f9023000 {
				frame-number = <0x01>;
				interrupts = <0x00 0x0a 0x04>;
				reg = <0xf9023000 0x1000>;
				status = "disabled";
			};

			frame@f9024000 {
				frame-number = <0x02>;
				interrupts = <0x00 0x0b 0x04>;
				reg = <0xf9024000 0x1000>;
				status = "disabled";
			};

			frame@f9025000 {
				frame-number = <0x03>;
				interrupts = <0x00 0x0c 0x04>;
				reg = <0xf9025000 0x1000>;
				status = "disabled";
			};

			frame@f9026000 {
				frame-number = <0x04>;
				interrupts = <0x00 0x0d 0x04>;
				reg = <0xf9026000 0x1000>;
				status = "disabled";
			};

			frame@f9027000 {
				frame-number = <0x05>;
				interrupts = <0x00 0x0e 0x04>;
				reg = <0xf9027000 0x1000>;
				status = "disabled";
			};

			frame@f9028000 {
				frame-number = <0x06>;
				interrupts = <0x00 0x0f 0x04>;
				reg = <0xf9028000 0x1000>;
				status = "disabled";
			};
		};

		sdhci@f9824900 {
			compatible = "qcom,sdhci-msm-v4";
			reg = <0xf9824900 0x1a0 0xf9824000 0x800>;
			reg-names = "hc_mem", "core_mem";
			interrupts = <0x00 0x7b 0x04 0x00 0x8a 0x04>;
			interrupt-names = "hc_irq", "pwr_irq";
			clocks = <0x0e 0x68 0x0e 0x76 0x0f>;
			clock-names = "core", "iface", "xo";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x10 0x11 0x12 0x13>;
			pinctrl-1 = <0x14 0x15 0x16 0x17>;
			regulator-always-on;
			bus-width = <0x08>;
			non-removable;
			status = "okay";
			mmc-hs400-1_8v;
			phandle = <0x2e>;
		};

		serial@f991e000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0xf991e000 0x1000>;
			interrupts = <0x00 0x6c 0x08>;
			clock-names = "core", "iface";
			clocks = <0x0e 0x48 0x0e 0x3a>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x18>;
			pinctrl-1 = <0x19>;
			status = "okay";
			phandle = <0x2f>;
		};

		i2c@f9924000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0xf9924000 0x500>;
			interrupts = <0x00 0x60 0x04>;
			clocks = <0x0e 0x3a 0x0e 0x3d>;
			clock-names = "iface", "core";
			clock-frequency = <0x61a80>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x1a>;
			pinctrl-1 = <0x1b>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x30>;
		};

		i2c@f9927000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0xf9927000 0x500>;
			interrupts = <0x00 0x63 0x04>;
			clocks = <0x0e 0x3a 0x0e 0x43>;
			clock-names = "iface", "core";
			clock-frequency = <0x61a80>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x1c>;
			pinctrl-1 = <0x1d>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x31>;
		};

		i2c@f9928000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0xf9928000 0x500>;
			interrupts = <0x00 0x64 0x04>;
			clocks = <0x0e 0x3a 0x0e 0x45>;
			clock-names = "iface", "core";
			clock-frequency = <0x61a80>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x1e>;
			pinctrl-1 = <0x1f>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x32>;
		};

		serial@f995e000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0xf995e000 0x1000>;
			interrupts = <0x00 0x92 0x08>;
			clock-names = "core", "iface";
			clocks = <0x0e 0x5b 0x0e 0x4d>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x20>;
			pinctrl-1 = <0x21>;
			status = "disabled";
			phandle = <0x33>;
		};

		i2c@f9963000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0xf9963000 0x500>;
			interrupts = <0x00 0x65 0x04>;
			clocks = <0x0e 0x4d 0x0e 0x4e>;
			clock-names = "iface", "core";
			clock-frequency = <0x61a80>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x22>;
			pinctrl-1 = <0x23>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x34>;
		};

		i2c@f9967000 {
			compatible = "qcom,i2c-qup-v2.2.1";
			reg = <0xf9967000 0x500>;
			interrupts = <0x00 0x69 0x04>;
			clocks = <0x0e 0x4d 0x0e 0x56>;
			clock-names = "iface", "core";
			clock-frequency = <0x186a0>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x24>;
			pinctrl-1 = <0x25>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "disabled";
			phandle = <0x35>;
		};

		clock-controller@fc400000 {
			compatible = "qcom,gcc-msm8994";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			#power-domain-cells = <0x01>;
			reg = <0xfc400000 0x2000>;
			phandle = <0x0e>;
		};

		memory@fc428000 {
			compatible = "qcom,rpm-msg-ram";
			reg = <0xfc428000 0x4000>;
			phandle = <0x0c>;
		};

		restart@fc4ab000 {
			compatible = "qcom,pshold";
			reg = <0xfc4ab000 0x04>;
		};

		spmi@fc4c0000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = <0xfc4cf000 0x1000 0xfc4cb000 0x1000 0xfc4ca000 0x1000>;
			reg-names = "core", "intr", "cnfg";
			interrupt-names = "periph_irq";
			interrupts = <0x00 0xbe 0x04>;
			qcom,ee = <0x00>;
			qcom,channel = <0x00>;
			#address-cells = <0x02>;
			#size-cells = <0x00>;
			interrupt-controller;
			#interrupt-cells = <0x04>;
			phandle = <0x36>;
		};

		syscon@fd484000 {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			compatible = "syscon";
			reg = <0xfd484000 0x400>;
			phandle = <0x0a>;
		};

		pinctrl@fd510000 {
			compatible = "qcom,msm8994-pinctrl";
			reg = <0xfd510000 0x4000>;
			interrupts = <0x00 0xd0 0x04>;
			gpio-controller;
			gpio-ranges = <0x26 0x00 0x00 0x92>;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x26>;

			blsp1-uart2-default {
				function = "blsp_uart2";
				pins = "gpio4", "gpio5";
				drive-strength = <0x10>;
				bias-disable;
				phandle = <0x18>;
			};

			blsp1-uart2-sleep {
				function = "gpio";
				pins = "gpio4", "gpio5";
				drive-strength = <0x02>;
				bias-pull-down;
				phandle = <0x19>;
			};

			blsp2-uart2-default {
				function = "blsp_uart8";
				pins = "gpio45", "gpio46", "gpio47", "gpio48";
				drive-strength = <0x10>;
				bias-disable;
				phandle = <0x20>;
			};

			blsp2-uart2-sleep {
				function = "gpio";
				pins = "gpio45", "gpio46", "gpio47", "gpio48";
				drive-strength = <0x02>;
				bias-pull-down;
				phandle = <0x21>;
			};

			clk-on {
				pins = "sdc1_clk";
				bias-disable;
				drive-strength = <0x06>;
				phandle = <0x10>;
			};

			clk-off {
				pins = "sdc1_clk";
				bias-disable;
				drive-strength = <0x02>;
				phandle = <0x14>;
			};

			cmd-on {
				pins = "sdc1_cmd";
				bias-pull-up;
				drive-strength = <0x06>;
				phandle = <0x11>;
			};

			cmd-off {
				pins = "sdc1_cmd";
				bias-pull-up;
				drive-strength = <0x02>;
				phandle = <0x15>;
			};

			data-on {
				pins = "sdc1_data";
				bias-pull-up;
				drive-strength = <0x06>;
				phandle = <0x12>;
			};

			data-off {
				pins = "sdc1_data";
				bias-pull-up;
				drive-strength = <0x02>;
				phandle = <0x16>;
			};

			rclk-on {
				pins = "sdc1_rclk";
				bias-pull-down;
				phandle = <0x13>;
			};

			rclk-off {
				pins = "sdc1_rclk";
				bias-pull-down;
				phandle = <0x17>;
			};

			i2c2-default {
				function = "blsp_i2c2";
				pins = "gpio6", "gpio7";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x1a>;
			};

			i2c2-sleep {
				function = "gpio";
				pins = "gpio6", "gpio7";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x1b>;
			};

			i2c5-default {
				function = "blsp_i2c11";
				pins = "gpio83", "gpio84";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x24>;
			};

			i2c5-sleep {
				function = "gpio";
				pins = "gpio83", "gpio84";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x25>;
			};

			i2c6-default {
				function = "blsp_i2c6";
				pins = "gpio28", "gpio27";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x1e>;
			};

			i2c6-sleep {
				function = "gpio";
				pins = "gpio28", "gpio27";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x1f>;
			};

			i2c7-default {
				function = "blsp_i2c7";
				pins = "gpio43", "gpio44";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x22>;
			};

			i2c7-sleep {
				function = "gpio";
				pins = "gpio43", "gpio44";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x23>;
			};

			i2c13-default {
				function = "blsp_i2c5";
				pins = "gpio23", "gpio24";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x1c>;
			};

			i2c13-sleep {
				function = "gpio";
				pins = "gpio23", "gpio24";
				drive-strength = <0x02>;
				bias-disable;
				phandle = <0x1d>;
			};
		};
	};

	smd {
		compatible = "qcom,smd";
		phandle = <0x37>;

		rpm {
			interrupts = <0x00 0xa8 0x01>;
			qcom,ipc = <0x27 0x08 0x00>;
			qcom,smd-edge = <0x0f>;
			qcom,local-pid = <0x00>;
			qcom,remote-pid = <0x06>;

			rpm-requests {
				compatible = "qcom,rpm-msm8994";
				qcom,smd-channels = "rpm_requests";
				phandle = <0x38>;

				rpmcc {
					compatible = "qcom,rpmcc-msm8992";
					#clock-cells = <0x01>;
					phandle = <0x39>;
				};

				pm8994-regulators {
					compatible = "qcom,rpm-pm8994-regulators";
					vdd_l1-supply = <0x28>;
					vdd_l2_26_28-supply = <0x29>;
					vdd_l3_11-supply = <0x29>;
					vdd_l4_27_31-supply = <0x29>;
					vdd_l5_7-supply = <0x29>;
					vdd_l6_12_32-supply = <0x2a>;
					vdd_l8_16_30-supply = <0x2b>;
					vdd_l9_10_18_22-supply = <0x2b>;
					vdd_l13_19_23_24-supply = <0x2b>;
					vdd_l14_15-supply = <0x2a>;
					vdd_l17_29-supply = <0x2b>;
					vdd_l20_21-supply = <0x2b>;
					vdd_l25-supply = <0x2a>;
					vdd_lvs1_2-supply = <0x2c>;

					s1 {
						regulator-min-microvolt = "", "\f5";
						regulator-max-microvolt = "", "\f5";
						phandle = <0x28>;
					};

					s2 {
						phandle = <0x3a>;
					};

					s3 {
						regulator-min-microvolt = <0x13d620>;
						regulator-max-microvolt = <0x13d620>;
						phandle = <0x29>;
					};

					s4 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						regulator-allow-set-load;
						regulator-system-load = <0x4f588>;
						phandle = <0x2c>;
					};

					s5 {
						regulator-min-microvolt = <0x20ce70>;
						regulator-max-microvolt = <0x20ce70>;
						phandle = <0x2a>;
					};

					s7 {
						regulator-min-microvolt = <0xf4240>;
						regulator-max-microvolt = <0xf4240>;
						phandle = <0x3b>;
					};

					l1 {
						regulator-min-microvolt = <0xf4240>;
						regulator-max-microvolt = <0xf4240>;
						phandle = <0x3c>;
					};

					l2 {
						regulator-min-microvolt = <0x1312d0>;
						regulator-max-microvolt = <0x1312d0>;
						phandle = <0x3d>;
					};

					l3 {
						regulator-min-microvolt = <0x124f80>;
						regulator-max-microvolt = <0x124f80>;
						phandle = <0x3e>;
					};

					l4 {
						regulator-min-microvolt = <0x12b128>;
						regulator-max-microvolt = <0x12b128>;
						phandle = <0x3f>;
					};

					l5 {
						phandle = <0x40>;
					};

					l6 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x41>;
					};

					l7 {
						phandle = <0x42>;
					};

					l8 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x43>;
					};

					l9 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x44>;
					};

					l10 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x45>;
					};

					l11 {
						regulator-min-microvolt = <0x124f80>;
						regulator-max-microvolt = <0x124f80>;
						phandle = <0x46>;
					};

					l12 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x47>;
					};

					l13 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x2d0370>;
						phandle = <0x48>;
					};

					l14 {
						regulator-min-microvolt = <0x124f80>;
						regulator-max-microvolt = <0x124f80>;
						phandle = <0x49>;
					};

					l15 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x4a>;
					};

					l16 {
						regulator-min-microvolt = <0x2932e0>;
						regulator-max-microvolt = <0x2932e0>;
						phandle = <0x4b>;
					};

					l17 {
						regulator-min-microvolt = <0x2932e0>;
						regulator-max-microvolt = <0x2932e0>;
						phandle = <0x4c>;
					};

					l18 {
						regulator-min-microvolt = <0x2dc6c0>;
						regulator-max-microvolt = <0x2dc6c0>;
						phandle = <0x4d>;
					};

					l19 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x4e>;
					};

					l20 {
						regulator-min-microvolt = <0x2d0370>;
						regulator-max-microvolt = <0x2d0370>;
						regulator-always-on;
						regulator-boot-on;
						regulator-allow-set-load;
						regulator-system-load = <0x8b290>;
						phandle = <0x4f>;
					};

					l21 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						regulator-always-on;
						phandle = <0x50>;
					};

					l22 {
						regulator-min-microvolt = <0x2f4d60>;
						regulator-max-microvolt = <0x2f4d60>;
						phandle = <0x51>;
					};

					l23 {
						regulator-min-microvolt = <0x2ab980>;
						regulator-max-microvolt = <0x2ab980>;
						phandle = <0x52>;
					};

					l24 {
						regulator-min-microvolt = <0x2eebb8>;
						regulator-max-microvolt = <0x3010b0>;
						phandle = <0x53>;
					};

					l25 {
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						phandle = <0x54>;
					};

					l26 {
						phandle = <0x55>;
					};

					l27 {
						regulator-min-microvolt = <0x100590>;
						regulator-max-microvolt = <0x100590>;
						phandle = <0x56>;
					};

					l28 {
						regulator-min-microvolt = <0xf4240>;
						regulator-max-microvolt = <0xf4240>;
						phandle = <0x57>;
					};

					l29 {
						phandle = <0x58>;
					};

					l30 {
						phandle = <0x59>;
					};

					l31 {
						regulator-min-microvolt = <0x1343a4>;
						regulator-max-microvolt = <0x1343a4>;
						phandle = <0x5a>;
					};

					l32 {
						phandle = <0x5b>;
					};
				};
			};
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x02 0xf08 0x01 0x03 0xf08 0x01 0x04 0xf08 0x01 0x01 0xf08>;
	};

	vreg-vph-pwr {
		compatible = "regulator-fixed";
		status = "okay";
		regulator-name = "vph-pwr";
		regulator-min-microvolt = <0x36ee80>;
		regulator-max-microvolt = <0x36ee80>;
		regulator-always-on;
		phandle = <0x2b>;
	};

	aliases {
		serial0 = "/soc/serial@f991e000";
	};

	__symbols__ {
		CPU0 = "/cpus/cpu@0";
		L2_0 = "/cpus/cpu@0/l2-cache";
		CPU1 = "/cpus/cpu@1";
		CPU2 = "/cpus/cpu@2";
		CPU3 = "/cpus/cpu@3";
		CPU4 = "/cpus/cpu@100";
		L2_1 = "/cpus/cpu@100/l2-cache";
		CPU5 = "/cpus/cpu@101";
		xo_board = "/clocks/xo_board";
		sleep_clk = "/clocks/sleep_clk";
		smem_region = "/reserved-memory/smem@6a00000";
		sfpb_mutex = "/hwmutex";
		intc = "/soc/interrupt-controller@f9000000";
		apcs = "/soc/mailbox@f900d000";
		sdhc_1 = "/soc/sdhci@f9824900";
		blsp1_uart2 = "/soc/serial@f991e000";
		blsp_i2c2 = "/soc/i2c@f9924000";
		blsp_i2c13 = "/soc/i2c@f9927000";
		blsp_i2c6 = "/soc/i2c@f9928000";
		blsp2_uart2 = "/soc/serial@f995e000";
		blsp_i2c7 = "/soc/i2c@f9963000";
		blsp_i2c5 = "/soc/i2c@f9967000";
		gcc = "/soc/clock-controller@fc400000";
		rpm_msg_ram = "/soc/memory@fc428000";
		spmi_bus = "/soc/spmi@fc4c0000";
		sfpb_mutex_regs = "/soc/syscon@fd484000";
		tlmm = "/soc/pinctrl@fd510000";
		blsp1_uart2_default = "/soc/pinctrl@fd510000/blsp1-uart2-default";
		blsp1_uart2_sleep = "/soc/pinctrl@fd510000/blsp1-uart2-sleep";
		blsp2_uart2_default = "/soc/pinctrl@fd510000/blsp2-uart2-default";
		blsp2_uart2_sleep = "/soc/pinctrl@fd510000/blsp2-uart2-sleep";
		sdc1_clk_on = "/soc/pinctrl@fd510000/clk-on";
		sdc1_clk_off = "/soc/pinctrl@fd510000/clk-off";
		sdc1_cmd_on = "/soc/pinctrl@fd510000/cmd-on";
		sdc1_cmd_off = "/soc/pinctrl@fd510000/cmd-off";
		sdc1_data_on = "/soc/pinctrl@fd510000/data-on";
		sdc1_data_off = "/soc/pinctrl@fd510000/data-off";
		sdc1_rclk_on = "/soc/pinctrl@fd510000/rclk-on";
		sdc1_rclk_off = "/soc/pinctrl@fd510000/rclk-off";
		i2c2_default = "/soc/pinctrl@fd510000/i2c2-default";
		i2c2_sleep = "/soc/pinctrl@fd510000/i2c2-sleep";
		i2c5_default = "/soc/pinctrl@fd510000/i2c5-default";
		i2c5_sleep = "/soc/pinctrl@fd510000/i2c5-sleep";
		i2c6_default = "/soc/pinctrl@fd510000/i2c6-default";
		i2c6_sleep = "/soc/pinctrl@fd510000/i2c6-sleep";
		i2c7_default = "/soc/pinctrl@fd510000/i2c7-default";
		i2c7_sleep = "/soc/pinctrl@fd510000/i2c7-sleep";
		i2c13_default = "/soc/pinctrl@fd510000/i2c13-default";
		i2c13_sleep = "/soc/pinctrl@fd510000/i2c13-sleep";
		smd_rpm = "/smd";
		rpm_requests = "/smd/rpm/rpm-requests";
		rpmcc = "/smd/rpm/rpm-requests/rpmcc";
		pm8994_s1 = "/smd/rpm/rpm-requests/pm8994-regulators/s1";
		pm8994_s2 = "/smd/rpm/rpm-requests/pm8994-regulators/s2";
		pm8994_s3 = "/smd/rpm/rpm-requests/pm8994-regulators/s3";
		pm8994_s4 = "/smd/rpm/rpm-requests/pm8994-regulators/s4";
		pm8994_s5 = "/smd/rpm/rpm-requests/pm8994-regulators/s5";
		pm8994_s7 = "/smd/rpm/rpm-requests/pm8994-regulators/s7";
		pm8994_l1 = "/smd/rpm/rpm-requests/pm8994-regulators/l1";
		pm8994_l2 = "/smd/rpm/rpm-requests/pm8994-regulators/l2";
		pm8994_l3 = "/smd/rpm/rpm-requests/pm8994-regulators/l3";
		pm8994_l4 = "/smd/rpm/rpm-requests/pm8994-regulators/l4";
		pm8994_l5 = "/smd/rpm/rpm-requests/pm8994-regulators/l5";
		pm8994_l6 = "/smd/rpm/rpm-requests/pm8994-regulators/l6";
		pm8994_l7 = "/smd/rpm/rpm-requests/pm8994-regulators/l7";
		pm8994_l8 = "/smd/rpm/rpm-requests/pm8994-regulators/l8";
		pm8994_l9 = "/smd/rpm/rpm-requests/pm8994-regulators/l9";
		pm8994_l10 = "/smd/rpm/rpm-requests/pm8994-regulators/l10";
		pm8994_l11 = "/smd/rpm/rpm-requests/pm8994-regulators/l11";
		pm8994_l12 = "/smd/rpm/rpm-requests/pm8994-regulators/l12";
		pm8994_l13 = "/smd/rpm/rpm-requests/pm8994-regulators/l13";
		pm8994_l14 = "/smd/rpm/rpm-requests/pm8994-regulators/l14";
		pm8994_l15 = "/smd/rpm/rpm-requests/pm8994-regulators/l15";
		pm8994_l16 = "/smd/rpm/rpm-requests/pm8994-regulators/l16";
		pm8994_l17 = "/smd/rpm/rpm-requests/pm8994-regulators/l17";
		pm8994_l18 = "/smd/rpm/rpm-requests/pm8994-regulators/l18";
		pm8994_l19 = "/smd/rpm/rpm-requests/pm8994-regulators/l19";
		pm8994_l20 = "/smd/rpm/rpm-requests/pm8994-regulators/l20";
		pm8994_l21 = "/smd/rpm/rpm-requests/pm8994-regulators/l21";
		pm8994_l22 = "/smd/rpm/rpm-requests/pm8994-regulators/l22";
		pm8994_l23 = "/smd/rpm/rpm-requests/pm8994-regulators/l23";
		pm8994_l24 = "/smd/rpm/rpm-requests/pm8994-regulators/l24";
		pm8994_l25 = "/smd/rpm/rpm-requests/pm8994-regulators/l25";
		pm8994_l26 = "/smd/rpm/rpm-requests/pm8994-regulators/l26";
		pm8994_l27 = "/smd/rpm/rpm-requests/pm8994-regulators/l27";
		pm8994_l28 = "/smd/rpm/rpm-requests/pm8994-regulators/l28";
		pm8994_l29 = "/smd/rpm/rpm-requests/pm8994-regulators/l29";
		pm8994_l30 = "/smd/rpm/rpm-requests/pm8994-regulators/l30";
		pm8994_l31 = "/smd/rpm/rpm-requests/pm8994-regulators/l31";
		pm8994_l32 = "/smd/rpm/rpm-requests/pm8994-regulators/l32";
		vreg_vph_pwr = "/vreg-vph-pwr";
	};
};