/dts-v1/; / { interrupt-parent = <0x01>; #address-cells = <0x02>; #size-cells = <0x02>; model = "Qualcomm Technologies, Inc. APQ 8016 SBC"; compatible = "qcom,apq8016-sbc", "qcom,apq8016", "qcom,sbc"; aliases { mmc0 = "/soc/sdhci@7824000"; mmc1 = "/soc/sdhci@7864000"; serial0 = "/soc/serial@78b0000"; serial1 = "/soc/serial@78af000"; usid0 = "/soc/spmi@200f000/pmic@0"; i2c0 = "/soc/i2c@78b6000"; i2c1 = "/soc/i2c@78ba000"; i2c3 = "/soc/i2c@78b8000"; spi0 = "/soc/spi@78b9000"; spi1 = "/soc/spi@78b7000"; }; chosen { stdout-path = "serial0"; }; memory { device_type = "memory"; reg = <0x00 0x00 0x00 0x00>; }; reserved-memory { #address-cells = <0x02>; #size-cells = <0x02>; ranges; tz-apps@86000000 { reg = <0x00 0x86000000 0x00 0x300000>; no-map; }; smem_region@86300000 { reg = <0x00 0x86300000 0x00 0x100000>; no-map; phandle = <0x11>; }; hypervisor@86400000 { reg = <0x00 0x86400000 0x00 0x100000>; no-map; }; tz@86500000 { reg = <0x00 0x86500000 0x00 0x180000>; no-map; }; reserved@86680000 { reg = <0x00 0x86680000 0x00 0x80000>; no-map; }; rmtfs@86700000 { compatible = "qcom,rmtfs-mem"; reg = <0x00 0x86700000 0x00 0xe0000>; no-map; qcom,client-id = <0x01>; }; rfsa@867e0000 { reg = <0x00 0x867e0000 0x00 0x20000>; no-map; }; mpss@86800000 { reg = <0x00 0x86800000 0x00 0x2b00000>; no-map; phandle = <0x51>; }; wcnss@89300000 { reg = <0x00 0x89300000 0x00 0x600000>; no-map; phandle = <0x96>; }; venus@89900000 { reg = <0x00 0x89900000 0x00 0x600000>; no-map; phandle = <0x44>; }; mba@8ea00000 { no-map; reg = <0x00 0x8ea00000 0x00 0x100000>; phandle = <0x50>; }; ramoops@bff00000 { compatible = "ramoops"; reg = <0x00 0xbff00000 0x00 0x100000>; record-size = <0x20000>; console-size = <0x20000>; ftrace-size = <0x20000>; }; }; clocks { xo-board { compatible = "fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x124f800>; phandle = <0x3a>; }; sleep-clk { compatible = "fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x8000>; phandle = <0xa9>; }; }; cpus { #address-cells = <0x01>; #size-cells = <0x00>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x00>; next-level-cache = <0x02>; enable-method = "psci"; clocks = <0x03>; operating-points-v2 = <0x04>; #cooling-cells = <0x02>; power-domains = <0x05>; power-domain-names = "psci"; phandle = <0x25>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x01>; next-level-cache = <0x02>; enable-method = "psci"; clocks = <0x03>; operating-points-v2 = <0x04>; #cooling-cells = <0x02>; power-domains = <0x06>; power-domain-names = "psci"; phandle = <0x26>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x02>; next-level-cache = <0x02>; enable-method = "psci"; clocks = <0x03>; operating-points-v2 = <0x04>; #cooling-cells = <0x02>; power-domains = <0x07>; power-domain-names = "psci"; phandle = <0x27>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x03>; next-level-cache = <0x02>; enable-method = "psci"; clocks = <0x03>; operating-points-v2 = <0x04>; #cooling-cells = <0x02>; power-domains = <0x08>; power-domain-names = "psci"; phandle = <0x28>; }; l2-cache { compatible = "cache"; cache-level = <0x02>; phandle = <0x02>; }; idle-states { entry-method = "psci"; cpu-sleep-0 { compatible = "arm,idle-state"; idle-state-name = "standalone-power-collapse"; arm,psci-suspend-param = <0x40000002>; entry-latency-us = <0x82>; exit-latency-us = <0x96>; min-residency-us = <0x7d0>; local-timer-stop; phandle = <0x0c>; }; }; domain-idle-states { cluster-retention { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x41000012>; entry-latency-us = <0x1f4>; exit-latency-us = <0x1f4>; min-residency-us = <0x7d0>; phandle = <0x0d>; }; cluster-gdhs { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x41000032>; entry-latency-us = <0x7d0>; exit-latency-us = <0x7d0>; min-residency-us = <0x1770>; phandle = <0x0e>; }; }; }; cpu-opp-table { compatible = "operating-points-v2"; opp-shared; phandle = <0x04>; opp-200000000 { opp-hz = <0x00 0xbebc200>; }; opp-400000000 { opp-hz = <0x00 0x17d78400>; }; opp-800000000 { opp-hz = <0x00 0x2faf0800>; }; opp-998400000 { opp-hz = <0x00 0x3b826000>; }; }; firmware { scm { compatible = "qcom,scm-msm8916", "qcom,scm"; clocks = <0x09 0x68 0x09 0x67 0x09 0x66>; clock-names = "core", "bus", "iface"; #reset-cells = <0x01>; qcom,dload-mode = <0x0a 0x6100>; phandle = <0x4c>; }; }; pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <0x01 0x07 0xf04>; }; psci { compatible = "arm,psci-1.0"; method = "smc"; power-domain-cpu0 { #power-domain-cells = <0x00>; power-domains = <0x0b>; domain-idle-states = <0x0c>; phandle = <0x05>; }; power-domain-cpu1 { #power-domain-cells = <0x00>; power-domains = <0x0b>; domain-idle-states = <0x0c>; phandle = <0x06>; }; power-domain-cpu2 { #power-domain-cells = <0x00>; power-domains = <0x0b>; domain-idle-states = <0x0c>; phandle = <0x07>; }; power-domain-cpu3 { #power-domain-cells = <0x00>; power-domains = <0x0b>; domain-idle-states = <0x0c>; phandle = <0x08>; }; power-domain-cluster { #power-domain-cells = <0x00>; domain-idle-states = <0x0d 0x0e>; phandle = <0x0b>; }; }; smd { compatible = "qcom,smd"; rpm { interrupts = <0x00 0xa8 0x01>; qcom,ipc = <0x03 0x08 0x00>; qcom,smd-edge = <0x0f>; rpm-requests { compatible = "qcom,rpm-msm8916"; qcom,smd-channels = "rpm_requests"; phandle = <0xaa>; clock-controller { compatible = "qcom,rpmcc-msm8916"; #clock-cells = <0x01>; phandle = <0x14>; }; pm8916-regulators { compatible = "qcom,rpm-pm8916-regulators"; vdd_l1_l2_l3-supply = <0x0f>; vdd_l4_l5_l6-supply = <0x10>; vdd_l7-supply = <0x10>; phandle = <0xab>; s1 { regulator-min-microvolt = <0x5b8d8>; regulator-max-microvolt = <0x17d590>; phandle = <0x4d>; }; s3 { regulator-min-microvolt = <0x5b8d8>; regulator-max-microvolt = <0x17d590>; phandle = <0x0f>; }; s4 { regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-always-on; regulator-boot-on; phandle = <0x10>; }; l1 { regulator-min-microvolt = <0x5b8d8>; regulator-max-microvolt = <0x174508>; phandle = <0xac>; }; l2 { regulator-min-microvolt = <0x124f80>; regulator-max-microvolt = <0x124f80>; phandle = <0x36>; }; l3 { regulator-min-microvolt = <0x5b8d8>; regulator-max-microvolt = <0x174508>; phandle = <0x4e>; }; l4 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0xad>; }; l5 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0x48>; }; l6 { regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; phandle = <0x37>; }; l7 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0x4f>; }; l8 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0x5c>; }; l9 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0x9a>; }; l10 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0xae>; }; l11 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; regulator-allow-set-load; regulator-system-load = <0x30d40>; phandle = <0x63>; }; l12 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0x64>; }; l13 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0x49>; }; l14 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0xaf>; }; l15 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; regulator-always-on; phandle = <0xb0>; }; l16 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0xb1>; }; l17 { regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; phandle = <0x7e>; }; l18 { regulator-min-microvolt = <0x1ab3f0>; regulator-max-microvolt = <0x32eb28>; phandle = <0xb2>; }; }; }; }; }; smem { compatible = "qcom,smem"; memory-region = <0x11>; qcom,rpm-msg-ram = <0x12>; hwlocks = <0x13 0x03>; }; smp2p-hexagon { compatible = "qcom,smp2p"; qcom,smem = <0x1b3 0x1ac>; interrupts = <0x00 0x1b 0x01>; qcom,ipc = <0x03 0x08 0x0e>; qcom,local-pid = <0x00>; qcom,remote-pid = <0x01>; master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <0x01>; phandle = <0x4b>; }; slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x4a>; }; }; smp2p-wcnss { compatible = "qcom,smp2p"; qcom,smem = <0x1c3 0x1af>; interrupts = <0x00 0x8f 0x01>; qcom,ipc = <0x03 0x08 0x12>; qcom,local-pid = <0x00>; qcom,remote-pid = <0x04>; master-kernel { qcom,entry-name = "master-kernel"; #qcom,smem-state-cells = <0x01>; phandle = <0x98>; }; slave-kernel { qcom,entry-name = "slave-kernel"; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0x97>; }; }; smsm { compatible = "qcom,smsm"; #address-cells = <0x01>; #size-cells = <0x00>; qcom,ipc-1 = <0x03 0x08 0x0d>; qcom,ipc-3 = <0x03 0x08 0x13>; apps@0 { reg = <0x00>; #qcom,smem-state-cells = <0x01>; phandle = <0x9c>; }; hexagon@1 { reg = <0x01>; interrupts = <0x00 0x1a 0x01>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0xb3>; }; wcnss@6 { reg = <0x06>; interrupts = <0x00 0x90 0x01>; interrupt-controller; #interrupt-cells = <0x02>; phandle = <0xb4>; }; }; soc { #address-cells = <0x01>; #size-cells = <0x01>; ranges = <0x00 0x00 0x00 0xffffffff>; compatible = "simple-bus"; phandle = <0xb5>; rng@22000 { compatible = "qcom,prng"; reg = <0x22000 0x200>; clocks = <0x09 0x79>; clock-names = "core"; }; restart@4ab000 { compatible = "qcom,pshold"; reg = <0x4ab000 0x04>; }; qfprom@5c000 { compatible = "qcom,qfprom"; reg = <0x5c000 0x1000>; #address-cells = <0x01>; #size-cells = <0x01>; phandle = <0xb6>; caldata@d0 { reg = <0xd0 0x08>; phandle = <0x15>; }; calsel@ec { reg = <0xec 0x04>; phandle = <0x16>; }; }; memory@60000 { compatible = "qcom,rpm-msg-ram"; reg = <0x60000 0x8000>; phandle = <0x12>; }; interconnect@400000 { compatible = "qcom,msm8916-bimc"; reg = <0x400000 0x62000>; #interconnect-cells = <0x01>; clock-names = "bus", "bus_a"; clocks = <0x14 0x06 0x14 0x07>; phandle = <0xb7>; }; thermal-sensor@4a9000 { compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; reg = <0x4a9000 0x1000 0x4a8000 0x1000>; nvmem-cells = <0x15 0x16>; nvmem-cell-names = "calib", "calib_sel"; #qcom,sensors = <0x05>; interrupts = <0x00 0xb8 0x04>; interrupt-names = "uplow"; #thermal-sensor-cells = <0x01>; phandle = <0x9e>; }; interconnect@500000 { compatible = "qcom,msm8916-pcnoc"; reg = <0x500000 0x11000>; #interconnect-cells = <0x01>; clock-names = "bus", "bus_a"; clocks = <0x14 0x02 0x14 0x03>; phandle = <0xb8>; }; interconnect@580000 { compatible = "qcom,msm8916-snoc"; reg = <0x580000 0x14000>; #interconnect-cells = <0x01>; clock-names = "bus", "bus_a"; clocks = <0x14 0x04 0x14 0x05>; phandle = <0xb9>; }; cti@810000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x810000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; status = "okay"; phandle = <0xba>; }; cti@811000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x811000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; status = "okay"; phandle = <0xbb>; }; tpiu@820000 { compatible = "arm,coresight-tpiu", "arm,primecell"; reg = <0x820000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; status = "okay"; phandle = <0xbc>; in-ports { port { endpoint { remote-endpoint = <0x17>; phandle = <0x1b>; }; }; }; }; funnel@821000 { compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; reg = <0x821000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; status = "okay"; phandle = <0xbd>; in-ports { #address-cells = <0x01>; #size-cells = <0x00>; port@4 { reg = <0x04>; endpoint { remote-endpoint = <0x18>; phandle = <0x24>; }; }; }; out-ports { port { endpoint { remote-endpoint = <0x19>; phandle = <0x1d>; }; }; }; }; replicator@824000 { compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; reg = <0x824000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; status = "okay"; phandle = <0xbe>; out-ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x1a>; phandle = <0x1f>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x1b>; phandle = <0x17>; }; }; }; in-ports { port { endpoint { remote-endpoint = <0x1c>; phandle = <0x1e>; }; }; }; }; etf@825000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x825000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; status = "okay"; phandle = <0xbf>; in-ports { port { endpoint { remote-endpoint = <0x1d>; phandle = <0x19>; }; }; }; out-ports { port { endpoint { remote-endpoint = <0x1e>; phandle = <0x1c>; }; }; }; }; etr@826000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x826000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; status = "okay"; phandle = <0xc0>; in-ports { port { endpoint { remote-endpoint = <0x1f>; phandle = <0x1a>; }; }; }; }; funnel@841000 { compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; reg = <0x841000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; status = "okay"; phandle = <0xc1>; in-ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x20>; phandle = <0x2d>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x21>; phandle = <0x2e>; }; }; port@2 { reg = <0x02>; endpoint { remote-endpoint = <0x22>; phandle = <0x2f>; }; }; port@3 { reg = <0x03>; endpoint { remote-endpoint = <0x23>; phandle = <0x30>; }; }; }; out-ports { port { endpoint { remote-endpoint = <0x24>; phandle = <0x18>; }; }; }; }; debug@850000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x850000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x25>; status = "okay"; phandle = <0xc2>; }; debug@852000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x852000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x26>; status = "okay"; phandle = <0xc3>; }; debug@854000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x854000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x27>; status = "okay"; phandle = <0xc4>; }; debug@856000 { compatible = "arm,coresight-cpu-debug", "arm,primecell"; reg = <0x856000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x28>; status = "okay"; phandle = <0xc5>; }; cti@858000 { compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell"; reg = <0x858000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x25>; arm,cs-dev-assoc = <0x29>; status = "okay"; phandle = <0xc6>; }; cti@859000 { compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell"; reg = <0x859000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x26>; arm,cs-dev-assoc = <0x2a>; status = "okay"; phandle = <0xc7>; }; cti@85a000 { compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell"; reg = <0x85a000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x27>; arm,cs-dev-assoc = <0x2b>; status = "okay"; phandle = <0xc8>; }; cti@85b000 { compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell"; reg = <0x85b000 0x1000>; clocks = <0x14 0x08>; clock-names = "apb_pclk"; cpu = <0x28>; arm,cs-dev-assoc = <0x2c>; status = "okay"; phandle = <0xc9>; }; etm@85c000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85c000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; arm,coresight-loses-context-with-cpu; cpu = <0x25>; status = "okay"; phandle = <0x29>; out-ports { port { endpoint { remote-endpoint = <0x2d>; phandle = <0x20>; }; }; }; }; etm@85d000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85d000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; arm,coresight-loses-context-with-cpu; cpu = <0x26>; status = "okay"; phandle = <0x2a>; out-ports { port { endpoint { remote-endpoint = <0x2e>; phandle = <0x21>; }; }; }; }; etm@85e000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85e000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; arm,coresight-loses-context-with-cpu; cpu = <0x27>; status = "okay"; phandle = <0x2b>; out-ports { port { endpoint { remote-endpoint = <0x2f>; phandle = <0x22>; }; }; }; }; etm@85f000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85f000 0x1000>; clocks = <0x14 0x08 0x14 0x09>; clock-names = "apb_pclk", "atclk"; arm,coresight-loses-context-with-cpu; cpu = <0x28>; status = "okay"; phandle = <0x2c>; out-ports { port { endpoint { remote-endpoint = <0x30>; phandle = <0x23>; }; }; }; }; pinctrl@1000000 { compatible = "qcom,msm8916-pinctrl"; reg = <0x1000000 0x300000>; interrupts = <0x00 0xd0 0x04>; gpio-controller; gpio-ranges = <0x31 0x00 0x00 0x7a>; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-line-names = "[UART0_TX]", "[UART0_RX]", "[UART0_CTS_N]", "[UART0_RTS_N]", "[UART1_TX]", "[UART1_RX]", "[I2C0_SDA]", "[I2C0_SCL]", "[SPI1_DOUT]", "[SPI1_DIN]", "[SPI1_CS]", "[SPI1_SCLK]", "GPIO-B", "GPIO-C", "[I2C3_SDA]", "[I2C3_SCL]", "[SPI0_MOSI]", "[SPI0_MISO]", "[SPI0_CS_N]", "[SPI0_CLK]", "HDMI_HPD_N", "USR_LED_1_CTRL", "[I2C1_SDA]", "[I2C1_SCL]", "GPIO-G", "GPIO-H", "[CSI0_MCLK]", "[CSI1_MCLK]", "GPIO-K", "[I2C2_SDA]", "[I2C2_SCL]", "DSI2HDMI_INT_N", "DSI_SW_SEL_APQ", "GPIO-L", "GPIO-J", "GPIO-I", "GPIO-A", "FORCED_USB_BOOT", "SD_CARD_DET_N", "[WCSS_BT_SSBI]", "[WCSS_WLAN_DATA_2]", "[WCSS_WLAN_DATA_1]", "[WCSS_WLAN_DATA_0]", "[WCSS_WLAN_SET]", "[WCSS_WLAN_CLK]", "[WCSS_FM_SSBI]", "[WCSS_FM_SDI]", "[WCSS_BT_DAT_CTL]", "[WCSS_BT_DAT_STB]", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "[CDC_PDM0_CLK]", "[CDC_PDM0_SYNC]", "[CDC_PDM0_TX0]", "[CDC_PDM0_RX0]", "[CDC_PDM0_RX1]", "[CDC_PDM0_RX2]", "GPIO-D", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "BOOT_CONFIG_0", "BOOT_CONFIG_1", "BOOT_CONFIG_2", "BOOT_CONFIG_3", "NC", "NC", "BOOT_CONFIG_5", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC", "SSBI_GPS", "NC", "NC", "KEY_VOLP_N", "NC", "NC", "[LS_EXP_MI2S_WS]", "NC", "NC", "[LS_EXP_MI2S_SCK]", "[LS_EXP_MI2S_DATA0]", "GPIO-E", "NC", "[DSI2HDMI_MI2S_WS]", "[DSI2HDMI_MI2S_SCK]", "[DSI2HDMI_MI2S_DATA0]", "USR_LED_2_CTRL", "SB_HS_ID"; phandle = <0x31>; blsp1-uart1-default { pins = "gpio0", "gpio1", "gpio2", "gpio3"; function = "blsp_uart1"; drive-strength = <0x10>; bias-disable; phandle = <0x6e>; }; blsp1-uart1-sleep { pins = "gpio0", "gpio1", "gpio2", "gpio3"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x6f>; }; blsp1-uart2-default { pins = "gpio4", "gpio5"; function = "blsp_uart2"; drive-strength = <0x10>; bias-disable; phandle = <0x70>; }; blsp1-uart2-sleep { pins = "gpio4", "gpio5"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x71>; }; spi1-default { pins = "gpio0", "gpio1", "gpio3"; function = "blsp_spi1"; drive-strength = <0x0c>; bias-disable; phandle = <0x74>; cs { pins = "gpio2"; function = "gpio"; drive-strength = <0x10>; bias-disable; output-high; }; }; spi1-sleep { pins = "gpio0", "gpio1", "gpio2", "gpio3"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x75>; }; spi2-default { pins = "gpio4", "gpio5", "gpio7"; function = "blsp_spi2"; drive-strength = <0x0c>; bias-disable; phandle = <0x78>; cs { pins = "gpio6"; function = "gpio"; drive-strength = <0x10>; bias-disable; output-high; }; }; spi2-sleep { pins = "gpio4", "gpio5", "gpio6", "gpio7"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x79>; }; spi3-default { pins = "gpio8", "gpio9", "gpio11"; function = "blsp_spi3"; drive-strength = <0x0c>; bias-disable; phandle = <0x7a>; cs { pins = "gpio10"; function = "gpio"; drive-strength = <0x10>; bias-disable; output-high; }; }; spi3-sleep { pins = "gpio8", "gpio9", "gpio10", "gpio11"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x7b>; }; spi4-default { pins = "gpio12", "gpio13", "gpio15"; function = "blsp_spi4"; drive-strength = <0x0c>; bias-disable; phandle = <0x85>; cs { pins = "gpio14"; function = "gpio"; drive-strength = <0x10>; bias-disable; output-high; }; }; spi4-sleep { pins = "gpio12", "gpio13", "gpio14", "gpio15"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x86>; }; spi5-default { pins = "gpio16", "gpio17", "gpio19"; function = "blsp_spi5"; drive-strength = <0x0c>; bias-disable; phandle = <0x89>; cs { pins = "gpio18"; function = "gpio"; drive-strength = <0x10>; bias-disable; output-high; }; }; spi5-sleep { pins = "gpio16", "gpio17", "gpio18", "gpio19"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x8a>; }; spi6-default { pins = "gpio20", "gpio21", "gpio23"; function = "blsp_spi6"; drive-strength = <0x0c>; bias-disable; phandle = <0x8d>; cs { pins = "gpio22"; function = "gpio"; drive-strength = <0x10>; bias-disable; output-high; }; }; spi6-sleep { pins = "gpio20", "gpio21", "gpio22", "gpio23"; function = "gpio"; drive-strength = <0x02>; bias-pull-down; phandle = <0x8e>; }; i2c1-default { pins = "gpio2", "gpio3"; function = "blsp_i2c1"; drive-strength = <0x02>; bias-disable; phandle = <0x72>; }; i2c1-sleep { pins = "gpio2", "gpio3"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x73>; }; i2c2-default { pins = "gpio6", "gpio7"; function = "blsp_i2c2"; drive-strength = <0x10>; bias-disable; phandle = <0x76>; }; i2c2-sleep { pins = "gpio6", "gpio7"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x77>; }; i2c4-default { pins = "gpio14", "gpio15"; function = "blsp_i2c4"; drive-strength = <0x10>; bias-disable; phandle = <0x7c>; }; i2c4-sleep { pins = "gpio14", "gpio15"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x7d>; }; i2c5-default { pins = "gpio18", "gpio19"; function = "blsp_i2c5"; drive-strength = <0x02>; bias-disable; phandle = <0x87>; }; i2c5-sleep { pins = "gpio18", "gpio19"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x88>; }; i2c6-default { pins = "gpio22", "gpio23"; function = "blsp_i2c6"; drive-strength = <0x10>; bias-disable; phandle = <0x8b>; }; i2c6-sleep { pins = "gpio22", "gpio23"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x8c>; }; pmx-sdc1-clk { clk-on { pins = "sdc1_clk"; bias-disable; drive-strength = <0x10>; phandle = <0x5d>; }; clk-off { pins = "sdc1_clk"; bias-disable; drive-strength = <0x02>; phandle = <0x60>; }; }; pmx-sdc1-cmd { cmd-on { pins = "sdc1_cmd"; bias-pull-up; drive-strength = <0x0a>; phandle = <0x5e>; }; cmd-off { pins = "sdc1_cmd"; bias-pull-up; drive-strength = <0x02>; phandle = <0x61>; }; }; pmx-sdc1-data { data-on { pins = "sdc1_data"; bias-pull-up; drive-strength = <0x0a>; phandle = <0x5f>; }; data-off { pins = "sdc1_data"; bias-pull-up; drive-strength = <0x02>; phandle = <0x62>; }; }; pmx-sdc2-clk { clk-on { pins = "sdc2_clk"; bias-disable; drive-strength = <0x10>; phandle = <0x65>; }; clk-off { pins = "sdc2_clk"; bias-disable; drive-strength = <0x02>; phandle = <0x69>; }; }; pmx-sdc2-cmd { cmd-on { pins = "sdc2_cmd"; bias-pull-up; drive-strength = <0x0a>; phandle = <0x66>; }; cmd-off { pins = "sdc2_cmd"; bias-pull-up; drive-strength = <0x02>; phandle = <0x6a>; }; }; pmx-sdc2-data { data-on { pins = "sdc2_data"; bias-pull-up; drive-strength = <0x0a>; phandle = <0x67>; }; data-off { pins = "sdc2_data"; bias-pull-up; drive-strength = <0x02>; phandle = <0x6b>; }; }; pmx-sdc2-cd-pin { cd-on { pins = "gpio38"; function = "gpio"; drive-strength = <0x02>; bias-pull-up; phandle = <0x68>; }; cd-off { pins = "gpio38"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x6c>; }; }; cdc-pdm-lines { pdm-lines-on { pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; function = "cdc_pdm0"; drive-strength = <0x08>; bias-disable; phandle = <0x52>; }; pdm-lines-off { pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; function = "cdc_pdm0"; drive-strength = <0x02>; bias-pull-down; phandle = <0x55>; }; }; ext-pri-tlmm-lines { ext-pa-on { pins = "gpio113", "gpio114", "gpio115", "gpio116"; function = "pri_mi2s"; drive-strength = <0x08>; bias-disable; phandle = <0xca>; }; ext-pa-off { pins = "gpio113", "gpio114", "gpio115", "gpio116"; function = "pri_mi2s"; drive-strength = <0x02>; bias-disable; phandle = <0xcb>; }; }; ext-pri-ws-line { ext-pa-on { pins = "gpio110"; function = "pri_mi2s_ws"; drive-strength = <0x08>; bias-disable; phandle = <0xcc>; }; ext-pa-off { pins = "gpio110"; function = "pri_mi2s_ws"; drive-strength = <0x02>; bias-disable; phandle = <0xcd>; }; }; ext-mclk-tlmm-lines { mclk-lines-on { pins = "gpio116"; function = "pri_mi2s"; drive-strength = <0x08>; bias-disable; phandle = <0x54>; }; mclk-lines-off { pins = "gpio116"; function = "pri_mi2s"; drive-strength = <0x02>; bias-disable; phandle = <0x57>; }; }; ext-sec-tlmm-lines { tlmm-lines-on { pins = "gpio112", "gpio117", "gpio118", "gpio119"; function = "sec_mi2s"; drive-strength = <0x08>; bias-disable; phandle = <0x53>; }; tlmm-lines-off { pins = "gpio112", "gpio117", "gpio118", "gpio119"; function = "sec_mi2s"; drive-strength = <0x02>; bias-disable; phandle = <0x56>; }; }; cdc-dmic-lines { dmic-lines-on { phandle = <0xce>; clk { pins = "gpio0"; function = "dmic0_clk"; drive-strength = <0x08>; }; data { pins = "gpio1"; function = "dmic0_data"; drive-strength = <0x08>; }; }; dmic-lines-off { phandle = <0xcf>; clk { pins = "gpio0"; function = "dmic0_clk"; drive-strength = <0x02>; bias-disable; }; data { pins = "gpio1"; function = "dmic0_data"; drive-strength = <0x02>; bias-disable; }; }; }; wcnss-active { pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44"; function = "wcss_wlan"; drive-strength = <0x06>; bias-pull-up; phandle = <0x99>; }; cci0-default { pins = "gpio29", "gpio30"; function = "cci_i2c"; drive-strength = <0x10>; bias-disable; phandle = <0x3c>; }; camera-front-default { phandle = <0xd0>; pwdn { pins = "gpio33"; function = "gpio"; drive-strength = <0x10>; bias-disable; }; rst { pins = "gpio28"; function = "gpio"; drive-strength = <0x10>; bias-disable; }; mclk1 { pins = "gpio27"; function = "cam_mclk1"; drive-strength = <0x10>; bias-disable; }; }; camera-rear-default { phandle = <0x3d>; pwdn { pins = "gpio34"; function = "gpio"; drive-strength = <0x10>; bias-disable; }; rst { pins = "gpio35"; function = "gpio"; drive-strength = <0x10>; bias-disable; }; mclk0 { pins = "gpio26"; function = "cam_mclk0"; drive-strength = <0x10>; bias-disable; }; }; msmgpio-leds { pins = "gpio21", "gpio120"; function = "gpio"; output-low; phandle = <0xa5>; }; usb-id-default { pins = "gpio121"; function = "gpio"; drive-strength = <0x08>; input-enable; bias-pull-up; phandle = <0xa2>; }; adv533-int-active { pins = "gpio31"; function = "gpio"; drive-strength = <0x10>; bias-disable; phandle = <0x7f>; }; adv7533-int-suspend { pins = "gpio31"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x81>; }; adv7533-switch-active { pins = "gpio32"; function = "gpio"; drive-strength = <0x10>; bias-disable; phandle = <0x80>; }; adv7533-switch-suspend { pins = "gpio32"; function = "gpio"; drive-strength = <0x02>; bias-disable; phandle = <0x82>; }; msm-key-volp-n-default { pins = "gpio107"; function = "gpio"; drive-strength = <0x08>; input-enable; bias-pull-up; phandle = <0xa4>; }; }; clock-controller@1800000 { compatible = "qcom,gcc-msm8916"; #clock-cells = <0x01>; #reset-cells = <0x01>; #power-domain-cells = <0x01>; reg = <0x1800000 0x80000>; phandle = <0x09>; }; hwlock@1905000 { compatible = "qcom,tcsr-mutex"; reg = <0x1905000 0x20000>; #hwlock-cells = <0x01>; phandle = <0x13>; }; syscon@1937000 { compatible = "qcom,tcsr-msm8916", "syscon"; reg = <0x1937000 0x30000>; phandle = <0x0a>; }; mdss@1a00000 { compatible = "qcom,mdss"; reg = <0x1a00000 0x1000 0x1ac8000 0x3000>; reg-names = "mdss_phys", "vbif_phys"; power-domains = <0x09 0x02>; clocks = <0x09 0x6d 0x09 0x6e 0x09 0x73>; clock-names = "iface", "bus", "vsync"; interrupts = <0x00 0x48 0x04>; interrupt-controller; #interrupt-cells = <0x01>; #address-cells = <0x01>; #size-cells = <0x01>; ranges; phandle = <0x32>; mdp@1a01000 { compatible = "qcom,mdp5"; reg = <0x1a01000 0x89000>; reg-names = "mdp_phys"; interrupt-parent = <0x32>; interrupts = <0x00>; clocks = <0x09 0x6d 0x09 0x6e 0x09 0x71 0x09 0x73>; clock-names = "iface", "bus", "core", "vsync"; iommus = <0x33 0x04>; phandle = <0xd1>; ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x34>; phandle = <0x38>; }; }; }; }; dsi@1a98000 { compatible = "qcom,mdss-dsi-ctrl"; reg = <0x1a98000 0x25c>; reg-names = "dsi_ctrl"; interrupt-parent = <0x32>; interrupts = <0x04>; assigned-clocks = <0x09 0x2b 0x09 0x2e>; assigned-clock-parents = <0x35 0x00 0x35 0x01>; clocks = <0x09 0x71 0x09 0x6d 0x09 0x6e 0x09 0x6f 0x09 0x72 0x09 0x70>; clock-names = "mdp_core", "iface", "bus", "byte", "pixel", "core"; phys = <0x35>; phy-names = "dsi-phy"; #address-cells = <0x01>; #size-cells = <0x00>; vdda-supply = <0x36>; vddio-supply = <0x37>; phandle = <0xd2>; ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x38>; phandle = <0x34>; }; }; port@1 { reg = <0x01>; endpoint { data-lanes = <0x00 0x01 0x02 0x03>; remote-endpoint = <0x39>; phandle = <0x83>; }; }; }; }; dsi-phy@1a98300 { compatible = "qcom,dsi-phy-28nm-lp"; reg = <0x1a98300 0xd4 0x1a98500 0x280 0x1a98780 0x30>; reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator"; #clock-cells = <0x01>; #phy-cells = <0x00>; clocks = <0x09 0x6d 0x3a>; clock-names = "iface", "ref"; vddio-supply = <0x37>; phandle = <0x35>; }; }; camss@1b0ac00 { compatible = "qcom,msm8916-camss"; reg = <0x1b0ac00 0x200 0x1b00030 0x04 0x1b0b000 0x200 0x1b00038 0x04 0x1b08000 0x100 0x1b08400 0x100 0x1b0a000 0x500 0x1b00020 0x10 0x1b10000 0x1000>; reg-names = "csiphy0", "csiphy0_clk_mux", "csiphy1", "csiphy1_clk_mux", "csid0", "csid1", "ispif", "csi_clk_mux", "vfe0"; interrupts = <0x00 0x4e 0x01 0x00 0x4f 0x01 0x00 0x33 0x01 0x00 0x34 0x01 0x00 0x37 0x01 0x00 0x39 0x01>; interrupt-names = "csiphy0", "csiphy1", "csid0", "csid1", "ispif", "vfe0"; power-domains = <0x09 0x04>; clocks = <0x09 0x60 0x09 0x56 0x09 0x5d 0x09 0x5e 0x09 0x49 0x09 0x4a 0x09 0x4b 0x09 0x4c 0x09 0x4d 0x09 0x4e 0x09 0x4f 0x09 0x50 0x09 0x51 0x09 0x52 0x09 0x5f 0x09 0x63 0x09 0x53 0x09 0x64 0x09 0x65>; clock-names = "top_ahb", "ispif_ahb", "csiphy0_timer", "csiphy1_timer", "csi0_ahb", "csi0", "csi0_phy", "csi0_pix", "csi0_rdi", "csi1_ahb", "csi1", "csi1_phy", "csi1_pix", "csi1_rdi", "ahb", "vfe0", "csi_vfe0", "vfe_ahb", "vfe_axi"; iommus = <0x33 0x03>; status = "okay"; vdda-supply = <0x36>; phandle = <0xd3>; ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { clock-lanes = <0x01>; data-lanes = <0x00 0x02>; remote-endpoint = <0x3b>; status = "okay"; phandle = <0x41>; }; }; }; }; cci@1b0c000 { compatible = "qcom,msm8916-cci"; #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x1b0c000 0x1000>; interrupts = <0x00 0x32 0x01>; clocks = <0x09 0x60 0x09 0x47 0x09 0x48 0x09 0x5f>; clock-names = "camss_top_ahb", "cci_ahb", "cci", "camss_ahb"; assigned-clocks = <0x09 0x47 0x09 0x48>; assigned-clock-rates = <0x4c4b400 0x124f800>; pinctrl-names = "default"; pinctrl-0 = <0x3c>; status = "okay"; phandle = <0xd4>; i2c-bus@0 { reg = <0x00>; clock-frequency = <0x61a80>; #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xd5>; camera_rear@3b { compatible = "ovti,ov5640"; reg = <0x3b>; enable-gpios = <0x31 0x22 0x00>; reset-gpios = <0x31 0x23 0x01>; pinctrl-names = "default"; pinctrl-0 = <0x3d>; clocks = <0x09 0x5a>; clock-names = "xclk"; clock-frequency = <0x16c6140>; vdddo-supply = <0x3e>; vdda-supply = <0x3f>; vddd-supply = <0x40>; status = "disabled"; port { endpoint { clock-lanes = <0x01>; data-lanes = <0x00 0x02>; remote-endpoint = <0x41>; phandle = <0x3b>; }; }; }; }; }; gpu@1c00000 { compatible = "qcom,adreno-306.0", "qcom,adreno"; reg = <0x1c00000 0x20000>; reg-names = "kgsl_3d0_reg_memory"; interrupts = <0x00 0x21 0x04>; interrupt-names = "kgsl_3d0_irq"; clock-names = "core", "iface", "mem", "mem_iface", "alt_mem_iface", "gfx3d"; clocks = <0x09 0x76 0x09 0x75 0x09 0x69 0x09 0x8e 0x09 0x8f 0x09 0x0e>; power-domains = <0x09 0x05>; operating-points-v2 = <0x42>; iommus = <0x43 0x01 0x43 0x02>; opp-table { compatible = "operating-points-v2"; phandle = <0x42>; opp-400000000 { opp-hz = <0x00 0x17d78400>; }; opp-19200000 { opp-hz = <0x00 0x124f800>; }; }; }; video-codec@1d00000 { compatible = "qcom,msm8916-venus"; reg = <0x1d00000 0xff000>; interrupts = <0x00 0x2c 0x04>; power-domains = <0x09 0x01>; clocks = <0x09 0x89 0x09 0x87 0x09 0x88>; clock-names = "core", "iface", "bus"; iommus = <0x33 0x05>; memory-region = <0x44>; status = "okay"; phandle = <0xd6>; video-decoder { compatible = "venus-decoder"; }; video-encoder { compatible = "venus-encoder"; }; }; iommu@1ef0000 { #address-cells = <0x01>; #size-cells = <0x01>; #iommu-cells = <0x01>; compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; ranges = <0x00 0x1e20000 0x40000>; reg = <0x1ef0000 0x3000>; clocks = <0x09 0x81 0x09 0x8b>; clock-names = "iface", "bus"; qcom,iommu-secure-id = <0x11>; phandle = <0x33>; iommu-ctx@3000 { compatible = "qcom,msm-iommu-v1-sec"; reg = <0x3000 0x1000>; interrupts = <0x00 0x46 0x04>; }; iommu-ctx@4000 { compatible = "qcom,msm-iommu-v1-ns"; reg = <0x4000 0x1000>; interrupts = <0x00 0x46 0x04>; }; iommu-ctx@5000 { compatible = "qcom,msm-iommu-v1-sec"; reg = <0x5000 0x1000>; interrupts = <0x00 0x46 0x04>; }; }; iommu@1f08000 { #address-cells = <0x01>; #size-cells = <0x01>; #iommu-cells = <0x01>; compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1"; ranges = <0x00 0x1f08000 0x10000>; clocks = <0x09 0x81 0x09 0x8c>; clock-names = "iface", "bus"; qcom,iommu-secure-id = <0x12>; phandle = <0x43>; iommu-ctx@1000 { compatible = "qcom,msm-iommu-v1-ns"; reg = <0x1000 0x1000>; interrupts = <0x00 0xf1 0x04>; }; iommu-ctx@2000 { compatible = "qcom,msm-iommu-v1-ns"; reg = <0x2000 0x1000>; interrupts = <0x00 0xf2 0x04>; }; }; spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x200f000 0x1000 0x2400000 0x400000 0x2c00000 0x400000 0x3800000 0x200000 0x200a000 0x2100>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts = <0x00 0xbe 0x04>; qcom,ee = <0x00>; qcom,channel = <0x00>; #address-cells = <0x02>; #size-cells = <0x00>; interrupt-controller; #interrupt-cells = <0x04>; phandle = <0x47>; pmic@0 { compatible = "qcom,pm8916", "qcom,spmi-pmic"; reg = <0x00 0x00>; #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xd7>; pon@800 { compatible = "qcom,pm8916-pon"; reg = <0x800>; mode-bootloader = <0x02>; mode-recovery = <0x01>; pwrkey { compatible = "qcom,pm8941-pwrkey"; interrupts = <0x00 0x08 0x00 0x03>; debounce = <0x3d09>; bias-pull-up; linux,code = <0x74>; }; resin { compatible = "qcom,pm8941-resin"; interrupts = <0x00 0x08 0x01 0x03>; debounce = <0x3d09>; bias-pull-up; status = "okay"; linux,code = <0x72>; phandle = <0xd8>; }; watchdog { compatible = "qcom,pm8916-wdt"; interrupts = <0x00 0x08 0x06 0x01>; timeout-sec = <0x3c>; }; }; temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400>; interrupts = <0x00 0x24 0x00 0x01>; io-channels = <0x45 0x08>; io-channel-names = "thermal"; #thermal-sensor-cells = <0x00>; phandle = <0xd9>; }; adc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100>; interrupts = <0x00 0x31 0x00 0x01>; #address-cells = <0x01>; #size-cells = <0x00>; #io-channel-cells = <0x01>; phandle = <0x45>; adc-chan@0 { reg = <0x00>; qcom,pre-scaling = <0x01 0x0a>; }; adc-chan@7 { reg = <0x07>; qcom,pre-scaling = <0x01 0x03>; }; adc-chan@8 { reg = <0x08>; }; adc-chan@9 { reg = <0x09>; }; adc-chan@a { reg = <0x0a>; }; adc-chan@e { reg = <0x0e>; }; adc-chan@f { reg = <0x0f>; }; }; rtc@6000 { compatible = "qcom,pm8941-rtc"; reg = <0x6000>; interrupts = <0x00 0x61 0x01 0x01>; }; mpps@a000 { compatible = "qcom,pm8916-mpp"; reg = <0xa000>; gpio-controller; #gpio-cells = <0x02>; interrupts = <0x00 0xa0 0x00 0x00 0x00 0xa1 0x00 0x00 0x00 0xa2 0x00 0x00 0x00 0xa3 0x00 0x00>; gpio-line-names = "VDD_PX_BIAS", "WLAN_LED_CTRL", "BT_LED_CTRL", "GPIO-F"; pinctrl-names = "default"; pinctrl-0 = <0x46>; phandle = <0xa8>; pm8916-mpp4 { pins = "mpp4"; function = "digital"; output-low; power-source = <0x03>; phandle = <0x46>; }; pm8916-mpps-leds { pins = "mpp2", "mpp3"; function = "digital"; output-low; phandle = <0xa7>; }; }; gpios@c000 { compatible = "qcom,pm8916-gpio"; reg = <0xc000>; gpio-controller; #gpio-cells = <0x02>; interrupts = <0x00 0xc0 0x00 0x00 0x00 0xc1 0x00 0x00 0x00 0xc2 0x00 0x00 0x00 0xc3 0x00 0x00>; gpio-line-names = "USR_LED_3_CTRL", "USR_LED_4_CTRL", "USB_HUB_RESET_N_PM", "USB_SW_SEL_PM"; phandle = <0xa1>; usb-hub-reset-pm { pins = "gpio3"; function = "normal"; input-disable; output-high; phandle = <0x92>; }; usb-hub-reset-pm-device { pins = "gpio3"; function = "normal"; output-low; phandle = <0x94>; }; usb-sw-sel-pm { pins = "gpio4"; function = "normal"; power-source = <0x00>; input-disable; output-high; phandle = <0x91>; }; usb-sw-sel-pm-device { pins = "gpio4"; function = "normal"; power-source = <0x00>; input-disable; output-low; phandle = <0x93>; }; pm8916-gpios-leds { pins = "gpio1", "gpio2"; function = "normal"; output-low; phandle = <0xa6>; }; }; }; pmic@1 { compatible = "qcom,pm8916", "qcom,spmi-pmic"; reg = <0x01 0x00>; #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0xda>; vibrator@c000 { compatible = "qcom,pm8916-vib"; reg = <0xc000>; status = "disabled"; phandle = <0xdb>; }; audio-codec@f000 { compatible = "qcom,pm8916-wcd-analog-codec"; reg = <0xf000>; reg-names = "pmic-codec-core"; clocks = <0x09 0x9f>; clock-names = "mclk"; interrupt-parent = <0x47>; interrupts = <0x01 0xf0 0x00 0x00 0x01 0xf0 0x01 0x00 0x01 0xf0 0x02 0x00 0x01 0xf0 0x03 0x00 0x01 0xf0 0x04 0x00 0x01 0xf0 0x05 0x00 0x01 0xf0 0x06 0x00 0x01 0xf0 0x07 0x00 0x01 0xf1 0x00 0x00 0x01 0xf1 0x01 0x00 0x01 0xf1 0x02 0x00 0x01 0xf1 0x03 0x00 0x01 0xf1 0x04 0x00 0x01 0xf1 0x05 0x00>; interrupt-names = "cdc_spk_cnp_int", "cdc_spk_clip_int", "cdc_spk_ocp_int", "mbhc_ins_rem_det1", "mbhc_but_rel_det", "mbhc_but_press_det", "mbhc_ins_rem_det", "mbhc_switch_int", "cdc_ear_ocp_int", "cdc_hphr_ocp_int", "cdc_hphl_ocp_det", "cdc_ear_cnp_int", "cdc_hphr_cnp_int", "cdc_hphl_cnp_int"; vdd-cdc-io-supply = <0x48>; vdd-cdc-tx-rx-cx-supply = <0x48>; vdd-micbias-supply = <0x49>; #sound-dai-cells = <0x01>; qcom,mbhc-vthreshold-low = <0x4b 0x96 0xed 0x1c2 0x1f4>; qcom,mbhc-vthreshold-high = <0x4b 0x96 0xed 0x1c2 0x1f4>; phandle = <0x5b>; }; }; }; remoteproc@4080000 { compatible = "qcom,msm8916-mss-pil"; reg = <0x4080000 0x100 0x4020000 0x40>; reg-names = "qdsp6", "rmb"; interrupts-extended = <0x01 0x00 0x18 0x01 0x4a 0x00 0x01 0x4a 0x01 0x01 0x4a 0x02 0x01 0x4a 0x03 0x01>; interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; clocks = <0x09 0x74 0x09 0xa0 0x09 0x46 0x3a>; clock-names = "iface", "bus", "mem", "xo"; qcom,smem-states = <0x4b 0x00>; qcom,smem-state-names = "stop"; resets = <0x4c 0x00>; reset-names = "mss_restart"; qcom,halt-regs = <0x0a 0x18000 0x19000 0x1a000>; status = "disabled"; cx-supply = <0x4d>; mx-supply = <0x4e>; pll-supply = <0x4f>; phandle = <0xdc>; mba { memory-region = <0x50>; }; mpss { memory-region = <0x51>; }; smd-edge { interrupts = <0x00 0x19 0x01>; qcom,smd-edge = <0x00>; qcom,ipc = <0x03 0x08 0x0c>; qcom,remote-pid = <0x01>; label = "hexagon"; fastrpc { compatible = "qcom,fastrpc"; qcom,smd-channels = "fastrpcsmd-apps-dsp"; label = "adsp"; #address-cells = <0x01>; #size-cells = <0x00>; cb@1 { compatible = "qcom,fastrpc-compute-cb"; reg = <0x01>; }; }; }; }; sound@7702000 { status = "okay"; compatible = "qcom,apq8016-sbc-sndcard"; reg = <0x7702000 0x04 0x7702004 0x04>; reg-names = "mic-iomux", "spkr-iomux"; pinctrl-0 = <0x52 0x53 0x54>; pinctrl-1 = <0x55 0x56 0x57>; pinctrl-names = "default", "sleep"; qcom,model = "DB410c"; qcom,audio-routing = "AMIC2", "MIC BIAS Internal2", "AMIC3", "MIC BIAS External1"; phandle = <0xdd>; external-dai-link@0 { link-name = "ADV7533"; cpu { sound-dai = <0x58 0x03>; }; codec { sound-dai = <0x59 0x00>; }; }; internal-codec-playback-dai-link@0 { link-name = "WCD"; cpu { sound-dai = <0x58 0x00>; }; codec { sound-dai = <0x5a 0x00 0x5b 0x00>; }; }; internal-codec-capture-dai-link@0 { link-name = "WCD-Capture"; cpu { sound-dai = <0x58 0x02>; }; codec { sound-dai = <0x5a 0x01 0x5b 0x01>; }; }; }; audio-controller@7708000 { status = "okay"; compatible = "qcom,lpass-cpu-apq8016"; clocks = <0x09 0x9a 0x09 0x96 0x09 0x97 0x09 0x9c 0x09 0x9c 0x09 0x9d 0x09 0x9e>; clock-names = "ahbix-clk", "pcnoc-mport-clk", "pcnoc-sway-clk", "mi2s-bit-clk0", "mi2s-bit-clk1", "mi2s-bit-clk2", "mi2s-bit-clk3"; #sound-dai-cells = <0x01>; interrupts = <0x00 0xa0 0x04>; interrupt-names = "lpass-irq-lpaif"; reg = <0x7708000 0x10000>; reg-names = "lpass-lpaif"; #address-cells = <0x01>; #size-cells = <0x00>; phandle = <0x58>; }; audio-codec@771c000 { compatible = "qcom,msm8916-wcd-digital-codec"; reg = <0x771c000 0x400>; clocks = <0x09 0x9a 0x09 0x9f>; clock-names = "ahbix-clk", "mclk"; #sound-dai-cells = <0x01>; phandle = <0x5a>; }; sdhci@7824000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x7824900 0x11c 0x7824000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0x00 0x7b 0x04 0x00 0x8a 0x04>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <0x09 0x7b 0x09 0x7a 0x3a>; clock-names = "core", "iface", "xo"; mmc-ddr-1_8v; bus-width = <0x08>; non-removable; status = "okay"; vmmc-supply = <0x5c>; vqmmc-supply = <0x48>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x5d 0x5e 0x5f>; pinctrl-1 = <0x60 0x61 0x62>; phandle = <0xde>; }; sdhci@7864000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x7864900 0x11c 0x7864000 0x800>; reg-names = "hc_mem", "core_mem"; interrupts = <0x00 0x7d 0x04 0x00 0xdd 0x04>; interrupt-names = "hc_irq", "pwr_irq"; clocks = <0x09 0x7d 0x09 0x7c 0x3a>; clock-names = "core", "iface", "xo"; bus-width = <0x04>; status = "okay"; vmmc-supply = <0x63>; vqmmc-supply = <0x64>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x65 0x66 0x67 0x68>; pinctrl-1 = <0x69 0x6a 0x6b 0x6c>; cd-gpios = <0x31 0x26 0x01>; phandle = <0xdf>; }; dma@7884000 { compatible = "qcom,bam-v1.7.0"; reg = <0x7884000 0x23000>; interrupts = <0x00 0xee 0x04>; clocks = <0x09 0x36>; clock-names = "bam_clk"; #dma-cells = <0x01>; qcom,ee = <0x00>; status = "okay"; phandle = <0x6d>; }; serial@78af000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78af000 0x200>; interrupts = <0x00 0x6b 0x04>; clocks = <0x09 0x44 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x01 0x6d 0x00>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x6e>; pinctrl-1 = <0x6f>; status = "okay"; label = "LS-UART0"; phandle = <0xe0>; }; serial@78b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b0000 0x200>; interrupts = <0x00 0x6c 0x04>; clocks = <0x09 0x45 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x03 0x6d 0x02>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x70>; pinctrl-1 = <0x71>; status = "okay"; label = "LS-UART1"; phandle = <0xe1>; }; i2c@78b5000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x78b5000 0x500>; interrupts = <0x00 0x5f 0x04>; clocks = <0x09 0x36 0x09 0x38>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x72>; pinctrl-1 = <0x73>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; phandle = <0xe2>; }; spi@78b5000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b5000 0x500>; interrupts = <0x00 0x5f 0x04>; clocks = <0x09 0x39 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x05 0x6d 0x04>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x74>; pinctrl-1 = <0x75>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; phandle = <0xe3>; }; i2c@78b6000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x78b6000 0x500>; interrupts = <0x00 0x60 0x04>; clocks = <0x09 0x36 0x09 0x3a>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x76>; pinctrl-1 = <0x77>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; label = "LS-I2C0"; phandle = <0xe4>; }; spi@78b6000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b6000 0x500>; interrupts = <0x00 0x60 0x04>; clocks = <0x09 0x3b 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x07 0x6d 0x06>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x78>; pinctrl-1 = <0x79>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; phandle = <0xe5>; }; spi@78b7000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b7000 0x500>; interrupts = <0x00 0x61 0x04>; clocks = <0x09 0x3d 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x09 0x6d 0x08>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x7a>; pinctrl-1 = <0x7b>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; label = "HS-SPI1"; phandle = <0xe6>; }; i2c@78b8000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x78b8000 0x500>; interrupts = <0x00 0x62 0x04>; clocks = <0x09 0x36 0x09 0x3e>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x7c>; pinctrl-1 = <0x7d>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; label = "HS-I2C2"; phandle = <0xe7>; bridge@39 { status = "okay"; compatible = "adi,adv7533"; reg = <0x39>; interrupt-parent = <0x31>; interrupts = <0x1f 0x02>; adi,dsi-lanes = <0x04>; clocks = <0x14 0x0c>; clock-names = "cec"; pd-gpios = <0x31 0x20 0x00>; avdd-supply = <0x37>; v1p2-supply = <0x37>; v3p3-supply = <0x7e>; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x7f 0x80>; pinctrl-1 = <0x81 0x82>; #sound-dai-cells = <0x01>; phandle = <0x59>; ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x83>; phandle = <0x39>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x84>; phandle = <0xa3>; }; }; }; }; }; spi@78b8000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b8000 0x500>; interrupts = <0x00 0x62 0x04>; clocks = <0x09 0x3f 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x0b 0x6d 0x0a>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x85>; pinctrl-1 = <0x86>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; phandle = <0xe8>; }; i2c@78b9000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x78b9000 0x500>; interrupts = <0x00 0x63 0x04>; clocks = <0x09 0x36 0x09 0x40>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x87>; pinctrl-1 = <0x88>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; phandle = <0xe9>; }; spi@78b9000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78b9000 0x500>; interrupts = <0x00 0x63 0x04>; clocks = <0x09 0x41 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x0d 0x6d 0x0c>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x89>; pinctrl-1 = <0x8a>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; label = "LS-SPI0"; phandle = <0xea>; }; i2c@78ba000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x78ba000 0x500>; interrupts = <0x00 0x64 0x04>; clocks = <0x09 0x36 0x09 0x42>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x8b>; pinctrl-1 = <0x8c>; #address-cells = <0x01>; #size-cells = <0x00>; status = "okay"; label = "LS-I2C1"; phandle = <0xeb>; }; spi@78ba000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x78ba000 0x500>; interrupts = <0x00 0x64 0x04>; clocks = <0x09 0x43 0x09 0x36>; clock-names = "core", "iface"; dmas = <0x6d 0x0f 0x6d 0x0e>; dma-names = "rx", "tx"; pinctrl-names = "default", "sleep"; pinctrl-0 = <0x8d>; pinctrl-1 = <0x8e>; #address-cells = <0x01>; #size-cells = <0x00>; status = "disabled"; phandle = <0xec>; }; usb@78d9000 { compatible = "qcom,ci-hdrc"; reg = <0x78d9000 0x200 0x78d9200 0x200>; interrupts = <0x00 0x86 0x04 0x00 0x8c 0x04>; clocks = <0x09 0x85 0x09 0x86>; clock-names = "iface", "core"; assigned-clocks = <0x09 0x86>; assigned-clock-rates = <0x4c4b400>; resets = <0x09 0x22>; reset-names = "core"; phy_type = "ulpi"; dr_mode = "otg"; hnp-disable; srp-disable; adp-disable; ahb-burst-config = <0x00>; phy-names = "usb-phy"; phys = <0x8f>; status = "okay"; #reset-cells = <0x01>; extcon = <0x90 0x90>; pinctrl-names = "default", "device"; pinctrl-0 = <0x91 0x92>; pinctrl-1 = <0x93 0x94>; phandle = <0x95>; ulpi { phy { compatible = "qcom,usb-hs-phy-msm8916", "qcom,usb-hs-phy"; #phy-cells = <0x00>; clocks = <0x3a 0x09 0x84>; clock-names = "ref", "sleep"; resets = <0x09 0x23 0x95 0x00>; reset-names = "phy", "por"; qcom,init-seq = <0x44016b 0x2240313>; v1p8-supply = <0x4f>; v3p3-supply = <0x49>; extcon = <0x90>; phandle = <0x8f>; }; }; }; remoteproc@a21b000 { compatible = "qcom,pronto-v2-pil", "qcom,pronto"; reg = <0xa204000 0x2000 0xa202000 0x1000 0xa21b000 0x3000>; reg-names = "ccu", "dxe", "pmu"; memory-region = <0x96>; interrupts-extended = <0x01 0x00 0x95 0x01 0x97 0x00 0x01 0x97 0x01 0x01 0x97 0x02 0x01 0x97 0x03 0x01>; interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; qcom,state = <0x98 0x00>; qcom,state-names = "stop"; pinctrl-names = "default"; pinctrl-0 = <0x99>; status = "okay"; vddmx-supply = <0x4e>; vddpx-supply = <0x4f>; phandle = <0x9b>; iris { compatible = "qcom,wcn3620"; clocks = <0x14 0x10>; clock-names = "xo"; vddxo-supply = <0x4f>; vddrfa-supply = <0x0f>; vddpa-supply = <0x9a>; vdddig-supply = <0x48>; }; smd-edge { interrupts = <0x00 0x8e 0x01>; qcom,ipc = <0x03 0x08 0x11>; qcom,smd-edge = <0x06>; qcom,remote-pid = <0x04>; label = "pronto"; wcnss { compatible = "qcom,wcnss"; qcom,smd-channels = "WCNSS_CTRL"; qcom,mmio = <0x9b>; bt { compatible = "qcom,wcnss-bt"; }; wifi { compatible = "qcom,wcnss-wlan"; interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>; interrupt-names = "tx", "rx"; qcom,smem-states = <0x9c 0x0a 0x9c 0x09>; qcom,smem-state-names = "tx-enable", "tx-rings-empty"; }; }; }; }; interrupt-controller@b000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; #interrupt-cells = <0x03>; reg = <0xb000000 0x1000 0xb002000 0x1000>; phandle = <0x01>; }; mailbox@b011000 { compatible = "qcom,msm8916-apcs-kpss-global", "syscon"; reg = <0xb011000 0x1000>; #mbox-cells = <0x01>; clocks = <0x9d 0x09 0x01>; clock-names = "pll", "aux"; #clock-cells = <0x00>; phandle = <0x03>; }; clock@b016000 { compatible = "qcom,msm8916-a53pll"; reg = <0xb016000 0x40>; #clock-cells = <0x00>; phandle = <0x9d>; }; timer@b020000 { #address-cells = <0x01>; #size-cells = <0x01>; ranges; compatible = "arm,armv7-timer-mem"; reg = <0xb020000 0x1000>; clock-frequency = <0x124f800>; frame@b021000 { frame-number = <0x00>; interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>; reg = <0xb021000 0x1000 0xb022000 0x1000>; }; frame@b023000 { frame-number = <0x01>; interrupts = <0x00 0x09 0x04>; reg = <0xb023000 0x1000>; status = "disabled"; }; frame@b024000 { frame-number = <0x02>; interrupts = <0x00 0x0a 0x04>; reg = <0xb024000 0x1000>; status = "disabled"; }; frame@b025000 { frame-number = <0x03>; interrupts = <0x00 0x0b 0x04>; reg = <0xb025000 0x1000>; status = "disabled"; }; frame@b026000 { frame-number = <0x04>; interrupts = <0x00 0x0c 0x04>; reg = <0xb026000 0x1000>; status = "disabled"; }; frame@b027000 { frame-number = <0x05>; interrupts = <0x00 0x0d 0x04>; reg = <0xb027000 0x1000>; status = "disabled"; }; frame@b028000 { frame-number = <0x06>; interrupts = <0x00 0x0e 0x04>; reg = <0xb028000 0x1000>; status = "disabled"; }; }; }; thermal-zones { cpu0-1-thermal { polling-delay-passive = <0xfa>; polling-delay = <0x3e8>; thermal-sensors = <0x9e 0x05>; trips { trip-point0 { temperature = <0x124f8>; hysteresis = <0x7d0>; type = "passive"; phandle = <0x9f>; }; cpu_crit { temperature = <0x1adb0>; hysteresis = <0x7d0>; type = "critical"; phandle = <0xed>; }; }; cooling-maps { map0 { trip = <0x9f>; cooling-device = <0x25 0xffffffff 0xffffffff 0x26 0xffffffff 0xffffffff 0x27 0xffffffff 0xffffffff 0x28 0xffffffff 0xffffffff>; }; }; }; cpu2-3-thermal { polling-delay-passive = <0xfa>; polling-delay = <0x3e8>; thermal-sensors = <0x9e 0x04>; trips { trip-point0 { temperature = <0x124f8>; hysteresis = <0x7d0>; type = "passive"; phandle = <0xa0>; }; cpu_crit { temperature = <0x1adb0>; hysteresis = <0x7d0>; type = "critical"; phandle = <0xee>; }; }; cooling-maps { map0 { trip = <0xa0>; cooling-device = <0x25 0xffffffff 0xffffffff 0x26 0xffffffff 0xffffffff 0x27 0xffffffff 0xffffffff 0x28 0xffffffff 0xffffffff>; }; }; }; gpu-thermal { polling-delay-passive = <0xfa>; polling-delay = <0x3e8>; thermal-sensors = <0x9e 0x02>; trips { trip-point0 { temperature = <0x124f8>; hysteresis = <0x7d0>; type = "passive"; phandle = <0xef>; }; gpu_crit { temperature = <0x17318>; hysteresis = <0x7d0>; type = "critical"; phandle = <0xf0>; }; }; }; camera-thermal { polling-delay-passive = <0xfa>; polling-delay = <0x3e8>; thermal-sensors = <0x9e 0x01>; trips { trip-point0 { temperature = <0x124f8>; hysteresis = <0x7d0>; type = "hot"; phandle = <0xf1>; }; }; }; modem-thermal { polling-delay-passive = <0xfa>; polling-delay = <0x3e8>; thermal-sensors = <0x9e 0x00>; trips { trip-point0 { temperature = <0x14c08>; hysteresis = <0x7d0>; type = "hot"; phandle = <0xf2>; }; }; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <0x01 0x02 0xf08 0x01 0x03 0xf08 0x01 0x04 0xf08 0x01 0x01 0xf08>; }; camera-vdddo-1v8 { compatible = "regulator-fixed"; regulator-name = "camera_vdddo"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; regulator-always-on; phandle = <0x3e>; }; camera-vdda-2v8 { compatible = "regulator-fixed"; regulator-name = "camera_vdda"; regulator-min-microvolt = <0x2ab980>; regulator-max-microvolt = <0x2ab980>; regulator-always-on; phandle = <0x3f>; }; camera-vddd-1v5 { compatible = "regulator-fixed"; regulator-name = "camera_vddd"; regulator-min-microvolt = <0x16e360>; regulator-max-microvolt = <0x16e360>; regulator-always-on; phandle = <0x40>; }; usb2513 { compatible = "smsc,usb3503"; reset-gpios = <0xa1 0x03 0x01>; initial-mode = <0x01>; }; usb-id { compatible = "linux,extcon-usb-gpio"; id-gpio = <0x31 0x79 0x00>; pinctrl-names = "default"; pinctrl-0 = <0xa2>; phandle = <0x90>; }; hdmi-out { compatible = "hdmi-connector"; type = "a"; port { endpoint { remote-endpoint = <0xa3>; phandle = <0x84>; }; }; }; gpio-keys { compatible = "gpio-keys"; #address-cells = <0x01>; #size-cells = <0x00>; autorepeat; pinctrl-names = "default"; pinctrl-0 = <0xa4>; button@0 { label = "Volume Up"; linux,code = <0x73>; gpios = <0x31 0x6b 0x01>; }; }; leds { pinctrl-names = "default"; pinctrl-0 = <0xa5 0xa6 0xa7>; compatible = "gpio-leds"; led@1 { label = "apq8016-sbc:green:user1"; gpios = <0x31 0x15 0x00>; linux,default-trigger = "heartbeat"; default-state = "off"; }; led@2 { label = "apq8016-sbc:green:user2"; gpios = <0x31 0x78 0x00>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@3 { label = "apq8016-sbc:green:user3"; gpios = <0xa1 0x01 0x00>; linux,default-trigger = "mmc1"; default-state = "off"; }; led@4 { label = "apq8016-sbc:green:user4"; gpios = <0xa1 0x02 0x00>; linux,default-trigger = "none"; panic-indicator; default-state = "off"; }; led@5 { label = "apq8016-sbc:yellow:wlan"; gpios = <0xa8 0x02 0x00>; linux,default-trigger = "phy0tx"; default-state = "off"; }; led@6 { label = "apq8016-sbc:blue:bt"; gpios = <0xa8 0x03 0x00>; linux,default-trigger = "bluetooth-power"; default-state = "off"; }; }; __symbols__ { smem_mem = "/reserved-memory/smem_region@86300000"; mpss_mem = "/reserved-memory/mpss@86800000"; wcnss_mem = "/reserved-memory/wcnss@89300000"; venus_mem = "/reserved-memory/venus@89900000"; mba_mem = "/reserved-memory/mba@8ea00000"; xo_board = "/clocks/xo-board"; sleep_clk = "/clocks/sleep-clk"; CPU0 = "/cpus/cpu@0"; CPU1 = "/cpus/cpu@1"; CPU2 = "/cpus/cpu@2"; CPU3 = "/cpus/cpu@3"; L2_0 = "/cpus/l2-cache"; CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0"; CLUSTER_RET = "/cpus/domain-idle-states/cluster-retention"; CLUSTER_PWRDN = "/cpus/domain-idle-states/cluster-gdhs"; cpu_opp_table = "/cpu-opp-table"; scm = "/firmware/scm"; CPU_PD0 = "/psci/power-domain-cpu0"; CPU_PD1 = "/psci/power-domain-cpu1"; CPU_PD2 = "/psci/power-domain-cpu2"; CPU_PD3 = "/psci/power-domain-cpu3"; CLUSTER_PD = "/psci/power-domain-cluster"; rpm_requests = "/smd/rpm/rpm-requests"; rpmcc = "/smd/rpm/rpm-requests/clock-controller"; smd_rpm_regulators = "/smd/rpm/rpm-requests/pm8916-regulators"; pm8916_s1 = "/smd/rpm/rpm-requests/pm8916-regulators/s1"; pm8916_s3 = "/smd/rpm/rpm-requests/pm8916-regulators/s3"; pm8916_s4 = "/smd/rpm/rpm-requests/pm8916-regulators/s4"; pm8916_l1 = "/smd/rpm/rpm-requests/pm8916-regulators/l1"; pm8916_l2 = "/smd/rpm/rpm-requests/pm8916-regulators/l2"; pm8916_l3 = "/smd/rpm/rpm-requests/pm8916-regulators/l3"; pm8916_l4 = "/smd/rpm/rpm-requests/pm8916-regulators/l4"; pm8916_l5 = "/smd/rpm/rpm-requests/pm8916-regulators/l5"; pm8916_l6 = "/smd/rpm/rpm-requests/pm8916-regulators/l6"; pm8916_l7 = "/smd/rpm/rpm-requests/pm8916-regulators/l7"; pm8916_l8 = "/smd/rpm/rpm-requests/pm8916-regulators/l8"; pm8916_l9 = "/smd/rpm/rpm-requests/pm8916-regulators/l9"; pm8916_l10 = "/smd/rpm/rpm-requests/pm8916-regulators/l10"; pm8916_l11 = "/smd/rpm/rpm-requests/pm8916-regulators/l11"; pm8916_l12 = "/smd/rpm/rpm-requests/pm8916-regulators/l12"; pm8916_l13 = "/smd/rpm/rpm-requests/pm8916-regulators/l13"; pm8916_l14 = "/smd/rpm/rpm-requests/pm8916-regulators/l14"; pm8916_l15 = "/smd/rpm/rpm-requests/pm8916-regulators/l15"; pm8916_l16 = "/smd/rpm/rpm-requests/pm8916-regulators/l16"; pm8916_l17 = "/smd/rpm/rpm-requests/pm8916-regulators/l17"; pm8916_l18 = "/smd/rpm/rpm-requests/pm8916-regulators/l18"; hexagon_smp2p_out = "/smp2p-hexagon/master-kernel"; hexagon_smp2p_in = "/smp2p-hexagon/slave-kernel"; wcnss_smp2p_out = "/smp2p-wcnss/master-kernel"; wcnss_smp2p_in = "/smp2p-wcnss/slave-kernel"; apps_smsm = "/smsm/apps@0"; hexagon_smsm = "/smsm/hexagon@1"; wcnss_smsm = "/smsm/wcnss@6"; soc = "/soc"; qfprom = "/soc/qfprom@5c000"; tsens_caldata = "/soc/qfprom@5c000/caldata@d0"; tsens_calsel = "/soc/qfprom@5c000/calsel@ec"; rpm_msg_ram = "/soc/memory@60000"; bimc = "/soc/interconnect@400000"; tsens = "/soc/thermal-sensor@4a9000"; pcnoc = "/soc/interconnect@500000"; snoc = "/soc/interconnect@580000"; cti0 = "/soc/cti@810000"; cti1 = "/soc/cti@811000"; tpiu = "/soc/tpiu@820000"; tpiu_in = "/soc/tpiu@820000/in-ports/port/endpoint"; funnel0 = "/soc/funnel@821000"; funnel0_in4 = "/soc/funnel@821000/in-ports/port@4/endpoint"; funnel0_out = "/soc/funnel@821000/out-ports/port/endpoint"; replicator = "/soc/replicator@824000"; replicator_out0 = "/soc/replicator@824000/out-ports/port@0/endpoint"; replicator_out1 = "/soc/replicator@824000/out-ports/port@1/endpoint"; replicator_in = "/soc/replicator@824000/in-ports/port/endpoint"; etf = "/soc/etf@825000"; etf_in = "/soc/etf@825000/in-ports/port/endpoint"; etf_out = "/soc/etf@825000/out-ports/port/endpoint"; etr = "/soc/etr@826000"; etr_in = "/soc/etr@826000/in-ports/port/endpoint"; funnel1 = "/soc/funnel@841000"; funnel1_in0 = "/soc/funnel@841000/in-ports/port@0/endpoint"; funnel1_in1 = "/soc/funnel@841000/in-ports/port@1/endpoint"; funnel1_in2 = "/soc/funnel@841000/in-ports/port@2/endpoint"; funnel1_in3 = "/soc/funnel@841000/in-ports/port@3/endpoint"; funnel1_out = "/soc/funnel@841000/out-ports/port/endpoint"; debug0 = "/soc/debug@850000"; debug1 = "/soc/debug@852000"; debug2 = "/soc/debug@854000"; debug3 = "/soc/debug@856000"; cti12 = "/soc/cti@858000"; cti13 = "/soc/cti@859000"; cti14 = "/soc/cti@85a000"; cti15 = "/soc/cti@85b000"; etm0 = "/soc/etm@85c000"; etm0_out = "/soc/etm@85c000/out-ports/port/endpoint"; etm1 = "/soc/etm@85d000"; etm1_out = "/soc/etm@85d000/out-ports/port/endpoint"; etm2 = "/soc/etm@85e000"; etm2_out = "/soc/etm@85e000/out-ports/port/endpoint"; etm3 = "/soc/etm@85f000"; etm3_out = "/soc/etm@85f000/out-ports/port/endpoint"; msmgpio = "/soc/pinctrl@1000000"; blsp1_uart1_default = "/soc/pinctrl@1000000/blsp1-uart1-default"; blsp1_uart1_sleep = "/soc/pinctrl@1000000/blsp1-uart1-sleep"; blsp1_uart2_default = "/soc/pinctrl@1000000/blsp1-uart2-default"; blsp1_uart2_sleep = "/soc/pinctrl@1000000/blsp1-uart2-sleep"; spi1_default = "/soc/pinctrl@1000000/spi1-default"; spi1_sleep = "/soc/pinctrl@1000000/spi1-sleep"; spi2_default = "/soc/pinctrl@1000000/spi2-default"; spi2_sleep = "/soc/pinctrl@1000000/spi2-sleep"; spi3_default = "/soc/pinctrl@1000000/spi3-default"; spi3_sleep = "/soc/pinctrl@1000000/spi3-sleep"; spi4_default = "/soc/pinctrl@1000000/spi4-default"; spi4_sleep = "/soc/pinctrl@1000000/spi4-sleep"; spi5_default = "/soc/pinctrl@1000000/spi5-default"; spi5_sleep = "/soc/pinctrl@1000000/spi5-sleep"; spi6_default = "/soc/pinctrl@1000000/spi6-default"; spi6_sleep = "/soc/pinctrl@1000000/spi6-sleep"; i2c1_default = "/soc/pinctrl@1000000/i2c1-default"; i2c1_sleep = "/soc/pinctrl@1000000/i2c1-sleep"; i2c2_default = "/soc/pinctrl@1000000/i2c2-default"; i2c2_sleep = "/soc/pinctrl@1000000/i2c2-sleep"; i2c4_default = "/soc/pinctrl@1000000/i2c4-default"; i2c4_sleep = "/soc/pinctrl@1000000/i2c4-sleep"; i2c5_default = "/soc/pinctrl@1000000/i2c5-default"; i2c5_sleep = "/soc/pinctrl@1000000/i2c5-sleep"; i2c6_default = "/soc/pinctrl@1000000/i2c6-default"; i2c6_sleep = "/soc/pinctrl@1000000/i2c6-sleep"; sdc1_clk_on = "/soc/pinctrl@1000000/pmx-sdc1-clk/clk-on"; sdc1_clk_off = "/soc/pinctrl@1000000/pmx-sdc1-clk/clk-off"; sdc1_cmd_on = "/soc/pinctrl@1000000/pmx-sdc1-cmd/cmd-on"; sdc1_cmd_off = "/soc/pinctrl@1000000/pmx-sdc1-cmd/cmd-off"; sdc1_data_on = "/soc/pinctrl@1000000/pmx-sdc1-data/data-on"; sdc1_data_off = "/soc/pinctrl@1000000/pmx-sdc1-data/data-off"; sdc2_clk_on = "/soc/pinctrl@1000000/pmx-sdc2-clk/clk-on"; sdc2_clk_off = "/soc/pinctrl@1000000/pmx-sdc2-clk/clk-off"; sdc2_cmd_on = "/soc/pinctrl@1000000/pmx-sdc2-cmd/cmd-on"; sdc2_cmd_off = "/soc/pinctrl@1000000/pmx-sdc2-cmd/cmd-off"; sdc2_data_on = "/soc/pinctrl@1000000/pmx-sdc2-data/data-on"; sdc2_data_off = "/soc/pinctrl@1000000/pmx-sdc2-data/data-off"; sdc2_cd_on = "/soc/pinctrl@1000000/pmx-sdc2-cd-pin/cd-on"; sdc2_cd_off = "/soc/pinctrl@1000000/pmx-sdc2-cd-pin/cd-off"; cdc_pdm_lines_act = "/soc/pinctrl@1000000/cdc-pdm-lines/pdm-lines-on"; cdc_pdm_lines_sus = "/soc/pinctrl@1000000/cdc-pdm-lines/pdm-lines-off"; ext_pri_tlmm_lines_act = "/soc/pinctrl@1000000/ext-pri-tlmm-lines/ext-pa-on"; ext_pri_tlmm_lines_sus = "/soc/pinctrl@1000000/ext-pri-tlmm-lines/ext-pa-off"; ext_pri_ws_act = "/soc/pinctrl@1000000/ext-pri-ws-line/ext-pa-on"; ext_pri_ws_sus = "/soc/pinctrl@1000000/ext-pri-ws-line/ext-pa-off"; ext_mclk_tlmm_lines_act = "/soc/pinctrl@1000000/ext-mclk-tlmm-lines/mclk-lines-on"; ext_mclk_tlmm_lines_sus = "/soc/pinctrl@1000000/ext-mclk-tlmm-lines/mclk-lines-off"; ext_sec_tlmm_lines_act = "/soc/pinctrl@1000000/ext-sec-tlmm-lines/tlmm-lines-on"; ext_sec_tlmm_lines_sus = "/soc/pinctrl@1000000/ext-sec-tlmm-lines/tlmm-lines-off"; cdc_dmic_lines_act = "/soc/pinctrl@1000000/cdc-dmic-lines/dmic-lines-on"; cdc_dmic_lines_sus = "/soc/pinctrl@1000000/cdc-dmic-lines/dmic-lines-off"; wcnss_pin_a = "/soc/pinctrl@1000000/wcnss-active"; cci0_default = "/soc/pinctrl@1000000/cci0-default"; camera_front_default = "/soc/pinctrl@1000000/camera-front-default"; camera_rear_default = "/soc/pinctrl@1000000/camera-rear-default"; msmgpio_leds = "/soc/pinctrl@1000000/msmgpio-leds"; usb_id_default = "/soc/pinctrl@1000000/usb-id-default"; adv7533_int_active = "/soc/pinctrl@1000000/adv533-int-active"; adv7533_int_suspend = "/soc/pinctrl@1000000/adv7533-int-suspend"; adv7533_switch_active = "/soc/pinctrl@1000000/adv7533-switch-active"; adv7533_switch_suspend = "/soc/pinctrl@1000000/adv7533-switch-suspend"; msm_key_volp_n_default = "/soc/pinctrl@1000000/msm-key-volp-n-default"; gcc = "/soc/clock-controller@1800000"; tcsr_mutex = "/soc/hwlock@1905000"; tcsr = "/soc/syscon@1937000"; mdss = "/soc/mdss@1a00000"; mdp = "/soc/mdss@1a00000/mdp@1a01000"; mdp5_intf1_out = "/soc/mdss@1a00000/mdp@1a01000/ports/port@0/endpoint"; dsi0 = "/soc/mdss@1a00000/dsi@1a98000"; dsi0_in = "/soc/mdss@1a00000/dsi@1a98000/ports/port@0/endpoint"; dsi0_out = "/soc/mdss@1a00000/dsi@1a98000/ports/port@1/endpoint"; dsi_phy0 = "/soc/mdss@1a00000/dsi-phy@1a98300"; camss = "/soc/camss@1b0ac00"; csiphy0_ep = "/soc/camss@1b0ac00/ports/port@0/endpoint"; cci = "/soc/cci@1b0c000"; cci_i2c0 = "/soc/cci@1b0c000/i2c-bus@0"; ov5640_ep = "/soc/cci@1b0c000/i2c-bus@0/camera_rear@3b/port/endpoint"; gpu_opp_table = "/soc/gpu@1c00000/opp-table"; venus = "/soc/video-codec@1d00000"; apps_iommu = "/soc/iommu@1ef0000"; gpu_iommu = "/soc/iommu@1f08000"; spmi_bus = "/soc/spmi@200f000"; pm8916_0 = "/soc/spmi@200f000/pmic@0"; pm8916_resin = "/soc/spmi@200f000/pmic@0/pon@800/resin"; pm8916_temp = "/soc/spmi@200f000/pmic@0/temp-alarm@2400"; pm8916_vadc = "/soc/spmi@200f000/pmic@0/adc@3100"; pm8916_mpps = "/soc/spmi@200f000/pmic@0/mpps@a000"; ls_exp_gpio_f = "/soc/spmi@200f000/pmic@0/mpps@a000/pm8916-mpp4"; pm8916_mpps_leds = "/soc/spmi@200f000/pmic@0/mpps@a000/pm8916-mpps-leds"; pm8916_gpios = "/soc/spmi@200f000/pmic@0/gpios@c000"; usb_hub_reset_pm = "/soc/spmi@200f000/pmic@0/gpios@c000/usb-hub-reset-pm"; usb_hub_reset_pm_device = "/soc/spmi@200f000/pmic@0/gpios@c000/usb-hub-reset-pm-device"; usb_sw_sel_pm = "/soc/spmi@200f000/pmic@0/gpios@c000/usb-sw-sel-pm"; usb_sw_sel_pm_device = "/soc/spmi@200f000/pmic@0/gpios@c000/usb-sw-sel-pm-device"; pm8916_gpios_leds = "/soc/spmi@200f000/pmic@0/gpios@c000/pm8916-gpios-leds"; pm8916_1 = "/soc/spmi@200f000/pmic@1"; pm8916_vib = "/soc/spmi@200f000/pmic@1/vibrator@c000"; wcd_codec = "/soc/spmi@200f000/pmic@1/audio-codec@f000"; mpss = "/soc/remoteproc@4080000"; sound = "/soc/sound@7702000"; lpass = "/soc/audio-controller@7708000"; lpass_codec = "/soc/audio-codec@771c000"; sdhc_1 = "/soc/sdhci@7824000"; sdhc_2 = "/soc/sdhci@7864000"; blsp_dma = "/soc/dma@7884000"; blsp1_uart1 = "/soc/serial@78af000"; blsp1_uart2 = "/soc/serial@78b0000"; blsp_i2c1 = "/soc/i2c@78b5000"; blsp_spi1 = "/soc/spi@78b5000"; blsp_i2c2 = "/soc/i2c@78b6000"; blsp_spi2 = "/soc/spi@78b6000"; blsp_spi3 = "/soc/spi@78b7000"; blsp_i2c4 = "/soc/i2c@78b8000"; adv_bridge = "/soc/i2c@78b8000/bridge@39"; adv7533_in = "/soc/i2c@78b8000/bridge@39/ports/port@0/endpoint"; adv7533_out = "/soc/i2c@78b8000/bridge@39/ports/port@1/endpoint"; blsp_spi4 = "/soc/spi@78b8000"; blsp_i2c5 = "/soc/i2c@78b9000"; blsp_spi5 = "/soc/spi@78b9000"; blsp_i2c6 = "/soc/i2c@78ba000"; blsp_spi6 = "/soc/spi@78ba000"; usb = "/soc/usb@78d9000"; usb_hs_phy = "/soc/usb@78d9000/ulpi/phy"; pronto = "/soc/remoteproc@a21b000"; intc = "/soc/interrupt-controller@b000000"; apcs = "/soc/mailbox@b011000"; a53pll = "/soc/clock@b016000"; cpu0_1_alert0 = "/thermal-zones/cpu0-1-thermal/trips/trip-point0"; cpu0_1_crit = "/thermal-zones/cpu0-1-thermal/trips/cpu_crit"; cpu2_3_alert0 = "/thermal-zones/cpu2-3-thermal/trips/trip-point0"; cpu2_3_crit = "/thermal-zones/cpu2-3-thermal/trips/cpu_crit"; gpu_alert0 = "/thermal-zones/gpu-thermal/trips/trip-point0"; gpu_crit = "/thermal-zones/gpu-thermal/trips/gpu_crit"; cam_alert0 = "/thermal-zones/camera-thermal/trips/trip-point0"; modem_alert0 = "/thermal-zones/modem-thermal/trips/trip-point0"; camera_vdddo_1v8 = "/camera-vdddo-1v8"; camera_vdda_2v8 = "/camera-vdda-2v8"; camera_vddd_1v5 = "/camera-vddd-1v5"; usb_id = "/usb-id"; hdmi_con = "/hdmi-out/port/endpoint"; }; };