/dts-v1/;

/ {
	interrupt-parent = <0x01>;
	#address-cells = <0x01>;
	#size-cells = <0x01>;
	model = "Tanix TX6";
	compatible = "oranth,tanix-tx6", "allwinner,sun50i-h6";

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00>;
			enable-method = "psci";
			clocks = <0x02 0x15>;
			clock-latency-ns = <0x3b9b0>;
			#cooling-cells = <0x02>;
			operating-points-v2 = <0x03>;
			cpu-supply = <0x04>;
			phandle = <0x06>;
		};

		cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x01>;
			enable-method = "psci";
			clocks = <0x02 0x15>;
			clock-latency-ns = <0x3b9b0>;
			#cooling-cells = <0x02>;
			operating-points-v2 = <0x03>;
			phandle = <0x07>;
		};

		cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x02>;
			enable-method = "psci";
			clocks = <0x02 0x15>;
			clock-latency-ns = <0x3b9b0>;
			#cooling-cells = <0x02>;
			operating-points-v2 = <0x03>;
			phandle = <0x08>;
		};

		cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x03>;
			enable-method = "psci";
			clocks = <0x02 0x15>;
			clock-latency-ns = <0x3b9b0>;
			#cooling-cells = <0x02>;
			operating-points-v2 = <0x03>;
			phandle = <0x09>;
		};
	};

	display-engine {
		compatible = "allwinner,sun50i-h6-display-engine";
		allwinner,pipelines = <0x05>;
		status = "okay";
		phandle = <0x32>;
	};

	osc24M_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x16e3600>;
		clock-output-names = "osc24M";
		phandle = <0x0f>;
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04>;
		interrupt-affinity = <0x06 0x07 0x08 0x09>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		arm,no-tick-in-suspend;
		interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		ranges;

		bus@1000000 {
			compatible = "allwinner,sun50i-h6-de3", "allwinner,sun50i-a64-de2";
			reg = <0x1000000 0x400000>;
			allwinner,sram = <0x0a 0x01>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x1000000 0x400000>;

			clock@0 {
				compatible = "allwinner,sun50i-h6-de3-clk";
				reg = <0x00 0x10000>;
				clocks = <0x02 0x1d 0x02 0x1e>;
				clock-names = "mod", "bus";
				resets = <0x02 0x01>;
				#clock-cells = <0x01>;
				#reset-cells = <0x01>;
				phandle = <0x0b>;
			};

			mixer@100000 {
				compatible = "allwinner,sun50i-h6-de3-mixer-0";
				reg = <0x100000 0x100000>;
				clocks = <0x0b 0x00 0x0b 0x06>;
				clock-names = "bus", "mod";
				resets = <0x0b 0x00>;
				iommus = <0x0c 0x00>;
				phandle = <0x05>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@1 {
						reg = <0x01>;
						phandle = <0x33>;

						endpoint {
							remote-endpoint = <0x0d>;
							phandle = <0x23>;
						};
					};
				};
			};
		};

		video-codec@1c0e000 {
			compatible = "allwinner,sun50i-h6-video-engine";
			reg = <0x1c0e000 0x2000>;
			clocks = <0x02 0x26 0x02 0x25 0x02 0x36>;
			clock-names = "ahb", "mod", "ram";
			resets = <0x02 0x05>;
			interrupts = <0x00 0x59 0x04>;
			allwinner,sram = <0x0e 0x01>;
			iommus = <0x0c 0x03>;
		};

		gpu@1800000 {
			compatible = "allwinner,sun50i-h6-mali", "arm,mali-t720";
			reg = <0x1800000 0x4000>;
			interrupts = <0x00 0x54 0x04 0x00 0x55 0x04 0x00 0x53 0x04>;
			interrupt-names = "job", "mmu", "gpu";
			clocks = <0x02 0x21 0x02 0x22>;
			clock-names = "core", "bus";
			resets = <0x02 0x03>;
			status = "okay";
			mali-supply = <0x04>;
			phandle = <0x34>;
		};

		crypto@1904000 {
			compatible = "allwinner,sun50i-h6-crypto";
			reg = <0x1904000 0x1000>;
			interrupts = <0x00 0x57 0x04>;
			clocks = <0x02 0x24 0x02 0x23 0x02 0x37>;
			clock-names = "bus", "mod", "ram";
			resets = <0x02 0x04>;
			phandle = <0x35>;
		};

		syscon@3000000 {
			compatible = "allwinner,sun50i-h6-system-control", "allwinner,sun50i-a64-system-control";
			reg = <0x3000000 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges;
			phandle = <0x1b>;

			sram@28000 {
				compatible = "mmio-sram";
				reg = <0x28000 0x1e000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x28000 0x1e000>;
				phandle = <0x36>;

				sram-section@0 {
					compatible = "allwinner,sun50i-h6-sram-c", "allwinner,sun50i-a64-sram-c";
					reg = <0x00 0x1e000>;
					phandle = <0x0a>;
				};
			};

			sram@1a00000 {
				compatible = "mmio-sram";
				reg = <0x1a00000 0x200000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x1a00000 0x200000>;
				phandle = <0x37>;

				sram-section@0 {
					compatible = "allwinner,sun50i-h6-sram-c1", "allwinner,sun4i-a10-sram-c1";
					reg = <0x00 0x200000>;
					phandle = <0x0e>;
				};
			};
		};

		clock@3001000 {
			compatible = "allwinner,sun50i-h6-ccu";
			reg = <0x3001000 0x1000>;
			clocks = <0x0f 0x10 0x00 0x10 0x02>;
			clock-names = "hosc", "losc", "iosc";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x02>;
		};

		dma-controller@3002000 {
			compatible = "allwinner,sun50i-h6-dma";
			reg = <0x3002000 0x1000>;
			interrupts = <0x00 0x2b 0x04>;
			clocks = <0x02 0x2b 0x02 0x35>;
			clock-names = "bus", "mbus";
			dma-channels = <0x10>;
			dma-requests = <0x2e>;
			resets = <0x02 0x08>;
			#dma-cells = <0x01>;
			phandle = <0x1a>;
		};

		mailbox@3003000 {
			compatible = "allwinner,sun50i-h6-msgbox", "allwinner,sun6i-a31-msgbox";
			reg = <0x3003000 0x1000>;
			clocks = <0x02 0x2c>;
			resets = <0x02 0x09>;
			interrupts = <0x00 0x2c 0x04>;
			#mbox-cells = <0x01>;
			phandle = <0x38>;
		};

		efuse@3006000 {
			compatible = "allwinner,sun50i-h6-sid";
			reg = <0x3006000 0x400>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			phandle = <0x39>;

			thermal-sensor-calibration@14 {
				reg = <0x14 0x08>;
				phandle = <0x2d>;
			};

			cpu-speed-grade@1c {
				reg = <0x1c 0x04>;
				phandle = <0x30>;
			};
		};

		watchdog@30090a0 {
			compatible = "allwinner,sun50i-h6-wdt", "allwinner,sun6i-a31-wdt";
			reg = <0x30090a0 0x20>;
			interrupts = <0x00 0x32 0x04>;
			clocks = <0x0f>;
			status = "disabled";
			phandle = <0x3a>;
		};

		pwm@300a000 {
			compatible = "allwinner,sun50i-h6-pwm";
			reg = <0x300a000 0x400>;
			clocks = <0x0f 0x02 0x32>;
			clock-names = "mod", "bus";
			resets = <0x02 0x0e>;
			#pwm-cells = <0x03>;
			status = "disabled";
			phandle = <0x3b>;
		};

		pinctrl@300b000 {
			compatible = "allwinner,sun50i-h6-pinctrl";
			reg = <0x300b000 0x400>;
			interrupts = <0x00 0x33 0x04 0x00 0x35 0x04 0x00 0x36 0x04 0x00 0x3b 0x04>;
			clocks = <0x02 0x1a 0x0f 0x10 0x00>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <0x03>;
			interrupt-controller;
			#interrupt-cells = <0x03>;
			phandle = <0x13>;

			rgmii-pins {
				pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD11", "PD12", "PD13", "PD19", "PD20";
				function = "emac";
				drive-strength = <0x28>;
				phandle = <0x3c>;
			};

			hdmi-pins {
				pins = "PH8", "PH9", "PH10";
				function = "hdmi";
				phandle = <0x20>;
			};

			i2c0-pins {
				pins = "PD25", "PD26";
				function = "i2c0";
				phandle = <0x17>;
			};

			i2c1-pins {
				pins = "PH5", "PH6";
				function = "i2c1";
				phandle = <0x18>;
			};

			i2c2-pins {
				pins = "PD23", "PD24";
				function = "i2c2";
				phandle = <0x19>;
			};

			mmc0-pins {
				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
				function = "mmc0";
				drive-strength = <0x1e>;
				bias-pull-up;
				phandle = <0x11>;
			};

			mmc1-pins {
				pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
				function = "mmc1";
				drive-strength = <0x1e>;
				bias-pull-up;
				phandle = <0x14>;
			};

			mmc2-pins {
				pins = "PC1", "PC4", "PC5", "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14";
				function = "mmc2";
				drive-strength = <0x1e>;
				bias-pull-up;
				phandle = <0x15>;
			};

			spi0-pins {
				pins = "PC0", "PC2", "PC3";
				function = "spi0";
				phandle = <0x3d>;
			};

			spi0-cs-pin {
				pins = "PC5";
				function = "spi0";
				phandle = <0x3e>;
			};

			spi1-pins {
				pins = "PH4", "PH5", "PH6";
				function = "spi1";
				phandle = <0x3f>;
			};

			spi1-cs-pin {
				pins = "PH3";
				function = "spi1";
				phandle = <0x40>;
			};

			spdif-tx-pin {
				pins = "PH7";
				function = "spdif";
				phandle = <0x1c>;
			};

			uart0-ph-pins {
				pins = "PH0", "PH1";
				function = "uart0";
				phandle = <0x16>;
			};

			uart1-pins {
				pins = "PG6", "PG7";
				function = "uart1";
				phandle = <0x41>;
			};

			uart1-rts-cts-pins {
				pins = "PG8", "PG9";
				function = "uart1";
				phandle = <0x42>;
			};
		};

		interrupt-controller@3021000 {
			compatible = "arm,gic-400";
			reg = <0x3021000 0x1000 0x3022000 0x2000 0x3024000 0x2000 0x3026000 0x2000>;
			interrupts = <0x01 0x09 0xf04>;
			interrupt-controller;
			#interrupt-cells = <0x03>;
			phandle = <0x01>;
		};

		iommu@30f0000 {
			compatible = "allwinner,sun50i-h6-iommu";
			reg = <0x30f0000 0x10000>;
			interrupts = <0x00 0x39 0x04>;
			clocks = <0x02 0x33>;
			resets = <0x02 0x0f>;
			#iommu-cells = <0x01>;
			phandle = <0x0c>;
		};

		mmc@4020000 {
			compatible = "allwinner,sun50i-h6-mmc", "allwinner,sun50i-a64-mmc";
			reg = <0x4020000 0x1000>;
			clocks = <0x02 0x43 0x02 0x40>;
			clock-names = "ahb", "mmc";
			resets = <0x02 0x12>;
			reset-names = "ahb";
			interrupts = <0x00 0x23 0x04>;
			pinctrl-names = "default";
			pinctrl-0 = <0x11>;
			max-frequency = <0x8f0d180>;
			status = "okay";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			vmmc-supply = <0x12>;
			cd-gpios = <0x13 0x05 0x06 0x01>;
			bus-width = <0x04>;
			phandle = <0x43>;
		};

		mmc@4021000 {
			compatible = "allwinner,sun50i-h6-mmc", "allwinner,sun50i-a64-mmc";
			reg = <0x4021000 0x1000>;
			clocks = <0x02 0x44 0x02 0x41>;
			clock-names = "ahb", "mmc";
			resets = <0x02 0x13>;
			reset-names = "ahb";
			interrupts = <0x00 0x24 0x04>;
			pinctrl-names = "default";
			pinctrl-0 = <0x14>;
			max-frequency = <0x8f0d180>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x44>;
		};

		mmc@4022000 {
			compatible = "allwinner,sun50i-h6-emmc", "allwinner,sun50i-a64-emmc";
			reg = <0x4022000 0x1000>;
			clocks = <0x02 0x45 0x02 0x42>;
			clock-names = "ahb", "mmc";
			resets = <0x02 0x14>;
			reset-names = "ahb";
			interrupts = <0x00 0x25 0x04>;
			pinctrl-names = "default";
			pinctrl-0 = <0x15>;
			max-frequency = <0x8f0d180>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x45>;
		};

		serial@5000000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x5000000 0x400>;
			interrupts = <0x00 0x00 0x04>;
			reg-shift = <0x02>;
			reg-io-width = <0x04>;
			clocks = <0x02 0x46>;
			resets = <0x02 0x15>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x16>;
			phandle = <0x46>;
		};

		serial@5000400 {
			compatible = "snps,dw-apb-uart";
			reg = <0x5000400 0x400>;
			interrupts = <0x00 0x01 0x04>;
			reg-shift = <0x02>;
			reg-io-width = <0x04>;
			clocks = <0x02 0x47>;
			resets = <0x02 0x16>;
			status = "disabled";
			phandle = <0x47>;
		};

		serial@5000800 {
			compatible = "snps,dw-apb-uart";
			reg = <0x5000800 0x400>;
			interrupts = <0x00 0x02 0x04>;
			reg-shift = <0x02>;
			reg-io-width = <0x04>;
			clocks = <0x02 0x48>;
			resets = <0x02 0x17>;
			status = "disabled";
			phandle = <0x48>;
		};

		serial@5000c00 {
			compatible = "snps,dw-apb-uart";
			reg = <0x5000c00 0x400>;
			interrupts = <0x00 0x03 0x04>;
			reg-shift = <0x02>;
			reg-io-width = <0x04>;
			clocks = <0x02 0x49>;
			resets = <0x02 0x18>;
			status = "disabled";
			phandle = <0x49>;
		};

		i2c@5002000 {
			compatible = "allwinner,sun50i-h6-i2c", "allwinner,sun6i-a31-i2c";
			reg = <0x5002000 0x400>;
			interrupts = <0x00 0x04 0x04>;
			clocks = <0x02 0x4a>;
			resets = <0x02 0x19>;
			pinctrl-names = "default";
			pinctrl-0 = <0x17>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x4a>;
		};

		i2c@5002400 {
			compatible = "allwinner,sun50i-h6-i2c", "allwinner,sun6i-a31-i2c";
			reg = <0x5002400 0x400>;
			interrupts = <0x00 0x05 0x04>;
			clocks = <0x02 0x4b>;
			resets = <0x02 0x1a>;
			pinctrl-names = "default";
			pinctrl-0 = <0x18>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x4b>;
		};

		i2c@5002800 {
			compatible = "allwinner,sun50i-h6-i2c", "allwinner,sun6i-a31-i2c";
			reg = <0x5002800 0x400>;
			interrupts = <0x00 0x06 0x04>;
			clocks = <0x02 0x4c>;
			resets = <0x02 0x1b>;
			pinctrl-names = "default";
			pinctrl-0 = <0x19>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x4c>;
		};

		spi@5010000 {
			compatible = "allwinner,sun50i-h6-spi", "allwinner,sun8i-h3-spi";
			reg = <0x5010000 0x1000>;
			interrupts = <0x00 0x0a 0x04>;
			clocks = <0x02 0x52 0x02 0x50>;
			clock-names = "ahb", "mod";
			dmas = <0x1a 0x16 0x1a 0x16>;
			dma-names = "rx", "tx";
			resets = <0x02 0x1f>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x4d>;
		};

		spi@5011000 {
			compatible = "allwinner,sun50i-h6-spi", "allwinner,sun8i-h3-spi";
			reg = <0x5011000 0x1000>;
			interrupts = <0x00 0x0b 0x04>;
			clocks = <0x02 0x53 0x02 0x51>;
			clock-names = "ahb", "mod";
			dmas = <0x1a 0x17 0x1a 0x17>;
			dma-names = "rx", "tx";
			resets = <0x02 0x20>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x4e>;
		};

		ethernet@5020000 {
			compatible = "allwinner,sun50i-h6-emac", "allwinner,sun50i-a64-emac";
			syscon = <0x1b>;
			reg = <0x5020000 0x10000>;
			interrupts = <0x00 0x0c 0x04>;
			interrupt-names = "macirq";
			resets = <0x02 0x21>;
			reset-names = "stmmaceth";
			clocks = <0x02 0x54>;
			clock-names = "stmmaceth";
			status = "disabled";
			phandle = <0x4f>;

			mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x50>;
			};
		};

		spdif@5093000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sun50i-h6-spdif";
			reg = <0x5093000 0x400>;
			interrupts = <0x00 0x15 0x04>;
			clocks = <0x02 0x63 0x02 0x62>;
			clock-names = "apb", "spdif";
			resets = <0x02 0x29>;
			dmas = <0x1a 0x02>;
			dma-names = "tx";
			pinctrl-names = "default";
			pinctrl-0 = <0x1c>;
			status = "disabled";
			phandle = <0x51>;
		};

		usb@5100000 {
			compatible = "allwinner,sun50i-h6-musb", "allwinner,sun8i-a33-musb";
			reg = <0x5100000 0x400>;
			clocks = <0x02 0x74>;
			resets = <0x02 0x35>;
			interrupts = <0x00 0x17 0x04>;
			interrupt-names = "mc";
			phys = <0x1d 0x00>;
			phy-names = "usb";
			extcon = <0x1d 0x00>;
			status = "okay";
			dr_mode = "host";
			phandle = <0x52>;
		};

		phy@5100400 {
			compatible = "allwinner,sun50i-h6-usb-phy";
			reg = <0x5100400 0x24 0x5101800 0x04 0x5311800 0x04>;
			reg-names = "phy_ctrl", "pmu0", "pmu3";
			clocks = <0x02 0x69 0x02 0x6c>;
			clock-names = "usb0_phy", "usb3_phy";
			resets = <0x02 0x2c 0x02 0x2e>;
			reset-names = "usb0_reset", "usb3_reset";
			status = "okay";
			#phy-cells = <0x01>;
			phandle = <0x1d>;
		};

		usb@5101000 {
			compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
			reg = <0x5101000 0x100>;
			interrupts = <0x00 0x18 0x04>;
			clocks = <0x02 0x6f 0x02 0x71 0x02 0x68>;
			resets = <0x02 0x30 0x02 0x32>;
			phys = <0x1d 0x00>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x53>;
		};

		usb@5101400 {
			compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
			reg = <0x5101400 0x100>;
			interrupts = <0x00 0x19 0x04>;
			clocks = <0x02 0x6f 0x02 0x68>;
			resets = <0x02 0x30>;
			phys = <0x1d 0x00>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x54>;
		};

		dwc3@5200000 {
			compatible = "snps,dwc3";
			reg = <0x5200000 0x10000>;
			interrupts = <0x00 0x1a 0x04>;
			clocks = <0x02 0x72 0x02 0x72 0x10 0x00>;
			clock-names = "ref", "bus_early", "suspend";
			resets = <0x02 0x33>;
			dr_mode = "host";
			phys = <0x1e>;
			phy-names = "usb3-phy";
			status = "okay";
			phandle = <0x55>;
		};

		phy@5210000 {
			compatible = "allwinner,sun50i-h6-usb3-phy";
			reg = <0x5210000 0x10000>;
			clocks = <0x02 0x6a>;
			resets = <0x02 0x2d>;
			#phy-cells = <0x00>;
			status = "okay";
			phandle = <0x1e>;
		};

		usb@5311000 {
			compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
			reg = <0x5311000 0x100>;
			interrupts = <0x00 0x1c 0x04>;
			clocks = <0x02 0x70 0x02 0x73 0x02 0x6b>;
			resets = <0x02 0x31 0x02 0x34>;
			phys = <0x1d 0x03>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x56>;
		};

		usb@5311400 {
			compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
			reg = <0x5311400 0x100>;
			interrupts = <0x00 0x1d 0x04>;
			clocks = <0x02 0x70 0x02 0x6b>;
			resets = <0x02 0x31>;
			phys = <0x1d 0x03>;
			phy-names = "usb";
			status = "okay";
			phandle = <0x57>;
		};

		hdmi@6000000 {
			compatible = "allwinner,sun50i-h6-dw-hdmi";
			reg = <0x6000000 0x10000>;
			reg-io-width = <0x01>;
			interrupts = <0x00 0x40 0x04>;
			clocks = <0x02 0x7e 0x02 0x7c 0x02 0x7b 0x02 0x7d 0x02 0x88 0x02 0x89>;
			clock-names = "iahb", "isfr", "tmds", "cec", "hdcp", "hdcp-bus";
			resets = <0x02 0x39 0x02 0x3e>;
			reset-names = "ctrl", "hdcp";
			phys = <0x1f>;
			phy-names = "phy";
			pinctrl-names = "default";
			pinctrl-0 = <0x20>;
			status = "okay";
			phandle = <0x58>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;
					phandle = <0x59>;

					endpoint {
						remote-endpoint = <0x21>;
						phandle = <0x26>;
					};
				};

				port@1 {
					reg = <0x01>;
					phandle = <0x5a>;

					endpoint {
						remote-endpoint = <0x22>;
						phandle = <0x31>;
					};
				};
			};
		};

		hdmi-phy@6010000 {
			compatible = "allwinner,sun50i-h6-hdmi-phy";
			reg = <0x6010000 0x10000>;
			clocks = <0x02 0x7e 0x02 0x7c>;
			clock-names = "bus", "mod";
			resets = <0x02 0x38>;
			reset-names = "phy";
			#phy-cells = <0x00>;
			phandle = <0x1f>;
		};

		tcon-top@6510000 {
			compatible = "allwinner,sun50i-h6-tcon-top";
			reg = <0x6510000 0x1000>;
			clocks = <0x02 0x7f 0x02 0x82>;
			clock-names = "bus", "tcon-tv0";
			clock-output-names = "tcon-top-tv0";
			resets = <0x02 0x3a>;
			#clock-cells = <0x01>;
			phandle = <0x27>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x5b>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0x23>;
						phandle = <0x0d>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x5c>;

					endpoint@2 {
						reg = <0x02>;
						remote-endpoint = <0x24>;
						phandle = <0x28>;
					};
				};

				port@4 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x04>;
					phandle = <0x5d>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0x25>;
						phandle = <0x29>;
					};
				};

				port@5 {
					reg = <0x05>;
					phandle = <0x5e>;

					endpoint {
						remote-endpoint = <0x26>;
						phandle = <0x21>;
					};
				};
			};
		};

		lcd-controller@6515000 {
			compatible = "allwinner,sun50i-h6-tcon-tv", "allwinner,sun8i-r40-tcon-tv";
			reg = <0x6515000 0x1000>;
			interrupts = <0x00 0x42 0x04>;
			clocks = <0x02 0x83 0x27 0x00>;
			clock-names = "ahb", "tcon-ch1";
			resets = <0x02 0x3c>;
			reset-names = "lcd";
			phandle = <0x5f>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;
					phandle = <0x60>;

					endpoint {
						remote-endpoint = <0x28>;
						phandle = <0x24>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x61>;

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0x29>;
						phandle = <0x25>;
					};
				};
			};
		};

		rtc@7000000 {
			compatible = "allwinner,sun50i-h6-rtc";
			reg = <0x7000000 0x400>;
			interrupts = <0x00 0x65 0x04 0x00 0x66 0x04>;
			clock-output-names = "osc32k", "osc32k-out", "iosc";
			#clock-cells = <0x01>;
			phandle = <0x10>;
		};

		clock@7010000 {
			compatible = "allwinner,sun50i-h6-r-ccu";
			reg = <0x7010000 0x400>;
			clocks = <0x0f 0x10 0x00 0x10 0x02 0x02 0x03>;
			clock-names = "hosc", "losc", "iosc", "pll-periph";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x2a>;
		};

		watchdog@7020400 {
			compatible = "allwinner,sun50i-h6-wdt", "allwinner,sun6i-a31-wdt";
			reg = <0x7020400 0x20>;
			interrupts = <0x00 0x67 0x04>;
			clocks = <0x0f>;
			phandle = <0x62>;
		};

		interrupt-controller@7021000 {
			compatible = "allwinner,sun50i-h6-r-intc", "allwinner,sun6i-a31-r-intc";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			reg = <0x7021000 0x400>;
			interrupts = <0x00 0x60 0x04>;
			phandle = <0x63>;
		};

		pinctrl@7022000 {
			compatible = "allwinner,sun50i-h6-r-pinctrl";
			reg = <0x7022000 0x400>;
			interrupts = <0x00 0x69 0x04 0x00 0x6f 0x04>;
			clocks = <0x2a 0x02 0x0f 0x10 0x00>;
			clock-names = "apb", "hosc", "losc";
			gpio-controller;
			#gpio-cells = <0x03>;
			interrupt-controller;
			#interrupt-cells = <0x03>;
			phandle = <0x64>;

			r-i2c-pins {
				pins = "PL0", "PL1";
				function = "s_i2c";
				phandle = <0x2c>;
			};

			r-ir-rx-pin {
				pins = "PL9";
				function = "s_cir_rx";
				phandle = <0x2b>;
			};
		};

		ir@7040000 {
			compatible = "allwinner,sun50i-h6-ir", "allwinner,sun6i-a31-ir";
			reg = <0x7040000 0x400>;
			interrupts = <0x00 0x6d 0x04>;
			clocks = <0x2a 0x09 0x2a 0x0b>;
			clock-names = "apb", "ir";
			resets = <0x2a 0x05>;
			pinctrl-names = "default";
			pinctrl-0 = <0x2b>;
			status = "okay";
			linux,rc-map-name = "rc-tanix-tx5max";
			phandle = <0x65>;
		};

		i2c@7081400 {
			compatible = "allwinner,sun50i-h6-i2c", "allwinner,sun6i-a31-i2c";
			reg = <0x7081400 0x400>;
			interrupts = <0x00 0x6b 0x04>;
			clocks = <0x2a 0x08>;
			resets = <0x2a 0x04>;
			pinctrl-names = "default";
			pinctrl-0 = <0x2c>;
			status = "disabled";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x66>;
		};

		thermal-sensor@5070400 {
			compatible = "allwinner,sun50i-h6-ths";
			reg = <0x5070400 0x100>;
			interrupts = <0x00 0x0f 0x04>;
			clocks = <0x02 0x59>;
			clock-names = "bus";
			resets = <0x02 0x24>;
			nvmem-cells = <0x2d>;
			nvmem-cell-names = "calibration";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x2e>;
		};
	};

	thermal-zones {

		cpu-thermal {
			polling-delay-passive = <0x00>;
			polling-delay = <0x00>;
			thermal-sensors = <0x2e 0x00>;

			trips {

				cpu-alert {
					temperature = <0x14c08>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x2f>;
				};

				cpu-crit {
					temperature = <0x186a0>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};

			cooling-maps {

				map0 {
					trip = <0x2f>;
					cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>;
				};
			};
		};

		gpu-thermal {
			polling-delay-passive = <0x00>;
			polling-delay = <0x00>;
			thermal-sensors = <0x2e 0x01>;
		};
	};

	opp-table-cpu {
		compatible = "allwinner,sun50i-h6-operating-points";
		nvmem-cells = <0x30>;
		opp-shared;
		phandle = <0x03>;

		opp@480000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x1c9c3800>;
			opp-microvolt-speed0 = <0xd6d80 0xd6d80 0x124f80>;
			opp-microvolt-speed1 = <0xc8320 0xc8320 0x124f80>;
			opp-microvolt-speed2 = <0xc8320 0xc8320 0x124f80>;
		};

		opp@720000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x2aea5400>;
			opp-microvolt-speed0 = <0xd6d80 0xd6d80 0x124f80>;
			opp-microvolt-speed1 = <0xc8320 0xc8320 0x124f80>;
			opp-microvolt-speed2 = <0xc8320 0xc8320 0x124f80>;
		};

		opp@816000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x30a32c00>;
			opp-microvolt-speed0 = <0xd6d80 0xd6d80 0x124f80>;
			opp-microvolt-speed1 = <0xc8320 0xc8320 0x124f80>;
			opp-microvolt-speed2 = <0xc8320 0xc8320 0x124f80>;
		};

		opp@888000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x34edce00>;
			opp-microvolt-speed0 = <0xd6d80 0xd6d80 0x124f80>;
			opp-microvolt-speed1 = <0xc8320 0xc8320 0x124f80>;
			opp-microvolt-speed2 = <0xc8320 0xc8320 0x124f80>;
		};

		opp@1080000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x405f7e00>;
			opp-microvolt-speed0 = <0xe57e0 0xe57e0 0x124f80>;
			opp-microvolt-speed1 = <0xd6d80 0xd6d80 0x124f80>;
			opp-microvolt-speed2 = <0xd6d80 0xd6d80 0x124f80>;
		};

		opp@1320000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x4ead9a00>;
			opp-microvolt-speed0 = <0xf4240 0xf4240 0x124f80>;
			opp-microvolt-speed1 = <0xe57e0 0xe57e0 0x124f80>;
			opp-microvolt-speed2 = <0xe57e0 0xe57e0 0x124f80>;
		};

		opp@1488000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x58b11400>;
			opp-microvolt-speed0 = <0x102ca0 0x102ca0 0x124f80>;
			opp-microvolt-speed1 = <0xf4240 0xf4240 0x124f80>;
			opp-microvolt-speed2 = <0xf4240 0xf4240 0x124f80>;
		};

		opp@1608000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x5fd82200>;
			opp-microvolt-speed0 = <0x10a1d0 0x10a1d0 0x124f80>;
			opp-microvolt-speed1 = <0xfb770 0xfb770 0x124f80>;
			opp-microvolt-speed2 = <0xfb770 0xfb770 0x124f80>;
		};

		opp@1704000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x6590fa00>;
			opp-microvolt-speed0 = <0x111700 0x111700 0x124f80>;
			opp-microvolt-speed1 = <0x102ca0 0x102ca0 0x124f80>;
			opp-microvolt-speed2 = <0x102ca0 0x102ca0 0x124f80>;
		};

		opp@1800000000 {
			clock-latency-ns = <0x3b9b0>;
			opp-hz = <0x00 0x6b49d200>;
			opp-microvolt-speed0 = <0x11b340 0x11b340 0x124f80>;
			opp-microvolt-speed1 = <0x10c8e0 0x10c8e0 0x124f80>;
			opp-microvolt-speed2 = <0x10c8e0 0x10c8e0 0x124f80>;
		};
	};

	aliases {
		serial0 = "/soc/serial@5000000";
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	connector {
		compatible = "hdmi-connector";
		ddc-en-gpios = <0x13 0x07 0x02 0x00>;
		type = "a";

		port {

			endpoint {
				remote-endpoint = <0x31>;
				phandle = <0x22>;
			};
		};
	};

	regulator-vcc3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		phandle = <0x12>;
	};

	regulator-vdd-cpu-gpu {
		compatible = "regulator-fixed";
		regulator-name = "vdd-cpu-gpu";
		regulator-min-microvolt = <0x115198>;
		regulator-max-microvolt = <0x115198>;
		phandle = <0x04>;
	};

	__symbols__ {
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@1";
		cpu2 = "/cpus/cpu@2";
		cpu3 = "/cpus/cpu@3";
		de = "/display-engine";
		osc24M = "/osc24M_clk";
		display_clocks = "/soc/bus@1000000/clock@0";
		mixer0 = "/soc/bus@1000000/mixer@100000";
		mixer0_out = "/soc/bus@1000000/mixer@100000/ports/port@1";
		mixer0_out_tcon_top_mixer0 = "/soc/bus@1000000/mixer@100000/ports/port@1/endpoint";
		gpu = "/soc/gpu@1800000";
		crypto = "/soc/crypto@1904000";
		syscon = "/soc/syscon@3000000";
		sram_c = "/soc/syscon@3000000/sram@28000";
		de2_sram = "/soc/syscon@3000000/sram@28000/sram-section@0";
		sram_c1 = "/soc/syscon@3000000/sram@1a00000";
		ve_sram = "/soc/syscon@3000000/sram@1a00000/sram-section@0";
		ccu = "/soc/clock@3001000";
		dma = "/soc/dma-controller@3002000";
		msgbox = "/soc/mailbox@3003000";
		sid = "/soc/efuse@3006000";
		ths_calibration = "/soc/efuse@3006000/thermal-sensor-calibration@14";
		cpu_speed_grade = "/soc/efuse@3006000/cpu-speed-grade@1c";
		watchdog = "/soc/watchdog@30090a0";
		pwm = "/soc/pwm@300a000";
		pio = "/soc/pinctrl@300b000";
		ext_rgmii_pins = "/soc/pinctrl@300b000/rgmii-pins";
		hdmi_pins = "/soc/pinctrl@300b000/hdmi-pins";
		i2c0_pins = "/soc/pinctrl@300b000/i2c0-pins";
		i2c1_pins = "/soc/pinctrl@300b000/i2c1-pins";
		i2c2_pins = "/soc/pinctrl@300b000/i2c2-pins";
		mmc0_pins = "/soc/pinctrl@300b000/mmc0-pins";
		mmc1_pins = "/soc/pinctrl@300b000/mmc1-pins";
		mmc2_pins = "/soc/pinctrl@300b000/mmc2-pins";
		spi0_pins = "/soc/pinctrl@300b000/spi0-pins";
		spi0_cs_pin = "/soc/pinctrl@300b000/spi0-cs-pin";
		spi1_pins = "/soc/pinctrl@300b000/spi1-pins";
		spi1_cs_pin = "/soc/pinctrl@300b000/spi1-cs-pin";
		spdif_tx_pin = "/soc/pinctrl@300b000/spdif-tx-pin";
		uart0_ph_pins = "/soc/pinctrl@300b000/uart0-ph-pins";
		uart1_pins = "/soc/pinctrl@300b000/uart1-pins";
		uart1_rts_cts_pins = "/soc/pinctrl@300b000/uart1-rts-cts-pins";
		gic = "/soc/interrupt-controller@3021000";
		iommu = "/soc/iommu@30f0000";
		mmc0 = "/soc/mmc@4020000";
		mmc1 = "/soc/mmc@4021000";
		mmc2 = "/soc/mmc@4022000";
		uart0 = "/soc/serial@5000000";
		uart1 = "/soc/serial@5000400";
		uart2 = "/soc/serial@5000800";
		uart3 = "/soc/serial@5000c00";
		i2c0 = "/soc/i2c@5002000";
		i2c1 = "/soc/i2c@5002400";
		i2c2 = "/soc/i2c@5002800";
		spi0 = "/soc/spi@5010000";
		spi1 = "/soc/spi@5011000";
		emac = "/soc/ethernet@5020000";
		mdio = "/soc/ethernet@5020000/mdio";
		spdif = "/soc/spdif@5093000";
		usb2otg = "/soc/usb@5100000";
		usb2phy = "/soc/phy@5100400";
		ehci0 = "/soc/usb@5101000";
		ohci0 = "/soc/usb@5101400";
		dwc3 = "/soc/dwc3@5200000";
		usb3phy = "/soc/phy@5210000";
		ehci3 = "/soc/usb@5311000";
		ohci3 = "/soc/usb@5311400";
		hdmi = "/soc/hdmi@6000000";
		hdmi_in = "/soc/hdmi@6000000/ports/port@0";
		hdmi_in_tcon_top = "/soc/hdmi@6000000/ports/port@0/endpoint";
		hdmi_out = "/soc/hdmi@6000000/ports/port@1";
		hdmi_out_con = "/soc/hdmi@6000000/ports/port@1/endpoint";
		hdmi_phy = "/soc/hdmi-phy@6010000";
		tcon_top = "/soc/tcon-top@6510000";
		tcon_top_mixer0_in = "/soc/tcon-top@6510000/ports/port@0";
		tcon_top_mixer0_in_mixer0 = "/soc/tcon-top@6510000/ports/port@0/endpoint@0";
		tcon_top_mixer0_out = "/soc/tcon-top@6510000/ports/port@1";
		tcon_top_mixer0_out_tcon_tv = "/soc/tcon-top@6510000/ports/port@1/endpoint@2";
		tcon_top_hdmi_in = "/soc/tcon-top@6510000/ports/port@4";
		tcon_top_hdmi_in_tcon_tv = "/soc/tcon-top@6510000/ports/port@4/endpoint@0";
		tcon_top_hdmi_out = "/soc/tcon-top@6510000/ports/port@5";
		tcon_top_hdmi_out_hdmi = "/soc/tcon-top@6510000/ports/port@5/endpoint";
		tcon_tv = "/soc/lcd-controller@6515000";
		tcon_tv_in = "/soc/lcd-controller@6515000/ports/port@0";
		tcon_tv_in_tcon_top_mixer0 = "/soc/lcd-controller@6515000/ports/port@0/endpoint";
		tcon_tv_out = "/soc/lcd-controller@6515000/ports/port@1";
		tcon_tv_out_tcon_top = "/soc/lcd-controller@6515000/ports/port@1/endpoint@1";
		rtc = "/soc/rtc@7000000";
		r_ccu = "/soc/clock@7010000";
		r_watchdog = "/soc/watchdog@7020400";
		r_intc = "/soc/interrupt-controller@7021000";
		r_pio = "/soc/pinctrl@7022000";
		r_i2c_pins = "/soc/pinctrl@7022000/r-i2c-pins";
		r_ir_rx_pin = "/soc/pinctrl@7022000/r-ir-rx-pin";
		r_ir = "/soc/ir@7040000";
		r_i2c = "/soc/i2c@7081400";
		ths = "/soc/thermal-sensor@5070400";
		cpu_alert = "/thermal-zones/cpu-thermal/trips/cpu-alert";
		cpu_opp_table = "/opp-table-cpu";
		hdmi_con_in = "/connector/port/endpoint";
		reg_vcc3v3 = "/regulator-vcc3v3";
		reg_vdd_cpu_gpu = "/regulator-vdd-cpu-gpu";
	};
};