// SPDX-License-Identifier: GPL-2.0-only // // rt5691.h -- RT5691 ALSA SoC audio component driver // // Copyright 2022 Realtek Semiconductor Corp. // Author: Oder Chiou // #ifndef __RT5691_H__ #define __RT5691_H__ #include #define RT5691_RESET 0x0000 #define RT5691_HP_AMP_CTRL_2 0x0003 #define RT5691_MONO_OUTPUT_CTRL 0x0004 #define RT5691_HP_AMP_L_GAIN_CTRL 0x0005 #define RT5691_HP_AMP_R_GAIN_CTRL 0x0006 #define RT5691_IN1_IN2_CTRL 0x000c #define RT5691_IN3_CTRL 0x000d #define RT5691_ZCD_CTRL 0x000f #define RT5691_JACK_TYPE_DET_CTRL_2 0x0011 #define RT5691_ST_MUX_CTRL 0x0024 #define RT5691_STO1_ADC_MIXER_CTRL 0x0026 #define RT5691_STO2_ADC_MIXER_CTRL 0x0027 #define RT5691_AD_DA_MIXER_CTRL 0x0029 #define RT5691_STO1_DAC_MIXER_CTRL 0x002a #define RT5691_MONO_DAC_VOL_CTRL 0x002b #define RT5691_FIFO_CTRL 0x0030 #define RT5691_PDM_OUTPUT_CTRL 0x0031 #define RT5691_HP_ANLG_OFFSET_CTRL_1 0x004b #define RT5691_HP_ANLG_OFFSET_CTRL_2 0x004c #define RT5691_HP_ANLG_OFFSET_CTRL_3 0x004d #define RT5691_MONO_ANLG_OFFSET_CTRL_1 0x0050 #define RT5691_MONO_ANLG_OFFSET_CTRL_2 0x0051 #define RT5691_DMIC_CTRL 0x0060 #define RT5691_PWR_DIG_1 0x0061 #define RT5691_PWR_DIG_2 0x0062 #define RT5691_PWR_ANLG_1 0x0063 #define RT5691_PWR_ANLG_2 0x0064 #define RT5691_JD2_CTRL_1 0x0065 #define RT5691_BGLDO33_CTRL_1 0x0066 #define RT5691_BGLDO33_CTRL_2 0x0067 #define RT5691_MCLK_DET_CTRL_1 0x006b #define RT5691_MCLK_DET_CTRL_2 0x006c #define RT5691_ANLG_LDO_CTRL_1 0x0080 #define RT5691_PLLA_CTRL_1 0x0081 #define RT5691_PLLA_CTRL_2 0x0082 #define RT5691_PLLA_CTRL_3 0x0083 #define RT5691_PLLA_CTRL_4 0x0084 #define RT5691_PLLB_CTRL_1 0x0085 #define RT5691_PLLB_CTRL_2 0x0086 #define RT5691_PLLB_CTRL_3 0x0087 #define RT5691_PLLB_CTRL_4 0x0088 #define RT5691_DEPOP_CTRL_1 0x008e #define RT5691_ANLG_BIAS_CTRL_1 0x008f #define RT5691_ANLG_BIAS_CTRL_2 0x0090 #define RT5691_HPOUT_CP_CTRL_1 0x0091 #define RT5691_HPOUT_CP_CTRL_2 0x0092 #define RT5691_OSC_CTRL_1 0x0094 #define RT5691_HP_CAL_CTRL_2 0x0095 #define RT5691_RC_CLK_CTRL 0x009f #define RT5691_IRQ_CTRL_1 0x00b6 #define RT5691_IRQ_CTRL_2 0x00b7 #define RT5691_IRQ_CTRL_3 0x00b8 #define RT5691_IRQ_CTRL_4 0x00b9 #define RT5691_IRQ_CTRL_5 0x00ba #define RT5691_IRQ_CTRL_6 0x00bb #define RT5691_INT_ST_1 0x00be #define RT5691_HP_AMP_DET_CTRL_1 0x00d0 #define RT5691_HP_AMP_DET_CTRL_2 0x00d1 #define RT5691_HP_AMP_DET_CTRL_3 0x00d2 #define RT5691_HP_AMP_DET_CTRL_4 0x00d3 #define RT5691_HP_AMP_DET_CTRL_5 0x00d4 #define RT5691_HP_AMP_DET_CTRL_6 0x00d5 #define RT5691_HP_AMP_DET_CTRL_7 0x00d6 #define RT5691_JACK_DETECT_CTRL_1 0x00f6 #define RT5691_DIG_MISC_CTRL 0x00fa #define RT5691_DUMMY_REGISTER_2 0x00fb #define RT5691_DUMMY_REGISTER_3 0x00fc #define RT5691_VENDOR_ID_2 0x00fd #define RT5691_VENDOR_ID_1 0x00fe #define RT5691_DEVICE_ID 0x00ff #define RT5691_ANLG_BST1_CTRL_1 0x0100 #define RT5691_ANLG_BST2_CTRL_2 0x0101 #define RT5691_ANLG_BST3_CTRL_3 0x0102 #define RT5691_ANLG_BIAS_CTRL_3 0x0105 #define RT5691_ANLG_BIAS_CTRL_4 0x0106 #define RT5691_ANLG_BIAS_CTRL_5 0x0107 #define RT5691_ANLG_BIAS_CTRL_6 0x0108 #define RT5691_ANLG_BIAS_CTRL_7 0x0109 #define RT5691_ANLG_BIAS_CTRL_8 0x010b #define RT5691_ANLG_BIAS_CTRL_9 0x010c #define RT5691_ANLG_BIAS_CTRL_10 0x010d #define RT5691_ANLG_BIAS_CTRL_11 0x010e #define RT5691_ANLG_BIAS_CTRL_12 0x010f #define RT5691_DACREF_CTRL_1 0x0110 #define RT5691_CALL_BUF_MIX_CTRL_1 0x0111 #define RT5691_CALR_BUF_MIX_CTRL_2 0x0112 #define RT5691_MONO_ANLG_DRE_CTRL_1 0x0117 #define RT5691_MONO_ANLG_DRE_CTRL_2 0x0118 #define RT5691_MONO_ANLG_DRE_CTRL_3 0x0119 #define RT5691_MONO_ANLG_DRE_CTRL_4 0x011a #define RT5691_ANLG_BIAS_CTRL_13 0x0125 #define RT5691_DACL_CTRL_1 0x013a #define RT5691_DACR_CTRL_2 0x013b #define RT5691_DACM_CTRL_3 0x013c #define RT5691_ADC12_CTRL 0x013d #define RT5691_ADC34_CTRL 0x013e #define RT5691_ADC56_CTRL 0x013f #define RT5691_TEST_MODE_CTRL 0x0145 #define RT5691_GPIO_TEST_MODE3 0x0146 #define RT5691_GPIO_TEST_MODE4 0x0147 #define RT5691_GPIO_TEST_MODE5 0x0148 #define RT5691_GPIO_TEST_MODE6 0x0149 #define RT5691_SIL_DET_CTRL8 0x0194 #define RT5691_SIL_DET_CTRL9 0x0198 #define RT5691_LPF_AD10 0x01a0 #define RT5691_LPF_DMIC11 0x01a1 #define RT5691_HP_IMP_SEN_DIG_CTRL 0x01cb #define RT5691_HP_IMP_SEN_DIG_CTRL_1 0x01cc #define RT5691_HP_IMP_SEN_DIG_CTRL_2 0x01cd #define RT5691_HP_IMP_SEN_DIG_CTRL_3 0x01ce #define RT5691_HP_IMP_SEN_DIG_CTRL_4 0x01cf #define RT5691_HP_IMP_SEN_DIG_CTRL_5 0x01d0 #define RT5691_HP_IMP_SEN_DIG_CTRL_6 0x01d1 #define RT5691_HP_IMP_SEN_DIG_CTRL_7 0x01d2 #define RT5691_HP_IMP_SEN_DIG_CTRL_8 0x01d3 #define RT5691_HP_IMP_SEN_DIG_CTRL_9 0x01d4 #define RT5691_HP_IMP_SEN_DIG_CTRL_10 0x01d5 #define RT5691_HP_BEHAVIOR_LOGIC_CTRL_2 0x01db #define RT5691_ANLG_READ_STA_324 0x01dd #define RT5691_I2C_SLAVE_CTRL25 0x01f0 #define RT5691_I2C_SLAVE_CTRL26 0x01f1 #define RT5691_DA_STO1_FILTER_CLK_DIV 0x0200 #define RT5691_AD_STO1_FILTER_CLK_DIV 0x0201 #define RT5691_CLK_SEL_RX_FIFO 0x0202 #define RT5691_CLK_SEL_STO_DAC_PDM_FIFO 0x0203 #define RT5691_SYS_CLK_SRC 0x0205 #define RT5691_ADC_AND_DAC_OSR 0x0206 #define RT5691_I2S_MASTER_CLK 0x0207 #define RT5691_MCLK_DET_CTRL_3 0x0208 #define RT5691_PWR_DA_PATH_1 0x0209 #define RT5691_PWR_DA_PATH_2 0x020a #define RT5691_PWR_AD_PATH 0x020b #define RT5691_AD_DA_ASRC 0x020c #define RT5691_PLL_CTRL_2 0x020d #define RT5691_I2S 0x020e #define RT5691_TRACKING_CTRL 0x020f #define RT5691_CLK_DIV_PDM 0x0210 #define RT5691_CLK_DIV_DMIC 0x0211 #define RT5691_EFUSE_CTRL 0x0212 #define RT5691_EN_SW_CTRL 0x0213 #define RT5691_GLITCH_FREE_MUX_CTRL 0x0214 #define RT5691_GPIO_CLK 0x0215 #define RT5691_RC_CLK 0x0216 #define RT5691_FRAC_I2S1_MASTER_CTRL_1 0x0217 #define RT5691_FRAC_I2S1_MASTER_CTRL_2 0x0218 #define RT5691_FRAC_I2S1_MASTER_CTRL_3 0x0219 #define RT5691_AD_CLK_GATING_FUNC_1 0x02fc #define RT5691_AD_CLK_GATING_FUNC_2 0x02fd #define RT5691_DA_CLK_GATING_FUNC_1 0x02fe #define RT5691_DA_CLK_GATING_FUNC_2 0x02ff #define RT5691_HP_IMP_FSOV_GAIN_CTRL_1 0x0300 #define RT5691_HP_IMP_FSOV_GAIN_CTRL_2 0x0301 #define RT5691_MULTI_FUNC_PIN_CTRL_1 0x0400 #define RT5691_GPIO_CTRL_1 0x0401 #define RT5691_GPIO_CTRL_3 0x0402 #define RT5691_GPIO_ST_1 0x0403 #define RT5691_GPIO_PULL_CTRL_1 0x0404 #define RT5691_PAD_DRIVING_CTRL_1 0x0405 #define RT5691_PAD_DRIVING_CTRL_5 0x0406 #define RT5691_PAD_DRIVING_CTRL_6 0x0407 #define RT5691_SCAN_CTRL_1 0x0500 #define RT5691_CLK_SRC_SW_TEST 0x0600 #define RT5691_MIC_BTN_CTRL_1 0x0700 #define RT5691_MIC_BTN_CTRL_2 0x0701 #define RT5691_MIC_BTN_CTRL_3 0x0702 #define RT5691_MIC_BTN_CTRL_4 0x0703 #define RT5691_MIC_BTN_CTRL_5 0x0704 #define RT5691_MIC_BTN_CTRL_6 0x0705 #define RT5691_MIC_BTN_CTRL_7 0x0706 #define RT5691_MIC_BTN_CTRL_8 0x0707 #define RT5691_MIC_BTN_CTRL_9 0x0708 #define RT5691_MIC_BTN_CTRL_10 0x0709 #define RT5691_MIC_BTN_CTRL_11 0x070a #define RT5691_MIC_BTN_CTRL_12 0x070b #define RT5691_MIC_BTN_CTRL_13 0x070c #define RT5691_MIC_BTN_CTRL_14 0x070d #define RT5691_MIC_BTN_CTRL_15 0x070e #define RT5691_MIC_BTN_CTRL_16 0x070f #define RT5691_MIC_BTN_CTRL_17 0x0710 #define RT5691_MIC_BTN_CTRL_18 0x0711 #define RT5691_MIC_BTN_CTRL_19 0x0712 #define RT5691_MIC_BTN_CTRL_20 0x0713 #define RT5691_MIC_BTN_CTRL_21 0x0714 #define RT5691_MIC_BTN_CTRL_22 0x0715 #define RT5691_MIC_BTN_CTRL_23 0x0716 #define RT5691_MIC_BTN_CTRL_24 0x0717 #define RT5691_MIC_BTN_CTRL_25 0x0718 #define RT5691_MIC_BTN_CTRL_26 0x0719 #define RT5691_MIC_BTN_CTRL_27 0x071a #define RT5691_MIC_BTN_CTRL_28 0x071b #define RT5691_DMIC_FLOATING_DET_CTRL_1 0x0b00 #define RT5691_PDM_CTRL_1 0x0c00 #define RT5691_ADC_FILTER_CTRL_1 0x0d00 #define RT5691_ADC_FILTER_CTRL_2 0x0d01 #define RT5691_ADC_FILTER_CTRL_3 0x0d02 #define RT5691_ADC_FILTER_CTRL_4 0x0d03 #define RT5691_ADC_FILTER_CTRL_5 0x0d04 #define RT5691_ADC_FILTER_CTRL_6 0x0d05 #define RT5691_ADC_FILTER_CTRL_7 0x0d06 #define RT5691_ADC_FILTER_CTRL_8 0x0d07 #define RT5691_ADC_FILTER_CTRL_9 0x0d08 #define RT5691_ADC_FILTER2_CTRL_1 0x0e00 #define RT5691_ADC_FILTER2_CTRL_2 0x0e01 #define RT5691_ADC_FILTER2_CTRL_3 0x0e02 #define RT5691_ADC_FILTER2_CTRL_4 0x0e03 #define RT5691_ADC_FILTER2_CTRL_5 0x0e04 #define RT5691_ADC_FILTER2_CTRL_6 0x0e05 #define RT5691_ADC_FILTER2_CTRL_7 0x0e06 #define RT5691_ADC_FILTER2_CTRL_8 0x0e07 #define RT5691_ADC_FILTER2_CTRL_9 0x0e08 #define RT5691_HARM_COMP_OP_1 0x0f00 #define RT5691_HARM_COMP_OP_2 0x0f01 #define RT5691_HARM_COMP_OP_3 0x0f02 #define RT5691_HARM_COMP_OP_4 0x0f03 #define RT5691_HARM_COMP_OP_5 0x0f04 #define RT5691_HARM_COMP_OP_6 0x0f05 #define RT5691_HARM_COMP_OP_7 0x0f06 #define RT5691_HARM_COMP_OP_8 0x0f07 #define RT5691_HARM_COMP_OP_9 0x0f08 #define RT5691_HARM_COMP_OP_10 0x0f09 #define RT5691_HARM_COMP_OP_11 0x0f0a #define RT5691_HARM_COMP_OP_12 0x0f0b #define RT5691_HARM_COMP_OP_13 0x0f0c #define RT5691_HARM_COMP_OP_14 0x0f11 #define RT5691_HARM_COMP_OP_15 0x0f12 #define RT5691_HARM_COMP_OP_16 0x0f13 #define RT5691_HARM_COMP_OP_17 0x0f14 #define RT5691_HARM_COMP_OP_18 0x0f15 #define RT5691_HARM_COMP_OP_19 0x0f16 #define RT5691_HARM_COMP_OP_20 0x0f17 #define RT5691_HARM_COMP_OP_21 0x0f18 #define RT5691_HARM_COMP_OP_22 0x0f19 #define RT5691_HARM_COMP_OP_23 0x0f1a #define RT5691_HARM_COMP_OP_24 0x0f1b #define RT5691_HARM_COMP_OP_25 0x0f1c #define RT5691_DAC_BI_FILTER_CTRL_1 0x1000 #define RT5691_DAC_BI_FILTER_CTRL_2 0x1010 #define RT5691_DAC_BI_FILTER_CTRL_3 0x1011 #define RT5691_DAC_BI_FILTER_CTRL_4 0x1020 #define RT5691_DAC_BI_FILTER_CTRL_5 0x1021 #define RT5691_DAC_BI_FILTER_CTRL_6 0x1022 #define RT5691_DAC_BI_FILTER_CTRL_7 0x1023 #define RT5691_DAC_BI_FILTER_CTRL_8 0x1024 #define RT5691_DAC_BI_FILTER_CTRL_9 0x1025 #define RT5691_DAC_BI_FILTER_CTRL_10 0x1026 #define RT5691_DAC_BI_FILTER_CTRL_11 0x1027 #define RT5691_DAC_BI_FILTER_CTRL_12 0x1028 #define RT5691_DAC_BI_FILTER_CTRL_13 0x1029 #define RT5691_DAC_BI_FILTER_CTRL_14 0x1030 #define RT5691_DAC_BI_FILTER_CTRL_15 0x1031 #define RT5691_DAC_BI_FILTER_CTRL_16 0x1032 #define RT5691_DAC_BI_FILTER_CTRL_17 0x1033 #define RT5691_DAC_BI_FILTER_CTRL_18 0x1034 #define RT5691_DAC_BI_FILTER_CTRL_19 0x1035 #define RT5691_DAC_BI_FILTER_CTRL_20 0x1036 #define RT5691_DAC_BI_FILTER_CTRL_21 0x1037 #define RT5691_DAC_BI_FILTER_CTRL_22 0x1038 #define RT5691_DAC_BI_FILTER_CTRL_23 0x1039 #define RT5691_ALC_PGA_TOP_1 0x1100 #define RT5691_ALC_PGA_TOP_2 0x1101 #define RT5691_ALC_PGA_TOP_3 0x1102 #define RT5691_ALC_PGA_TOP_4 0x1103 #define RT5691_ALC_PGA_TOP_5 0x1104 #define RT5691_ALC_PGA_TOP_6 0x1105 #define RT5691_ALC_PGA_TOP_7 0x1106 #define RT5691_ALC_PGA_TOP_8 0x1107 #define RT5691_ALC_PGA_TOP_9 0x1108 #define RT5691_ALC_PGA_TOP_10 0x1109 #define RT5691_ALC_PGA_TOP_11 0x110a #define RT5691_DAC_EQ_CTRL_1 0x1200 #define RT5691_DAC_EQ_CTRL_2 0x1201 #define RT5691_DAC_EQ_CTRL_3 0x1202 #define RT5691_DAC_EQ_CTRL_4 0x1210 #define RT5691_DAC_EQ_CTRL_5 0x1211 #define RT5691_DAC_EQ_CTRL_6 0x1212 #define RT5691_DAC_EQ_CTRL_7 0x1213 #define RT5691_DAC_EQ_CTRL_8 0x1214 #define RT5691_DAC_EQ_CTRL_9 0x1215 #define RT5691_DAC_EQ_CTRL_10 0x1216 #define RT5691_DAC_EQ_CTRL_11 0x1217 #define RT5691_DAC_EQ_CTRL_12 0x1218 #define RT5691_DAC_EQ_CTRL_13 0x1219 #define RT5691_DAC_EQ_CTRL_14 0x1220 #define RT5691_DAC_EQ_CTRL_15 0x1221 #define RT5691_DAC_EQ_CTRL_16 0x1222 #define RT5691_DAC_EQ_CTRL_17 0x1223 #define RT5691_DAC_EQ_CTRL_18 0x1224 #define RT5691_DAC_EQ_CTRL_19 0x1225 #define RT5691_DAC_EQ_CTRL_20 0x1226 #define RT5691_DAC_EQ_CTRL_21 0x1227 #define RT5691_DAC_EQ_CTRL_22 0x1230 #define RT5691_DAC_EQ_CTRL_23 0x1231 #define RT5691_DAC_EQ_CTRL_24 0x1232 #define RT5691_DAC_EQ_CTRL_25 0x1233 #define RT5691_DAC_EQ_CTRL_26 0x1234 #define RT5691_DAC_EQ_CTRL_27 0x1235 #define RT5691_DAC_EQ_CTRL_28 0x1240 #define RT5691_DAC_EQ_CTRL_29 0x1241 #define RT5691_DAC_EQ_CTRL_30 0x1242 #define RT5691_DAC_EQ_CTRL_31 0x1243 #define RT5691_DAC_EQ_CTRL_32 0x1244 #define RT5691_DAC_EQ_CTRL_33 0x1245 #define RT5691_DAC_EQ_CTRL_34 0x1250 #define RT5691_DAC_EQ_CTRL_35 0x1251 #define RT5691_DAC_EQ_CTRL_36 0x1252 #define RT5691_DAC_EQ_CTRL_37 0x1253 #define RT5691_DAC_EQ_CTRL_38 0x1254 #define RT5691_DAC_EQ_CTRL_39 0x1255 #define RT5691_DAC_EQ_CTRL_40 0x1260 #define RT5691_DAC_EQ_CTRL_41 0x1261 #define RT5691_DAC_EQ_CTRL_42 0x1262 #define RT5691_DAC_EQ_CTRL_43 0x1263 #define RT5691_ALC_CTRL_1 0x1300 #define RT5691_ALC_CTRL_2 0x1302 #define RT5691_ALC_CTRL_3 0x1304 #define RT5691_ALC_CTRL_4 0x1306 #define RT5691_ALC_CTRL_5 0x1308 #define RT5691_ALC_CTRL_6 0x130a #define RT5691_ALC_CTRL_7 0x130c #define RT5691_ALC_CTRL_8 0x130e #define RT5691_ALC_CTRL_9 0x1320 #define RT5691_ALC_CTRL_10 0x1322 #define RT5691_ALC_CTRL_11 0x1324 #define RT5691_ALC_CTRL_12 0x1326 #define RT5691_ALC_CTRL_13 0x1328 #define RT5691_ALC_CTRL_14 0x132a #define RT5691_ALC_CTRL_15 0x132c #define RT5691_ALC_CTRL_16 0x132e #define RT5691_EQ_ALC_SRC_CTRL 0x1400 #define RT5691_DA_DVOL_MONO_1 0x1700 #define RT5691_DA_DVOL_MONO_2 0x1701 #define RT5691_DA_DVOL_MONO_3 0x1702 #define RT5691_DA_DVOL_MONO_4 0x1703 #define RT5691_DA_DVOL_STO_1 0x1800 #define RT5691_DA_DVOL_STO_2 0x1801 #define RT5691_DA_DVOL_STO_3 0x1802 #define RT5691_DA_DVOL_STO_4 0x1803 #define RT5691_SIL_DET_MONO_TOP 0x1900 #define RT5691_SIL_DET_TOP 0x1a00 #define RT5691_SIL_DET_TOP_1 0x1b00 #define RT5691_SIL_DET_TOP_2 0x1b01 #define RT5691_SIL_DET_TOP_3 0x1b02 #define RT5691_SIL_DET_TOP_4 0x1b03 #define RT5691_SIL_DET_TOP_5 0x1b04 #define RT5691_SIL_DET_TOP_6 0x1b05 #define RT5691_SIL_DET_TOP_7 0x1b06 #define RT5691_SIL_DET_TOP_8 0x1b07 #define RT5691_ASRCIN_TCON_1 0x2000 #define RT5691_ASRCIN_TCON_2 0x2001 #define RT5691_ASRCIN_TCON_3 0x2002 #define RT5691_I2S_CTRL_1 0x2400 #define RT5691_COMBO_JACK_CTRL_1 0x2b00 #define RT5691_COMBO_JACK_CTRL_2 0x2b01 #define RT5691_COMBO_JACK_CTRL_3 0x2b02 #define RT5691_COMBO_JACK_CTRL_4 0x2b03 #define RT5691_COMBO_JACK_CTRL_5 0x2b04 #define RT5691_COMBO_JACK_CTRL_6 0x2b05 #define RT5691_COMBO_JACK_CTRL_7 0x2b06 #define RT5691_COMBO_JACK_CTRL_8 0x2b07 #define RT5691_COMBO_JACK_CTRL_9 0x2b08 #define RT5691_COMBO_JACK_CTRL_10 0x2b09 #define RT5691_COMBO_JACK_CTRL_11 0x2b0a #define RT5691_COMBO_JACK_CTRL_12 0x2b0b #define RT5691_COMBO_JACK_CTRL_13 0x2b0c #define RT5691_COMBO_JACK_CTRL_14 0x2b0d #define RT5691_COMBO_JACK_CTRL_15 0x2b0e #define RT5691_COMBO_JACK_CTRL_16 0x2b10 #define RT5691_COMBO_JACK_CTRL_17 0x2b11 #define RT5691_COMBO_JACK_CTRL_18 0x2b12 #define RT5691_COMBO_JACK_CTRL_19 0x2b13 #define RT5691_COMBO_JACK_CTRL_20 0x2b14 #define RT5691_COMBO_JACK_CTRL_21 0x2b15 #define RT5691_COMBO_JACK_CTRL_22 0x2b16 #define RT5691_COMBO_JACK_CTRL_23 0x2b17 #define RT5691_IMP_SENS_CTRL_1 0x2c00 #define RT5691_IMP_SENS_CTRL_2 0x2c01 #define RT5691_IMP_SENS_CTRL_3 0x2c02 #define RT5691_IMP_SENS_CTRL_4 0x2c03 #define RT5691_IMP_SENS_CTRL_5 0x2c04 #define RT5691_IMP_SENS_CTRL_6 0x2c05 #define RT5691_IMP_SENS_CTRL_7 0x2c06 #define RT5691_IMP_SENS_CTRL_8 0x2c07 #define RT5691_IMP_SENS_CTRL_9 0x2c08 #define RT5691_IMP_SENS_CTRL_10 0x2c09 #define RT5691_IMP_SENS_CTRL_11 0x2c0a #define RT5691_IMP_SENS_CTRL_12 0x2c0b #define RT5691_IMP_SENS_CTRL_13 0x2c0c #define RT5691_IMP_SENS_CTRL_14 0x2c0d #define RT5691_IMP_SENS_CTRL_15 0x2c0e #define RT5691_IMP_SENS_CTRL_16 0x2c0f #define RT5691_IMP_SENS_CTRL_17 0x2c10 #define RT5691_IMP_SENS_CTRL_18 0x2c11 #define RT5691_IMP_SENS_CTRL_19 0x2c12 #define RT5691_IMP_SENS_CTRL_20 0x2c13 #define RT5691_IMP_SENS_CTRL_21 0x2c14 #define RT5691_IMP_SENS_CTRL_22 0x2c15 #define RT5691_IMP_SENS_CTRL_23 0x2c16 #define RT5691_IMP_SENS_CTRL_24 0x2c17 #define RT5691_IMP_SENS_CTRL_25 0x2c18 #define RT5691_IMP_SENS_CTRL_26 0x2c19 #define RT5691_IMP_SENS_CTRL_27 0x2c1a #define RT5691_IMP_SENS_CTRL_28 0x2c1b #define RT5691_IMP_SENS_CTRL_29 0x2c1c #define RT5691_IMP_SENS_CTRL_30 0x2c1d #define RT5691_IMP_SENS_CTRL_31 0x2c1e #define RT5691_HP_IMP_SEN_DIG_CTRL_11 0x2d00 #define RT5691_HP_IMP_SEN_DIG_CTRL_12 0x2d01 #define RT5691_HP_IMP_SEN_DIG_CTRL_13 0x2d02 #define RT5691_COMBO_JACK_CTRL 0x2f00 #define RT5691_MONO_DRE_CTRL_1 0x3000 #define RT5691_MONO_DRE_CTRL_2 0x3001 #define RT5691_MONO_DRE_CTRL_3 0x3002 #define RT5691_MONO_DRE_CTRL_4 0x3003 #define RT5691_MONO_DRE_CTRL_5 0x3004 #define RT5691_MONO_DRE_CTRL_6 0x3005 #define RT5691_MONO_DRE_CTRL_7 0x3006 #define RT5691_MONO_DRE_CTRL_8 0x3007 #define RT5691_MONO_DRE_CTRL_9 0x3008 #define RT5691_MONO_DRE_CTRL_10 0x300a #define RT5691_STO_DRE_CTRL_1 0x3100 #define RT5691_STO_DRE_CTRL_2 0x3101 #define RT5691_STO_DRE_CTRL_3 0x3102 #define RT5691_STO_DRE_CTRL_4 0x3103 #define RT5691_STO_DRE_CTRL_5 0x3104 #define RT5691_STO_DRE_CTRL_6 0x3105 #define RT5691_STO_DRE_CTRL_7 0x3106 #define RT5691_STO_DRE_CTRL_8 0x3107 #define RT5691_STO_DRE_CTRL_9 0x3108 #define RT5691_STO_DEBOUNCE_CTRL_9 0x3109 #define RT5691_WATER_DET_CTRL_1 0x3200 #define RT5691_WATER_DET_CTRL_2 0x3201 #define RT5691_WATER_DET_CTRL_3 0x3202 #define RT5691_WATER_DET_CTRL_4 0x3203 #define RT5691_COMBO_WATER_CTRL_1 0x3204 #define RT5691_COMBO_WATER_CTRL_2 0x3205 #define RT5691_COMBO_WATER_CTRL_3 0x3206 #define RT5691_COMBO_WATER_CTRL_4 0x3207 #define RT5691_COMBO_WATER_CTRL_5 0x3208 #define RT5691_COMBO_WATER_CTRL_6 0x3209 #define RT5691_COMBO_WATER_CTRL_7 0x320a #define RT5691_SAR_ADC_DET_CTRL_6 0x320b #define RT5691_SAR_ADC_DET_CTRL_7 0x320c #define RT5691_SAR_ADC_DET_CTRL_1 0x3300 #define RT5691_SAR_ADC_DET_CTRL_2 0x3301 #define RT5691_SAR_ADC_DET_CTRL_3 0x3302 #define RT5691_SAR_ADC_DET_CTRL_4 0x3303 #define RT5691_SAR_ADC_DET_CTRL_5 0x3304 #define RT5691_SAR_ADC_DET_CTRL_9 0x3308 #define RT5691_SAR_ADC_DET_CTRL_10 0x3309 #define RT5691_SAR_ADC_DET_CTRL_11 0x330a #define RT5691_SAR_ADC_DET_CTRL_12 0x330b #define RT5691_SAR_ADC_DET_CTRL_13 0x330c #define RT5691_SAR_ADC_DET_CTRL_14 0x330d #define RT5691_SAR_ADC_DET_CTRL_15 0x330e #define RT5691_SAR_ADC_DET_CTRL_16 0x330f #define RT5691_SAR_ADC_DET_CTRL_17 0x3310 #define RT5691_SAR_ADC_DET_CTRL_18 0x3311 #define RT5691_SAR_ADC_DET_CTRL_19 0x3312 #define RT5691_SAR_ADC_DET_CTRL_20 0x3313 #define RT5691_SAR_ADC_DET_CTRL_21 0x3314 #define RT5691_SAR_ADC_DET_CTRL_22 0x3315 #define RT5691_SAR_ADC_DET_CTRL_23 0x3316 #define RT5691_SAR_ADC_DET_CTRL_24 0x3317 #define RT5691_EFUSE_WRITE_1 0x3400 #define RT5691_EFUSE_WRITE_2 0x3404 #define RT5691_EFUSE_WRITE_3 0x3405 #define RT5691_EFUSE_WRITE_4 0x3406 #define RT5691_EFUSE_WRITE_5 0x3407 #define RT5691_EFUSE_WRITE_6 0x3408 #define RT5691_EFUSE_WRITE_7 0x3409 #define RT5691_EFUSE_WRITE_8 0x340a #define RT5691_EFUSE_WRITE_9 0x340b #define RT5691_EFUSE_WRITE_10 0x340c #define RT5691_EFUSE_WRITE_11 0x340d #define RT5691_EFUSE_WRITE_12 0x340e #define RT5691_EFUSE_WRITE_13 0x340f #define RT5691_EFUSE_WRITE_14 0x3410 #define RT5691_EFUSE_WRITE_15 0x3411 #define RT5691_EFUSE_WRITE_16 0x3412 #define RT5691_EFUSE_WRITE_17 0x3413 #define RT5691_EFUSE_WRITE_18 0x3414 #define RT5691_EFUSE_WRITE_19 0x3415 #define RT5691_EFUSE_READ_1 0x3424 #define RT5691_EFUSE_READ_2 0x3425 #define RT5691_EFUSE_READ_3 0x3426 #define RT5691_EFUSE_READ_4 0x3427 #define RT5691_EFUSE_READ_5 0x3428 #define RT5691_EFUSE_READ_6 0x3429 #define RT5691_EFUSE_READ_7 0x342a #define RT5691_EFUSE_READ_8 0x342b #define RT5691_EFUSE_READ_9 0x342c #define RT5691_EFUSE_READ_10 0x342d #define RT5691_EFUSE_READ_11 0x342e #define RT5691_EFUSE_READ_12 0x342f #define RT5691_EFUSE_READ_13 0x3430 #define RT5691_EFUSE_READ_14 0x3431 #define RT5691_EFUSE_READ_15 0x3432 #define RT5691_EFUSE_READ_16 0x3433 #define RT5691_EFUSE_READ_17 0x3434 #define RT5691_EFUSE_READ_18 0x3435 #define RT5691_EFUSE_READ_19 0x3440 #define RT5691_EFUSE_READ_20 0x3441 #define RT5691_OFFSET_CAL_1 0x3800 #define RT5691_OFFSET_CAL_2 0x3801 #define RT5691_HP_AMP_DET_CTRL_8 0x3802 #define RT5691_HP_AMP_DET_CTRL_9 0x3803 #define RT5691_HP_AMP_DET_CTRL_10 0x3804 #define RT5691_HP_AMP_DET_CTRL_11 0x3805 #define RT5691_HP_AMP_DET_CTRL_12 0x3806 #define RT5691_HP_AMP_DET_CTRL_13 0x3807 #define RT5691_OFFSET_CAL_TOP_9 0x3808 #define RT5691_OFFSET_CAL_TOP_10 0x3809 #define RT5691_OFFSET_CAL_TOP_11 0x380a #define RT5691_OFFSET_CAL_TOP_12 0x380b #define RT5691_OFFSET_CAL_TOP_13 0x380c #define RT5691_OFFSET_CAL_TOP_14 0x380d #define RT5691_OFFSET_CAL_TOP_15 0x380e #define RT5691_OFFSET_CAL_TOP_16 0x3810 #define RT5691_OFFSET_CAL_TOP_17 0x3811 #define RT5691_OFFSET_CAL_18 0x3812 #define RT5691_OFFSET_CAL_19 0x3813 #define RT5691_OFFSET_CAL_20 0x3814 #define RT5691_OFFSET_CAL_21 0x3815 #define RT5691_OFFSET_CAL_22 0x3816 #define RT5691_OFFSET_CAL_23 0x3817 #define RT5691_OFFSET_CAL_24 0x3818 #define RT5691_OFFSET_CAL_25 0x3820 #define RT5691_OFFSET_CAL_26 0x3821 #define RT5691_OFFSET_CAL_27 0x3822 #define RT5691_OFFSET_CAL_28 0x3824 #define RT5691_OFFSET_CAL_29 0x3825 #define RT5691_OFFSET_CAL_30 0x3827 #define RT5691_OFFSET_CAL_31 0x3828 #define RT5691_OFFSET_CAL_32 0x382b #define RT5691_OFFSET_CAL_33 0x382c #define RT5691_HP_AMP_DET_CTRL_14 0x3b00 #define RT5691_HP_AMP_DET_CTRL_15 0x3b01 #define RT5691_HP_AMP_DET_CTRL_16 0x3b02 #define RT5691_HP_AMP_DET_CTRL_17 0x3b03 #define RT5691_HP_AMP_DET_CTRL_18 0x3c00 #define RT5691_HP_AMP_DET_CTRL_19 0x3c01 #define RT5691_HP_AMP_DET_CTRL_20 0x3c02 /* global definition */ #define RT5691_L_MUTE (0x1 << 15) #define RT5691_L_MUTE_SFT 15 #define RT5691_VOL_L_MUTE (0x1 << 14) #define RT5691_VOL_L_SFT 14 #define RT5691_R_MUTE (0x1 << 7) #define RT5691_R_MUTE_SFT 7 #define RT5691_VOL_R_MUTE (0x1 << 6) #define RT5691_VOL_R_SFT 6 #define RT5691_L_VOL_MASK (0x3f << 8) #define RT5691_L_VOL_SFT 8 #define RT5691_R_VOL_MASK (0x3f) #define RT5691_R_VOL_SFT 0 /* 0x0005 0x0006 */ #define RT5691_G_HP (0xf << 8) #define RT5691_G_HP_SFT 8 #define RT5691_G_STO_DA_DMIX (0xf) #define RT5691_G_STO_DA_SFT 0 /* 0x000c */ #define RT5691_IN1_DF_MASK (0x1 << 15) #define RT5691_IN1_DF 15 #define RT5691_BST1_MASK (0x7f << 8) #define RT5691_BST1_SFT 8 #define RT5691_IN2_DF_MASK (0x1 << 7) #define RT5691_IN2_DF 7 #define RT5691_BST2_MASK (0x7f) #define RT5691_BST2_SFT 0 /* 0x000d */ #define RT5691_IN3_DF_MASK (0x1 << 15) #define RT5691_IN3_DF 15 #define RT5691_BST3_MASK (0x7f << 8) #define RT5691_BST3_SFT 8 /* 0x0029 */ #define RT5691_M_ADCMIX_L (0x1 << 15) #define RT5691_M_ADCMIX_L_SFT 15 #define RT5691_M_DAC1_L (0x1 << 14) #define RT5691_M_DAC1_L_SFT 14 #define RT5691_M_ADCMIX_R (0x1 << 7) #define RT5691_M_ADCMIX_R_SFT 7 #define RT5691_M_DAC1_R (0x1 << 6) #define RT5691_M_DAC1_R_SFT 6 /* 0x002b */ #define RT5691_M_DAC2_L (0x1 << 15) #define RT5691_M_DAC2_L_SFT 15 #define RT5691_V_DAC2_L_MASK (0xff) #define RT5691_V_DAC2_L_SFT 0 /* 0x0063 */ #define RT5691_PWR_VREF1 (0x1 << 15) #define RT5691_PWR_VREF1_BIT 15 #define RT5691_PWR_FV1 (0x1 << 14) #define RT5691_PWR_FV1_BIT 14 #define RT5691_PWR_VREF2 (0x1 << 13) #define RT5691_PWR_VREF2_BIT 13 #define RT5691_PWR_FV2 (0x1 << 12) #define RT5691_PWR_FV2_BIT 12 #define RT5691_PWR_VREF3 (0x1 << 11) #define RT5691_PWR_VREF3_BIT 11 #define RT5691_PWR_FV3 (0x1 << 10) #define RT5691_PWR_FV3_BIT 10 #define RT5691_PWR_MB (0x1 << 9) #define RT5691_PWR_MB_BIT 9 #define RT5691_PWR_BG (0x1 << 7) #define RT5691_PWR_BG_BIT 7 #define RT5691_PWR_MA (0x1 << 6) #define RT5691_PWR_MA_BIT 6 /* 0x0064 */ #define RT5691_PWR_BST1 (0x1 << 15) #define RT5691_PWR_BST1_BIT 15 #define RT5691_PWR_BST2 (0x1 << 14) #define RT5691_PWR_BST2_BIT 14 #define RT5691_PWR_BST3 (0x1 << 13) #define RT5691_PWR_BST3_BIT 13 #define RT5691_PWR_MB1 (0x1 << 11) #define RT5691_PWR_MB1_BIT 11 #define RT5691_PWR_MB2 (0x1 << 10) #define RT5691_PWR_MB2_BIT 10 #define RT5691_PWR_MB3 (0x1 << 9) #define RT5691_PWR_MB3_BIT 9 /* 0x071a 0x071b */ #define RT5691_V_DAC1_MASK (0xff) #define RT5691_V_DAC1_SFT 0 #define RT5691_PLL_INP_MAX 40000000 #define RT5691_PLL_INP_MIN 256000 #define RT5691_PLL_N_MAX 0x1ff #define RT5691_PLL_K_MAX 0x1f #define RT5691_PLL_M_MAX 0x1f /* System Clock Source */ enum { RT5691_SCLK_S_MCLK, RT5691_SCLK_S_PLL1, RT5691_SCLK_S_PLL2, RT5691_SCLK_S_RCCLK, }; /* PLL1 Source */ enum { RT5691_PLL1_S_MCLK, RT5691_PLL1_S_BCLK, }; struct rt5691_i2c_err { void *i2c_err_priv; int (*i2c_err_cb)(void *context); }; struct rt5691_priv { struct snd_soc_component *component; struct rt5691_platform_data pdata; struct regmap *regmap, *i2c_regmap; struct snd_soc_jack *hs_jack; struct rt5691_i2c_err *i2c_err; struct delayed_work jack_detect_work, calibrate_work, mic_check_work; struct delayed_work sto1_l_adc_work, sto1_r_adc_work; struct delayed_work sto2_l_adc_work, sto2_r_adc_work; int sysclk; int sysclk_src; int lrck; int bclk; int master; int pll_src; int pll_in; int pll_out; int jack_type; int irq; int irq_work_delay; int imp_value; int imp_gain; bool wt_en; bool open_gender; bool disable_ng2; bool is_suspend; bool mic_check_break; bool rek; unsigned long rek_timeout; bool cal_done; unsigned int adb_reg_addr[0x40]; unsigned int adb_reg_value[0x40]; unsigned short adb_reg_num; int dump_reg; unsigned int adc_val; int btn_det; unsigned long button_timeout; }; struct rt5691_pll_calc_map { bool use_pllb; unsigned int pll_in; unsigned int pll_out; int plla_k; int plla_n; int plla_m; bool plla_m_bp; bool plla_k_bp; int pllb_k; int pllb_n; int pllb_m; bool pllb_m_bp; bool pllb_k_bp; int pllb_pulse; }; struct rt5691_pll_code { bool use_pllb; int plla_k_code; int plla_n_code; int plla_m_code; bool plla_m_bp; bool plla_k_bp; int pllb_k_code; int pllb_n_code; int pllb_m_code; bool pllb_m_bp; bool pllb_k_bp; bool pllb_pulse; }; #endif /* __RT5691_H__ */