/dts-v1/;

/ {
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "Qualcomm Technologies, Inc. Robotics RB5";
	compatible = "qcom,qrb5165-rb5\0qcom,sm8250";

	aliases {
		i2c0 = "/soc@0/geniqup@9c0000/i2c@980000";
		i2c1 = "/soc@0/geniqup@9c0000/i2c@984000";
		i2c2 = "/soc@0/geniqup@9c0000/i2c@988000";
		i2c3 = "/soc@0/geniqup@9c0000/i2c@98c000";
		i2c4 = "/soc@0/geniqup@9c0000/i2c@990000";
		i2c5 = "/soc@0/geniqup@9c0000/i2c@994000";
		i2c6 = "/soc@0/geniqup@9c0000/i2c@998000";
		i2c7 = "/soc@0/geniqup@9c0000/i2c@99c000";
		i2c8 = "/soc@0/geniqup@ac0000/i2c@a80000";
		i2c9 = "/soc@0/geniqup@ac0000/i2c@a84000";
		i2c10 = "/soc@0/geniqup@ac0000/i2c@a88000";
		i2c11 = "/soc@0/geniqup@ac0000/i2c@a8c000";
		i2c12 = "/soc@0/geniqup@ac0000/i2c@a90000";
		i2c13 = "/soc@0/geniqup@ac0000/i2c@a94000";
		i2c14 = "/soc@0/geniqup@8c0000/i2c@880000";
		i2c15 = "/soc@0/geniqup@8c0000/i2c@884000";
		i2c16 = "/soc@0/geniqup@8c0000/i2c@888000";
		i2c17 = "/soc@0/geniqup@8c0000/i2c@88c000";
		i2c18 = "/soc@0/geniqup@8c0000/i2c@890000";
		i2c19 = "/soc@0/geniqup@8c0000/i2c@894000";
		spi0 = "/soc@0/geniqup@9c0000/spi@980000";
		spi1 = "/soc@0/geniqup@9c0000/spi@984000";
		spi2 = "/soc@0/geniqup@9c0000/spi@988000";
		spi3 = "/soc@0/geniqup@9c0000/spi@98c000";
		spi4 = "/soc@0/geniqup@9c0000/spi@990000";
		spi5 = "/soc@0/geniqup@9c0000/spi@994000";
		spi6 = "/soc@0/geniqup@9c0000/spi@998000";
		spi7 = "/soc@0/geniqup@9c0000/spi@99c000";
		spi8 = "/soc@0/geniqup@ac0000/spi@a80000";
		spi9 = "/soc@0/geniqup@ac0000/spi@a84000";
		spi10 = "/soc@0/geniqup@ac0000/spi@a88000";
		spi11 = "/soc@0/geniqup@ac0000/spi@a8c000";
		spi12 = "/soc@0/geniqup@ac0000/spi@a90000";
		spi13 = "/soc@0/geniqup@ac0000/spi@a94000";
		spi14 = "/soc@0/geniqup@8c0000/spi@880000";
		spi15 = "/soc@0/geniqup@8c0000/spi@884000";
		spi16 = "/soc@0/geniqup@8c0000/spi@888000";
		spi17 = "/soc@0/geniqup@8c0000/spi@88c000";
		spi18 = "/soc@0/geniqup@8c0000/spi@890000";
		spi19 = "/soc@0/geniqup@8c0000/spi@894000";
		serial0 = "/soc@0/geniqup@ac0000/serial@a90000";
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	clocks {

		xo-board {
			compatible = "fixed-clock";
			#clock-cells = <0x00>;
			clock-frequency = <0x249f000>;
			clock-output-names = "xo_board";
			phandle = <0x61>;
		};

		sleep-clk {
			compatible = "fixed-clock";
			clock-frequency = <0x8000>;
			#clock-cells = <0x00>;
			phandle = <0x10>;
		};
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x00>;
			enable-method = "psci";
			next-level-cache = <0x02>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x6a>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x02>;

				l3-cache {
					compatible = "cache";
					phandle = <0x04>;
				};
			};
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x100>;
			enable-method = "psci";
			next-level-cache = <0x05>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x6b>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x05>;
			};
		};

		cpu@200 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x200>;
			enable-method = "psci";
			next-level-cache = <0x06>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x6c>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x06>;
			};
		};

		cpu@300 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x300>;
			enable-method = "psci";
			next-level-cache = <0x07>;
			qcom,freq-domain = <0x03 0x00>;
			#cooling-cells = <0x02>;
			phandle = <0x6d>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x07>;
			};
		};

		cpu@400 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x400>;
			enable-method = "psci";
			next-level-cache = <0x08>;
			qcom,freq-domain = <0x03 0x01>;
			#cooling-cells = <0x02>;
			phandle = <0x76>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x08>;
			};
		};

		cpu@500 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x500>;
			enable-method = "psci";
			next-level-cache = <0x09>;
			qcom,freq-domain = <0x03 0x01>;
			#cooling-cells = <0x02>;
			phandle = <0x77>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x09>;
			};
		};

		cpu@600 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x600>;
			enable-method = "psci";
			next-level-cache = <0x0a>;
			qcom,freq-domain = <0x03 0x01>;
			#cooling-cells = <0x02>;
			phandle = <0x78>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x0a>;
			};
		};

		cpu@700 {
			device_type = "cpu";
			compatible = "qcom,kryo485";
			reg = <0x00 0x700>;
			enable-method = "psci";
			next-level-cache = <0x0b>;
			qcom,freq-domain = <0x03 0x02>;
			#cooling-cells = <0x02>;
			phandle = <0x79>;

			l2-cache {
				compatible = "cache";
				next-level-cache = <0x04>;
				phandle = <0x0b>;
			};
		};
	};

	firmware {

		scm {
			compatible = "qcom,scm";
			#reset-cells = <0x01>;
			phandle = <0x90>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x00 0x80000000 0x00 0x00>;
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <0x01 0x07 0x08>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		memory@80000000 {
			reg = <0x00 0x80000000 0x00 0x600000>;
			no-map;
			phandle = <0x91>;
		};

		memory@80700000 {
			reg = <0x00 0x80700000 0x00 0x160000>;
			no-map;
			phandle = <0x92>;
		};

		memory@80860000 {
			compatible = "qcom,cmd-db";
			reg = <0x00 0x80860000 0x00 0x20000>;
			no-map;
			phandle = <0x93>;
		};

		memory@80900000 {
			reg = <0x00 0x80900000 0x00 0x200000>;
			no-map;
			phandle = <0x0c>;
		};

		memory@80b00000 {
			reg = <0x00 0x80b00000 0x00 0x5300000>;
			no-map;
			phandle = <0x94>;
		};

		memory@86200000 {
			reg = <0x00 0x86200000 0x00 0x500000>;
			no-map;
			phandle = <0x95>;
		};

		memory@86700000 {
			reg = <0x00 0x86700000 0x00 0x100000>;
			no-map;
			phandle = <0x96>;
		};

		memory@86800000 {
			reg = <0x00 0x86800000 0x00 0x10000>;
			no-map;
			phandle = <0x97>;
		};

		memory@86810000 {
			reg = <0x00 0x86810000 0x00 0xa000>;
			no-map;
			phandle = <0x98>;
		};

		memory@8681a000 {
			reg = <0x00 0x8681a000 0x00 0x2000>;
			no-map;
			phandle = <0x4f>;
		};

		memory@86900000 {
			reg = <0x00 0x86900000 0x00 0x500000>;
			no-map;
			phandle = <0x99>;
		};

		memory@86e00000 {
			reg = <0x00 0x86e00000 0x00 0x500000>;
			no-map;
			phandle = <0x9a>;
		};

		memory@87300000 {
			reg = <0x00 0x87300000 0x00 0x500000>;
			no-map;
			phandle = <0x9b>;
		};

		memory@87800000 {
			reg = <0x00 0x87800000 0x00 0x1400000>;
			no-map;
			phandle = <0x58>;
		};

		memory@88c00000 {
			reg = <0x00 0x88c00000 0x00 0x1500000>;
			no-map;
			phandle = <0x55>;
		};

		memory@8a100000 {
			reg = <0x00 0x8a100000 0x00 0x1d00000>;
			no-map;
			phandle = <0x5f>;
		};

		memory@8be00000 {
			reg = <0x00 0x8be00000 0x00 0x100000>;
			no-map;
			phandle = <0x9c>;
		};

		memory@8bf00000 {
			reg = <0x00 0x8bf00000 0x00 0x4600000>;
			no-map;
			phandle = <0x9d>;
		};
	};

	qcom,smem {
		compatible = "qcom,smem";
		memory-region = <0x0c>;
		hwlocks = <0x0d 0x03>;
		phandle = <0x9e>;
	};

	smp2p-adsp {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1bb 0x1ad>;
		interrupts-extended = <0x0e 0x03 0x02 0x01>;
		mboxes = <0x0e 0x03 0x02>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x02>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x60>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x5e>;
		};
	};

	smp2p-cdsp {
		compatible = "qcom,smp2p";
		qcom,smem = <0x5e 0x1b0>;
		interrupts-extended = <0x0e 0x06 0x02 0x01>;
		mboxes = <0x0e 0x06 0x02>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x05>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x59>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x57>;
		};
	};

	smp2p-slpi {
		compatible = "qcom,smp2p";
		qcom,smem = <0x1e1 0x1ae>;
		interrupts-extended = <0x0e 0x04 0x02 0x01>;
		mboxes = <0x0e 0x04 0x02>;
		qcom,local-pid = <0x00>;
		qcom,remote-pid = <0x03>;

		master-kernel {
			qcom,entry-name = "master-kernel";
			#qcom,smem-state-cells = <0x01>;
			phandle = <0x56>;
		};

		slave-kernel {
			qcom,entry-name = "slave-kernel";
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x53>;
		};
	};

	soc@0 {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges = <0x00 0x00 0x00 0x00 0x10 0x00>;
		dma-ranges = <0x00 0x00 0x00 0x00 0x10 0x00>;
		compatible = "simple-bus";
		phandle = <0x9f>;

		clock-controller@100000 {
			compatible = "qcom,gcc-sm8250";
			reg = <0x00 0x100000 0x00 0x1f0000>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			#power-domain-cells = <0x01>;
			clock-names = "bi_tcxo\0bi_tcxo_ao\0sleep_clk";
			clocks = <0x0f 0x00 0x0f 0x01 0x10>;
			phandle = <0x14>;
		};

		mailbox@408000 {
			compatible = "qcom,sm8250-ipcc\0qcom,ipcc";
			reg = <0x00 0x408000 0x00 0x1000>;
			interrupts = <0x00 0xe5 0x04>;
			interrupt-controller;
			#interrupt-cells = <0x03>;
			#mbox-cells = <0x02>;
			phandle = <0x0e>;
		};

		qup-opp-table {
			compatible = "operating-points-v2";
			phandle = <0x18>;

			opp-50000000 {
				opp-hz = <0x00 0x2faf080>;
				required-opps = <0x11>;
			};

			opp-75000000 {
				opp-hz = <0x00 0x47868c0>;
				required-opps = <0x12>;
			};

			opp-120000000 {
				opp-hz = <0x00 0x7270e00>;
				required-opps = <0x13>;
			};
		};

		geniqup@8c0000 {
			compatible = "qcom,geni-se-qup";
			reg = <0x00 0x8c0000 0x00 0x6000>;
			clock-names = "m-ahb\0s-ahb";
			clocks = <0x14 0x87 0x14 0x88>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			status = "okay";
			phandle = <0xa0>;

			i2c@880000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x880000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x77>;
				pinctrl-names = "default";
				pinctrl-0 = <0x15>;
				interrupts = <0x00 0x175 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xa1>;
			};

			spi@880000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x880000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x77>;
				pinctrl-names = "default";
				pinctrl-0 = <0x16>;
				interrupts = <0x00 0x175 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xa2>;
			};

			i2c@884000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x884000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x79>;
				pinctrl-names = "default";
				pinctrl-0 = <0x19>;
				interrupts = <0x00 0x247 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "okay";
				phandle = <0xa3>;
			};

			spi@884000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x884000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x79>;
				pinctrl-names = "default";
				pinctrl-0 = <0x1a>;
				interrupts = <0x00 0x247 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xa4>;
			};

			i2c@888000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x888000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x1b>;
				interrupts = <0x00 0x248 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xa5>;
			};

			spi@888000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x888000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x1c>;
				interrupts = <0x00 0x248 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xa6>;
			};

			i2c@88c000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x88c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x1d>;
				interrupts = <0x00 0x249 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xa7>;
			};

			spi@88c000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x88c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x1e>;
				interrupts = <0x00 0x249 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xa8>;
			};

			serial@88c000 {
				compatible = "qcom,geni-uart";
				reg = <0x00 0x88c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x1f>;
				interrupts = <0x00 0x249 0x04>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xa9>;
			};

			i2c@890000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x890000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x20>;
				interrupts = <0x00 0x24a 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xaa>;
			};

			spi@890000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x890000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x21>;
				interrupts = <0x00 0x24a 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xab>;
			};

			serial@890000 {
				compatible = "qcom,geni-uart";
				reg = <0x00 0x890000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x7f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x22>;
				interrupts = <0x00 0x24a 0x04>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xac>;
			};

			i2c@894000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x894000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x81>;
				pinctrl-names = "default";
				pinctrl-0 = <0x23>;
				interrupts = <0x00 0x24b 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xad>;
			};

			spi@894000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x894000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x81>;
				pinctrl-names = "default";
				pinctrl-0 = <0x24>;
				interrupts = <0x00 0x24b 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xae>;
			};
		};

		geniqup@9c0000 {
			compatible = "qcom,geni-se-qup";
			reg = <0x00 0x9c0000 0x00 0x6000>;
			clock-names = "m-ahb\0s-ahb";
			clocks = <0x14 0x83 0x14 0x84>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			status = "okay";
			phandle = <0xaf>;

			i2c@980000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x980000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x57>;
				pinctrl-names = "default";
				pinctrl-0 = <0x25>;
				interrupts = <0x00 0x259 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xb0>;
			};

			spi@980000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x980000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x57>;
				pinctrl-names = "default";
				pinctrl-0 = <0x26>;
				interrupts = <0x00 0x259 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "okay";
				phandle = <0xb1>;
			};

			i2c@984000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x984000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x59>;
				pinctrl-names = "default";
				pinctrl-0 = <0x27>;
				interrupts = <0x00 0x25a 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xb2>;
			};

			spi@984000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x984000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x59>;
				pinctrl-names = "default";
				pinctrl-0 = <0x28>;
				interrupts = <0x00 0x25a 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xb3>;
			};

			i2c@988000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x988000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x29>;
				interrupts = <0x00 0x25b 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xb4>;
			};

			spi@988000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x988000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x2a>;
				interrupts = <0x00 0x25b 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xb5>;
			};

			serial@988000 {
				compatible = "qcom,geni-debug-uart";
				reg = <0x00 0x988000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x2b>;
				interrupts = <0x00 0x25b 0x04>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xb6>;
			};

			i2c@98c000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x98c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x2c>;
				interrupts = <0x00 0x25c 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xb7>;
			};

			spi@98c000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x98c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x2d>;
				interrupts = <0x00 0x25c 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xb8>;
			};

			i2c@990000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x990000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x2e>;
				interrupts = <0x00 0x25d 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "okay";
				phandle = <0xb9>;
			};

			spi@990000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x990000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x5f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x2f>;
				interrupts = <0x00 0x25d 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xba>;
			};

			i2c@994000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x994000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x61>;
				pinctrl-names = "default";
				pinctrl-0 = <0x30>;
				interrupts = <0x00 0x25e 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "okay";
				phandle = <0xbb>;
			};

			spi@994000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x994000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x61>;
				pinctrl-names = "default";
				pinctrl-0 = <0x31>;
				interrupts = <0x00 0x25e 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xbc>;
			};

			i2c@998000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x998000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x63>;
				pinctrl-names = "default";
				pinctrl-0 = <0x32>;
				interrupts = <0x00 0x25f 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xbd>;
			};

			spi@998000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x998000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x63>;
				pinctrl-names = "default";
				pinctrl-0 = <0x33>;
				interrupts = <0x00 0x25f 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xbe>;
			};

			serial@998000 {
				compatible = "qcom,geni-uart";
				reg = <0x00 0x998000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x63>;
				pinctrl-names = "default";
				pinctrl-0 = <0x34>;
				interrupts = <0x00 0x25f 0x04>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xbf>;
			};

			i2c@99c000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0x99c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x65>;
				pinctrl-names = "default";
				pinctrl-0 = <0x35>;
				interrupts = <0x00 0x260 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xc0>;
			};

			spi@99c000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0x99c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x65>;
				pinctrl-names = "default";
				pinctrl-0 = <0x36>;
				interrupts = <0x00 0x260 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xc1>;
			};
		};

		geniqup@ac0000 {
			compatible = "qcom,geni-se-qup";
			reg = <0x00 0xac0000 0x00 0x6000>;
			clock-names = "m-ahb\0s-ahb";
			clocks = <0x14 0x85 0x14 0x86>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			status = "okay";
			phandle = <0xc2>;

			i2c@a80000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0xa80000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x69>;
				pinctrl-names = "default";
				pinctrl-0 = <0x37>;
				interrupts = <0x00 0x161 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xc3>;
			};

			spi@a80000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0xa80000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x69>;
				pinctrl-names = "default";
				pinctrl-0 = <0x38>;
				interrupts = <0x00 0x161 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xc4>;
			};

			i2c@a84000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0xa84000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x6b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x39>;
				interrupts = <0x00 0x162 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xc5>;
			};

			spi@a84000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0xa84000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x6b>;
				pinctrl-names = "default";
				pinctrl-0 = <0x3a>;
				interrupts = <0x00 0x162 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xc6>;
			};

			i2c@a88000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0xa88000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x6d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x3b>;
				interrupts = <0x00 0x163 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xc7>;
			};

			spi@a88000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0xa88000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x6d>;
				pinctrl-names = "default";
				pinctrl-0 = <0x3c>;
				interrupts = <0x00 0x163 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xc8>;
			};

			i2c@a8c000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0xa8c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x6f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x3d>;
				interrupts = <0x00 0x164 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xc9>;
			};

			spi@a8c000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0xa8c000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x6f>;
				pinctrl-names = "default";
				pinctrl-0 = <0x3e>;
				interrupts = <0x00 0x164 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xca>;
			};

			i2c@a90000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0xa90000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x71>;
				pinctrl-names = "default";
				pinctrl-0 = <0x3f>;
				interrupts = <0x00 0x165 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xcb>;
			};

			spi@a90000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0xa90000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x71>;
				pinctrl-names = "default";
				pinctrl-0 = <0x40>;
				interrupts = <0x00 0x165 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xcc>;
			};

			serial@a90000 {
				compatible = "qcom,geni-debug-uart";
				reg = <0x00 0xa90000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x71>;
				pinctrl-names = "default";
				pinctrl-0 = <0x41>;
				interrupts = <0x00 0x165 0x04>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "okay";
				phandle = <0xcd>;
			};

			i2c@a94000 {
				compatible = "qcom,geni-i2c";
				reg = <0x00 0xa94000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x73>;
				pinctrl-names = "default";
				pinctrl-0 = <0x42>;
				interrupts = <0x00 0x166 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				status = "disabled";
				phandle = <0xce>;
			};

			spi@a94000 {
				compatible = "qcom,geni-spi";
				reg = <0x00 0xa94000 0x00 0x4000>;
				clock-names = "se";
				clocks = <0x14 0x73>;
				pinctrl-names = "default";
				pinctrl-0 = <0x43>;
				interrupts = <0x00 0x166 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x17 0x00>;
				operating-points-v2 = <0x18>;
				status = "disabled";
				phandle = <0xcf>;
			};
		};

		interconnect@1500000 {
			compatible = "qcom,sm8250-config-noc";
			reg = <0x00 0x1500000 0x00 0xa580>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd0>;
		};

		interconnect@1620000 {
			compatible = "qcom,sm8250-system-noc";
			reg = <0x00 0x1620000 0x00 0x1c200>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd1>;
		};

		interconnect@163d000 {
			compatible = "qcom,sm8250-mc-virt";
			reg = <0x00 0x163d000 0x00 0x1000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd2>;
		};

		interconnect@16e0000 {
			compatible = "qcom,sm8250-aggre1-noc";
			reg = <0x00 0x16e0000 0x00 0x1f180>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd3>;
		};

		interconnect@1700000 {
			compatible = "qcom,sm8250-aggre2-noc";
			reg = <0x00 0x1700000 0x00 0x33000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd4>;
		};

		interconnect@1733000 {
			compatible = "qcom,sm8250-compute-noc";
			reg = <0x00 0x1733000 0x00 0xa180>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd5>;
		};

		interconnect@1740000 {
			compatible = "qcom,sm8250-mmss-noc";
			reg = <0x00 0x1740000 0x00 0x1f080>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd6>;
		};

		ufshc@1d84000 {
			compatible = "qcom,sm8250-ufshc\0qcom,ufshc\0jedec,ufs-2.0";
			reg = <0x00 0x1d84000 0x00 0x3000>;
			interrupts = <0x00 0x109 0x04>;
			phys = <0x45>;
			phy-names = "ufsphy";
			lanes-per-direction = <0x02>;
			#reset-cells = <0x01>;
			resets = <0x14 0x21>;
			reset-names = "rst";
			power-domains = <0x14 0x04>;
			clock-names = "core_clk\0bus_aggr_clk\0iface_clk\0core_clk_unipro\0ref_clk\0tx_lane0_sync_clk\0rx_lane0_sync_clk\0rx_lane1_sync_clk";
			clocks = <0x14 0xa2 0x14 0x06 0x14 0xa1 0x14 0xab 0x0f 0x00 0x14 0xaa 0x14 0xa8 0x14 0xa9>;
			freq-table-hz = <0x23c3460 0x11e1a300 0x00 0x00 0x00 0x00 0x23c3460 0x11e1a300 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			status = "okay";
			vcc-supply = <0x46>;
			vcc-max-microamp = "\0\f5";
			vccq-supply = <0x47>;
			vccq-max-microamp = "\0\f5";
			vccq2-supply = <0x48>;
			vccq2-max-microamp = "\0\f5";
			phandle = <0x49>;
		};

		phy@1d87000 {
			compatible = "qcom,sm8250-qmp-ufs-phy";
			reg = <0x00 0x1d87000 0x00 0x1c0>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			clock-names = "ref\0ref_aux";
			clocks = <0x0f 0x00 0x14 0xa6>;
			resets = <0x49 0x00>;
			reset-names = "ufsphy";
			status = "okay";
			vdda-phy-supply = <0x4a>;
			vdda-max-microamp = <0x15f2c>;
			vdda-pll-supply = <0x4b>;
			vdda-pll-max-microamp = <0x4970>;
			phandle = <0xd7>;

			lanes@1d87400 {
				reg = <0x00 0x1d87400 0x00 0x108 0x00 0x1d87600 0x00 0x1e0 0x00 0x1d87c00 0x00 0x1dc 0x00 0x1d87800 0x00 0x108 0x00 0x1d87a00 0x00 0x1e0>;
				#phy-cells = <0x00>;
				phandle = <0x45>;
			};
		};

		interconnect@1e00000 {
			compatible = "qcom,sm8250-ipa-virt";
			reg = <0x00 0x1e00000 0x00 0x1000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xd8>;
		};

		hwlock@1f40000 {
			compatible = "qcom,tcsr-mutex";
			reg = <0x00 0x1f40000 0x00 0x40000>;
			#hwlock-cells = <0x01>;
			phandle = <0x0d>;
		};

		gpu@3d00000 {
			compatible = "qcom,adreno-650.2\0qcom,adreno\0amd,imageon";
			#stream-id-cells = <0x10>;
			reg = <0x00 0x3d00000 0x00 0x40000>;
			reg-names = "kgsl_3d0_reg_memory";
			interrupts = <0x00 0x12c 0x04>;
			iommus = <0x4c 0x00 0x401>;
			operating-points-v2 = <0x4d>;
			qcom,gmu = <0x4e>;
			phandle = <0xd9>;

			zap-shader {
				memory-region = <0x4f>;
			};

			opp-table {
				compatible = "operating-points-v2";
				phandle = <0x4d>;

				opp-670000000 {
					opp-hz = <0x00 0x27ef6380>;
					opp-level = <0x140>;
				};

				opp-587000000 {
					opp-hz = <0x00 0x22fce8c0>;
					opp-level = <0x100>;
				};

				opp-525000000 {
					opp-hz = <0x00 0x1f4add40>;
					opp-level = <0xe0>;
				};

				opp-490000000 {
					opp-hz = <0x00 0x1d34ce80>;
					opp-level = <0xc0>;
				};

				opp-441600000 {
					opp-hz = <0x00 0x1a524800>;
					opp-level = <0x90>;
				};

				opp-400000000 {
					opp-hz = <0x00 0x17d78400>;
					opp-level = <0x80>;
				};

				opp-305000000 {
					opp-hz = <0x00 0x122dee40>;
					opp-level = <0x40>;
				};
			};
		};

		gmu@3d6a000 {
			compatible = "qcom,adreno-gmu-650.2\0qcom,adreno-gmu";
			reg = <0x00 0x3d6a000 0x00 0x30000 0x00 0x3de0000 0x00 0x10000 0x00 0xb290000 0x00 0x10000 0x00 0xb490000 0x00 0x10000>;
			reg-names = "gmu\0rscc\0gmu_pdc\0gmu_pdc_seq";
			interrupts = <0x00 0x130 0x04 0x00 0x131 0x04>;
			interrupt-names = "hfi\0gmu";
			clocks = <0x50 0x00 0x50 0x03 0x50 0x06 0x14 0x15 0x14 0x25>;
			clock-names = "ahb\0gmu\0cxo\0axi\0memnoc";
			power-domains = <0x50 0x00 0x50 0x01>;
			power-domain-names = "cx\0gx";
			iommus = <0x4c 0x05 0x400>;
			operating-points-v2 = <0x51>;
			phandle = <0x4e>;

			opp-table {
				compatible = "operating-points-v2";
				phandle = <0x51>;

				opp-200000000 {
					opp-hz = <0x00 0xbebc200>;
					opp-level = <0x30>;
				};
			};
		};

		clock-controller@3d90000 {
			compatible = "qcom,sm8250-gpucc";
			reg = <0x00 0x3d90000 0x00 0x9000>;
			clocks = <0x0f 0x00 0x14 0x22 0x14 0x23>;
			clock-names = "bi_tcxo\0gcc_gpu_gpll0_clk_src\0gcc_gpu_gpll0_div_clk_src";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			#power-domain-cells = <0x01>;
			phandle = <0x50>;
		};

		iommu@3da0000 {
			compatible = "qcom,sm8250-smmu-500\0arm,mmu-500";
			reg = <0x00 0x3da0000 0x00 0x10000>;
			#iommu-cells = <0x02>;
			#global-interrupts = <0x02>;
			interrupts = <0x00 0x2a0 0x04 0x00 0x2a1 0x04 0x00 0x2a6 0x04 0x00 0x2a7 0x04 0x00 0x2a8 0x04 0x00 0x2a9 0x04 0x00 0x2aa 0x04 0x00 0x2ab 0x04 0x00 0x2ac 0x04 0x00 0x2ad 0x04>;
			clocks = <0x50 0x00 0x14 0x25 0x14 0x26>;
			clock-names = "ahb\0bus\0iface";
			power-domains = <0x50 0x00>;
			phandle = <0x4c>;
		};

		remoteproc@5c00000 {
			compatible = "qcom,sm8250-slpi-pas";
			reg = <0x00 0x5c00000 0x00 0x4000>;
			interrupts-extended = <0x52 0x09 0x04 0x53 0x00 0x01 0x53 0x01 0x01 0x53 0x02 0x01 0x53 0x03 0x01>;
			interrupt-names = "wdog\0fatal\0ready\0handover\0stop-ack";
			clocks = <0x0f 0x00>;
			clock-names = "xo";
			power-domains = <0x54 0x03 0x17 0x04 0x17 0x05>;
			power-domain-names = "load_state\0lcx\0lmx";
			memory-region = <0x55>;
			qcom,smem-states = <0x56 0x00>;
			qcom,smem-state-names = "stop";
			status = "disabled";
			phandle = <0xda>;

			glink-edge {
				interrupts-extended = <0x0e 0x04 0x00 0x01>;
				mboxes = <0x0e 0x04 0x00>;
				label = "lpass";
				qcom,remote-pid = <0x03>;
			};
		};

		remoteproc@8300000 {
			compatible = "qcom,sm8250-cdsp-pas";
			reg = <0x00 0x8300000 0x00 0x10000>;
			interrupts-extended = <0x01 0x00 0x242 0x04 0x57 0x00 0x01 0x57 0x01 0x01 0x57 0x02 0x01 0x57 0x03 0x01>;
			interrupt-names = "wdog\0fatal\0ready\0handover\0stop-ack";
			clocks = <0x0f 0x00>;
			clock-names = "xo";
			power-domains = <0x54 0x00 0x17 0x00>;
			power-domain-names = "load_state\0cx";
			memory-region = <0x58>;
			qcom,smem-states = <0x59 0x00>;
			qcom,smem-state-names = "stop";
			status = "disabled";
			phandle = <0xdb>;

			glink-edge {
				interrupts-extended = <0x0e 0x06 0x00 0x01>;
				mboxes = <0x0e 0x06 0x00>;
				label = "lpass";
				qcom,remote-pid = <0x05>;
			};
		};

		interconnect@90c0000 {
			compatible = "qcom,sm8250-dc-noc";
			reg = <0x00 0x90c0000 0x00 0x4200>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xdc>;
		};

		interconnect@9100000 {
			compatible = "qcom,sm8250-gem-noc";
			reg = <0x00 0x9100000 0x00 0xb4000>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xdd>;
		};

		interconnect@9990000 {
			compatible = "qcom,sm8250-npu-noc";
			reg = <0x00 0x9990000 0x00 0x1600>;
			#interconnect-cells = <0x01>;
			qcom,bcm-voters = <0x44>;
			phandle = <0xde>;
		};

		interrupt-controller@b220000 {
			compatible = "qcom,sm8250-pdc\0qcom,pdc";
			reg = <0x00 0xb220000 0x00 0x30000 0x00 0x17c000f0 0x00 0x60>;
			qcom,pdc-ranges = <0x00 0x1e0 0x5e 0x5e 0x261 0x1f 0x7d 0x3f 0x01 0x7e 0x2cc 0x0c>;
			#interrupt-cells = <0x02>;
			interrupt-parent = <0x01>;
			interrupt-controller;
			phandle = <0x52>;
		};

		thermal-sensor@c263000 {
			compatible = "qcom,sm8250-tsens\0qcom,tsens-v2";
			reg = <0x00 0xc263000 0x00 0x1ff 0x00 0xc222000 0x00 0x1ff>;
			#qcom,sensors = <0x10>;
			interrupts = <0x00 0x1fa 0x04 0x00 0x1fc 0x04>;
			interrupt-names = "uplow\0critical";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x68>;
		};

		thermal-sensor@c265000 {
			compatible = "qcom,sm8250-tsens\0qcom,tsens-v2";
			reg = <0x00 0xc265000 0x00 0x1ff 0x00 0xc223000 0x00 0x1ff>;
			#qcom,sensors = <0x09>;
			interrupts = <0x00 0x1fb 0x04 0x00 0x1fd 0x04>;
			interrupt-names = "uplow\0critical";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x89>;
		};

		qmp@c300000 {
			compatible = "qcom,sm8250-aoss-qmp";
			reg = <0x00 0xc300000 0x00 0x100000>;
			interrupts-extended = <0x0e 0x00 0x00 0x01>;
			mboxes = <0x0e 0x00 0x00>;
			#clock-cells = <0x00>;
			#power-domain-cells = <0x01>;
			phandle = <0x54>;
		};

		spmi@c440000 {
			compatible = "qcom,spmi-pmic-arb";
			reg = <0x00 0xc440000 0x00 0x1100 0x00 0xc600000 0x00 0x2000000 0x00 0xe600000 0x00 0x100000 0x00 0xe700000 0x00 0xa0000 0x00 0xc40a000 0x00 0x26000>;
			reg-names = "core\0chnls\0obsrvr\0intr\0cnfg";
			interrupt-names = "periph_irq";
			interrupts-extended = <0x52 0x01 0x04>;
			qcom,ee = <0x00>;
			qcom,channel = <0x00>;
			#address-cells = <0x02>;
			#size-cells = <0x00>;
			interrupt-controller;
			#interrupt-cells = <0x04>;
			phandle = <0xdf>;

			pmic@0 {
				compatible = "qcom,pm8150\0qcom,spmi-pmic";
				reg = <0x00 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0xe0>;

				power-on@800 {
					compatible = "qcom,pm8998-pon";
					reg = <0x800>;
					phandle = <0xe1>;

					pwrkey {
						compatible = "qcom,pm8941-pwrkey";
						interrupts = <0x00 0x08 0x00 0x03>;
						debounce = <0x3d09>;
						bias-pull-up;
						linux,code = <0x74>;
						status = "disabled";
					};
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x00 0x24 0x00 0x03>;
					io-channels = <0x5a 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x8a>;
				};

				adc@3100 {
					compatible = "qcom,spmi-adc5";
					reg = <0x3100>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					interrupts = <0x00 0x31 0x00 0x01>;
					phandle = <0x5a>;

					ref-gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "ref_gnd";
					};

					vref-1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "vref_1p25";
					};

					die-temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "die_temp";
					};
				};

				rtc@6000 {
					compatible = "qcom,pm8941-rtc";
					reg = <0x6000>;
					reg-names = "rtc\0alarm";
					interrupts = <0x00 0x61 0x01 0x00>;
					status = "disabled";
				};

				gpio@c000 {
					compatible = "qcom,pm8150-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupt-controller;
					#interrupt-cells = <0x02>;
					gpio-reserved-ranges = <0x01 0x01 0x03 0x02 0x07 0x01>;
					gpio-line-names = "NC\0OPTION2\0PM_GPIO-F\0PM_SLP_CLK_IN\0OPTION1\0VOL_UP_N\0PM8250_GPIO7\0SP_ARI_PWR_ALARM\0GPIO_9_P\0GPIO_10_P";
					phandle = <0x8d>;
				};
			};

			pmic@1 {
				compatible = "qcom,pm8150\0qcom,spmi-pmic";
				reg = <0x01 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
			};

			pmic@2 {
				compatible = "qcom,pm8150b\0qcom,spmi-pmic";
				reg = <0x02 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				power-on@800 {
					compatible = "qcom,pm8916-pon";
					reg = <0x800>;
					status = "disabled";
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x02 0x24 0x00 0x03>;
					io-channels = <0x5b 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x8b>;
				};

				adc@3100 {
					compatible = "qcom,spmi-adc5";
					reg = <0x3100>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					interrupts = <0x02 0x31 0x00 0x01>;
					phandle = <0x5b>;

					ref-gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "ref_gnd";
					};

					vref-1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "vref_1p25";
					};

					die-temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "die_temp";
					};

					chg-temp@9 {
						reg = <0x09>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "chg_temp";
					};
				};

				gpio@c000 {
					compatible = "qcom,pm8150b-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupt-controller;
					#interrupt-cells = <0x02>;
					gpio-line-names = "NC\0NC\0NC\0NC\0HAP_BOOST_EN\0SMB_STAT\0NC\0NC\0SDM_FORCE_USB_BOOT\0NC\0NC\0NC";
					phandle = <0xe2>;
				};
			};

			pmic@3 {
				compatible = "qcom,pm8150b\0qcom,spmi-pmic";
				reg = <0x03 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
			};

			pmic@4 {
				compatible = "qcom,pm8150l\0qcom,spmi-pmic";
				reg = <0x04 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				power-on@800 {
					compatible = "qcom,pm8916-pon";
					reg = <0x800>;
					status = "disabled";
				};

				temp-alarm@2400 {
					compatible = "qcom,spmi-temp-alarm";
					reg = <0x2400>;
					interrupts = <0x04 0x24 0x00 0x03>;
					io-channels = <0x5c 0x06>;
					io-channel-names = "thermal";
					#thermal-sensor-cells = <0x00>;
					phandle = <0x8c>;
				};

				adc@3100 {
					compatible = "qcom,spmi-adc5";
					reg = <0x3100>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					#io-channel-cells = <0x01>;
					interrupts = <0x04 0x31 0x00 0x01>;
					phandle = <0x5c>;

					ref-gnd@0 {
						reg = <0x00>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "ref_gnd";
					};

					vref-1p25@1 {
						reg = <0x01>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "vref_1p25";
					};

					die-temp@6 {
						reg = <0x06>;
						qcom,pre-scaling = <0x01 0x01>;
						label = "die_temp";
					};
				};

				gpio@c000 {
					compatible = "qcom,pm8150l-gpio";
					reg = <0xc000>;
					gpio-controller;
					#gpio-cells = <0x02>;
					interrupt-controller;
					#interrupt-cells = <0x02>;
					gpio-line-names = "NC\0PM3003A_EN\0NC\0NC\0PM_GPIO5\0PM_GPIO-A\0PM_GPIO7\0NC\0NC\0PM_GPIO-B\0NC\0PM3003A_MODE";
					phandle = <0xe3>;
				};
			};

			pmic@5 {
				compatible = "qcom,pm8150l\0qcom,spmi-pmic";
				reg = <0x05 0x00>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
			};
		};

		pinctrl@f100000 {
			compatible = "qcom,sm8250-pinctrl";
			reg = <0x00 0xf100000 0x00 0x300000 0x00 0xf500000 0x00 0x300000 0x00 0xf900000 0x00 0x300000>;
			reg-names = "west\0south\0north";
			interrupts = <0x00 0xd0 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			gpio-ranges = <0x5d 0x00 0x00 0xb5>;
			wakeup-parent = <0x52>;
			gpio-reserved-ranges = <0x28 0x04>;
			gpio-line-names = "GPIO-MM\0GPIO-NN\0GPIO-OO\0GPIO-PP\0GPIO-A\0GPIO-C\0GPIO-E\0GPIO-D\0I2C0-SDA\0I2C0-SCL\0GPIO-TT\0NC\0GPIO_12_I2C_SDA\0GPIO_13_I2C_SCL\0GPIO-X\0GPIO_15_RGMII_INT\0HST_BT_UART_CTS\0HST_BT_UART_RFR\0HST_BT_UART_TX\0HST_BT_UART_RX\0HST_WLAN_EN\0HST_BT_EN\0GPIO-AAA\0GPIO-BBB\0GPIO-CCC\0GPIO-Z\0GPIO-DDD\0GPIO-BB\0GPIO_28_CAN_SPI_MISO\0GPIO_29_CAN_SPI_MOSI\0GPIO_30_CAN_SPI_CLK\0GPIO_31_CAN_SPI_CS\0GPIO-UU\0NC\0UART1_TXD_SOM\0UART1_RXD_SOM\0UART0_CTS\0UART0_RTS\0UART0_TXD\0UART0_RXD\0SPI1_MISO\0SPI1_MOSI\0SPI1_CLK\0SPI1_CS\0I2C1_SDA\0I2C1_SCL\0GPIO-F\0GPIO-JJ\0Board_ID1\0Board_ID2\0NC\0NC\0SPI0_MISO\0SPI0_MOSI\0SPI0_SCLK\0SPI0_CS\0GPIO-QQ\0GPIO-RR\0USB2LAN_RESET\0USB2LAN_EXTWAKE\0NC\0NC\0NC\0LT9611_INT\0GPIO-AA\0USB_CC_DIR\0GPIO-G\0GPIO-LL\0USB_DP_HPD_1P8\0NC\0NC\0SD_CMD\0SD_DAT3\0SD_SCLK\0SD_DAT2\0SD_DAT1\0SD_DAT0\0SD_UFS_CARD_DET_N\0GPIO-II\0PCIE0_RST_N\0PCIE0_CLK_REQ_N\0PCIE0_WAKE_N\0GPIO-CC\0GPIO-DD\0GPIO-EE\0GPIO-FF\0GPIO-GG\0GPIO-HH\0GPIO-VV\0GPIO-WW\0NC\0NC\0GPIO-K\0GPIO-I\0CSI0_MCLK\0CSI1_MCLK\0CSI2_MCLK\0CSI3_MCLK\0GPIO-AA\0GPIO-BB\0GPIO-KK\0CCI_I2C_SDA0\0CCI_I2C_SCL0\0CCI_I2C_SDA1\0CCI_I2C_SCL1\0CCI_I2C_SDA2\0CCI_I2C_SCL2\0CCI_I2C_SDA3\0CCI_I2C_SCL3\0GPIO-L\0NC\0NC\0ACCEL_INT\0GYRO_INT\0GPIO-J\0GPIO-YY\0GPIO-H\0GPIO-ZZ\0NC\0NC\0NC\0NC\0MAG_INT\0MAG_DRDY_INT\0HST_SW_CTRL\0GPIO-M\0GPIO-N\0GPIO-O\0GPIO-P\0PS_INT\0WSA1_EN\0USB_HUB_RESET\0SDM_FORCE_USB_BOOT\0I2S1_CLK_HDMI\0I2S1_DATA0_HDMI\0I2S1_WS_HDMI\0GPIO-B\0GPIO_137\0PCM_CLK\0PCM_DI\0PCM_DO\0PCM_FS\0HST_SLIM_CLK\0HST_SLIM_DATA\0GPIO-U\0GPIO-Y\0GPIO-R\0GPIO-Q\0GPIO-S\0GPIO-T\0GPIO-V\0GPIO-W\0DMIC_CLK1\0DMIC_DATA1\0DMIC_CLK2\0DMIC_DATA2\0WSA_SWR_CLK\0WSA_SWR_DATA\0DMIC_CLK3\0DMIC_DATA3\0I2C4_SDA\0I2C4_SCL\0SPI3_CS1\0SPI3_CS2\0SPI2_MISO_LS3\0SPI2_MOSI_LS3\0SPI2_CLK_LS3\0SPI2_ACCEL_CS_LS3\0SPI2_CS1\0NC\0GPIO-SS\0GPIO-XX\0SPI3_MISO\0SPI3_MOSI\0SPI3_CLK\0SPI3_CS\0HST_BLE_SNS_UART_TX\0HST_BLE_SNS_UART_RX\0HST_WLAN_UART_TX\0HST_WLAN_UART_RX";
			phandle = <0x5d>;

			qup-i2c0-default {
				phandle = <0x25>;

				mux {
					pins = "gpio28\0gpio29";
					function = "qup0";
				};

				config {
					pins = "gpio28\0gpio29";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c1-default {
				phandle = <0x27>;

				pinmux {
					pins = "gpio4\0gpio5";
					function = "qup1";
				};

				config {
					pins = "gpio4\0gpio5";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c2-default {
				phandle = <0x29>;

				mux {
					pins = "gpio115\0gpio116";
					function = "qup2";
				};

				config {
					pins = "gpio115\0gpio116";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c3-default {
				phandle = <0x2c>;

				mux {
					pins = "gpio119\0gpio120";
					function = "qup3";
				};

				config {
					pins = "gpio119\0gpio120";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c4-default {
				phandle = <0x2e>;

				mux {
					pins = "gpio8\0gpio9";
					function = "qup4";
				};

				config {
					pins = "gpio8\0gpio9";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c5-default {
				phandle = <0x30>;

				mux {
					pins = "gpio12\0gpio13";
					function = "qup5";
				};

				config {
					pins = "gpio12\0gpio13";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c6-default {
				phandle = <0x32>;

				mux {
					pins = "gpio16\0gpio17";
					function = "qup6";
				};

				config {
					pins = "gpio16\0gpio17";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c7-default {
				phandle = <0x35>;

				mux {
					pins = "gpio20\0gpio21";
					function = "qup7";
				};

				config {
					pins = "gpio20\0gpio21";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c8-default {
				phandle = <0x37>;

				mux {
					pins = "gpio24\0gpio25";
					function = "qup8";
				};

				config {
					pins = "gpio24\0gpio25";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c9-default {
				phandle = <0x39>;

				mux {
					pins = "gpio125\0gpio126";
					function = "qup9";
				};

				config {
					pins = "gpio125\0gpio126";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c10-default {
				phandle = <0x3b>;

				mux {
					pins = "gpio129\0gpio130";
					function = "qup10";
				};

				config {
					pins = "gpio129\0gpio130";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c11-default {
				phandle = <0x3d>;

				mux {
					pins = "gpio60\0gpio61";
					function = "qup11";
				};

				config {
					pins = "gpio60\0gpio61";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c12-default {
				phandle = <0x3f>;

				mux {
					pins = "gpio32\0gpio33";
					function = "qup12";
				};

				config {
					pins = "gpio32\0gpio33";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c13-default {
				phandle = <0x42>;

				mux {
					pins = "gpio36\0gpio37";
					function = "qup13";
				};

				config {
					pins = "gpio36\0gpio37";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c14-default {
				phandle = <0x15>;

				mux {
					pins = "gpio40\0gpio41";
					function = "qup14";
				};

				config {
					pins = "gpio40\0gpio41";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c15-default {
				phandle = <0x19>;

				mux {
					pins = "gpio44\0gpio45";
					function = "qup15";
				};

				config {
					pins = "gpio44\0gpio45";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c16-default {
				phandle = <0x1b>;

				mux {
					pins = "gpio48\0gpio49";
					function = "qup16";
				};

				config {
					pins = "gpio48\0gpio49";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c17-default {
				phandle = <0x1d>;

				mux {
					pins = "gpio52\0gpio53";
					function = "qup17";
				};

				config {
					pins = "gpio52\0gpio53";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c18-default {
				phandle = <0x20>;

				mux {
					pins = "gpio56\0gpio57";
					function = "qup18";
				};

				config {
					pins = "gpio56\0gpio57";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-i2c19-default {
				phandle = <0x23>;

				mux {
					pins = "gpio0\0gpio1";
					function = "qup19";
				};

				config {
					pins = "gpio0\0gpio1";
					drive-strength = <0x02>;
					bias-disable;
				};
			};

			qup-spi0-default {
				phandle = <0x26>;

				mux {
					pins = "gpio28\0gpio29\0gpio30\0gpio31";
					function = "qup0";
				};

				config {
					pins = "gpio28\0gpio29\0gpio30\0gpio31";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi1-default {
				phandle = <0x28>;

				mux {
					pins = "gpio4\0gpio5\0gpio6\0gpio7";
					function = "qup1";
				};

				config {
					pins = "gpio4\0gpio5\0gpio6\0gpio7";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi2-default {
				phandle = <0x2a>;

				mux {
					pins = "gpio115\0gpio116\0gpio117\0gpio118";
					function = "qup2";
				};

				config {
					pins = "gpio115\0gpio116\0gpio117\0gpio118";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi3-default {
				phandle = <0x2d>;

				mux {
					pins = "gpio119\0gpio120\0gpio121\0gpio122";
					function = "qup3";
				};

				config {
					pins = "gpio119\0gpio120\0gpio121\0gpio122";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi4-default {
				phandle = <0x2f>;

				mux {
					pins = "gpio8\0gpio9\0gpio10\0gpio11";
					function = "qup4";
				};

				config {
					pins = "gpio8\0gpio9\0gpio10\0gpio11";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi5-default {
				phandle = <0x31>;

				mux {
					pins = "gpio12\0gpio13\0gpio14\0gpio15";
					function = "qup5";
				};

				config {
					pins = "gpio12\0gpio13\0gpio14\0gpio15";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi6-default {
				phandle = <0x33>;

				mux {
					pins = "gpio16\0gpio17\0gpio18\0gpio19";
					function = "qup6";
				};

				config {
					pins = "gpio16\0gpio17\0gpio18\0gpio19";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi7-default {
				phandle = <0x36>;

				mux {
					pins = "gpio20\0gpio21\0gpio22\0gpio23";
					function = "qup7";
				};

				config {
					pins = "gpio20\0gpio21\0gpio22\0gpio23";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi8-default {
				phandle = <0x38>;

				mux {
					pins = "gpio24\0gpio25\0gpio26\0gpio27";
					function = "qup8";
				};

				config {
					pins = "gpio24\0gpio25\0gpio26\0gpio27";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi9-default {
				phandle = <0x3a>;

				mux {
					pins = "gpio125\0gpio126\0gpio127\0gpio128";
					function = "qup9";
				};

				config {
					pins = "gpio125\0gpio126\0gpio127\0gpio128";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi10-default {
				phandle = <0x3c>;

				mux {
					pins = "gpio129\0gpio130\0gpio131\0gpio132";
					function = "qup10";
				};

				config {
					pins = "gpio129\0gpio130\0gpio131\0gpio132";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi11-default {
				phandle = <0x3e>;

				mux {
					pins = "gpio60\0gpio61\0gpio62\0gpio63";
					function = "qup11";
				};

				config {
					pins = "gpio60\0gpio61\0gpio62\0gpio63";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi12-default {
				phandle = <0x40>;

				mux {
					pins = "gpio32\0gpio33\0gpio34\0gpio35";
					function = "qup12";
				};

				config {
					pins = "gpio32\0gpio33\0gpio34\0gpio35";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi13-default {
				phandle = <0x43>;

				mux {
					pins = "gpio36\0gpio37\0gpio38\0gpio39";
					function = "qup13";
				};

				config {
					pins = "gpio36\0gpio37\0gpio38\0gpio39";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi14-default {
				phandle = <0x16>;

				mux {
					pins = "gpio40\0gpio41\0gpio42\0gpio43";
					function = "qup14";
				};

				config {
					pins = "gpio40\0gpio41\0gpio42\0gpio43";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi15-default {
				phandle = <0x1a>;

				mux {
					pins = "gpio44\0gpio45\0gpio46\0gpio47";
					function = "qup15";
				};

				config {
					pins = "gpio44\0gpio45\0gpio46\0gpio47";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi16-default {
				phandle = <0x1c>;

				mux {
					pins = "gpio48\0gpio49\0gpio50\0gpio51";
					function = "qup16";
				};

				config {
					pins = "gpio48\0gpio49\0gpio50\0gpio51";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi17-default {
				phandle = <0x1e>;

				mux {
					pins = "gpio52\0gpio53\0gpio54\0gpio55";
					function = "qup17";
				};

				config {
					pins = "gpio52\0gpio53\0gpio54\0gpio55";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi18-default {
				phandle = <0x21>;

				mux {
					pins = "gpio56\0gpio57\0gpio58\0gpio59";
					function = "qup18";
				};

				config {
					pins = "gpio56\0gpio57\0gpio58\0gpio59";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-spi19-default {
				phandle = <0x24>;

				mux {
					pins = "gpio0\0gpio1\0gpio2\0gpio3";
					function = "qup19";
				};

				config {
					pins = "gpio0\0gpio1\0gpio2\0gpio3";
					drive-strength = <0x06>;
					bias-disable;
				};
			};

			qup-uart2-default {
				phandle = <0x2b>;

				mux {
					pins = "gpio117\0gpio118";
					function = "qup2";
				};
			};

			qup-uart6-default {
				phandle = <0x34>;

				mux {
					pins = "gpio16\0gpio17\0gpio18\0gpio19";
					function = "qup6";
				};
			};

			qup-uart12-default {
				phandle = <0x41>;

				mux {
					pins = "gpio34\0gpio35";
					function = "qup12";
				};
			};

			qup-uart17-default {
				phandle = <0x1f>;

				mux {
					pins = "gpio52\0gpio53\0gpio54\0gpio55";
					function = "qup17";
				};
			};

			qup-uart18-default {
				phandle = <0x22>;

				mux {
					pins = "gpio58\0gpio59";
					function = "qup18";
				};
			};
		};

		remoteproc@17300000 {
			compatible = "qcom,sm8250-adsp-pas";
			reg = <0x00 0x17300000 0x00 0x100>;
			interrupts-extended = <0x52 0x06 0x04 0x5e 0x00 0x01 0x5e 0x01 0x01 0x5e 0x02 0x01 0x5e 0x03 0x01>;
			interrupt-names = "wdog\0fatal\0ready\0handover\0stop-ack";
			clocks = <0x0f 0x00>;
			clock-names = "xo";
			power-domains = <0x54 0x01 0x17 0x04 0x17 0x05>;
			power-domain-names = "load_state\0lcx\0lmx";
			memory-region = <0x5f>;
			qcom,smem-states = <0x60 0x00>;
			qcom,smem-state-names = "stop";
			status = "disabled";
			phandle = <0xe4>;

			glink-edge {
				interrupts-extended = <0x0e 0x03 0x00 0x01>;
				mboxes = <0x0e 0x03 0x00>;
				label = "lpass";
				qcom,remote-pid = <0x02>;
			};
		};

		interrupt-controller@17a00000 {
			compatible = "arm,gic-v3";
			#interrupt-cells = <0x03>;
			interrupt-controller;
			reg = <0x00 0x17a00000 0x00 0x10000 0x00 0x17a60000 0x00 0x100000>;
			interrupts = <0x01 0x09 0x04>;
			phandle = <0x01>;
		};

		watchdog@17c10000 {
			compatible = "qcom,apss-wdt-sm8250\0qcom,kpss-wdt";
			reg = <0x00 0x17c10000 0x00 0x1000>;
			clocks = <0x10>;
		};

		timer@17c20000 {
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			compatible = "arm,armv7-timer-mem";
			reg = <0x00 0x17c20000 0x00 0x1000>;
			clock-frequency = <0x124f800>;

			frame@17c21000 {
				frame-number = <0x00>;
				interrupts = <0x00 0x08 0x04 0x00 0x06 0x04>;
				reg = <0x00 0x17c21000 0x00 0x1000 0x00 0x17c22000 0x00 0x1000>;
			};

			frame@17c23000 {
				frame-number = <0x01>;
				interrupts = <0x00 0x09 0x04>;
				reg = <0x00 0x17c23000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c25000 {
				frame-number = <0x02>;
				interrupts = <0x00 0x0a 0x04>;
				reg = <0x00 0x17c25000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c27000 {
				frame-number = <0x03>;
				interrupts = <0x00 0x0b 0x04>;
				reg = <0x00 0x17c27000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c29000 {
				frame-number = <0x04>;
				interrupts = <0x00 0x0c 0x04>;
				reg = <0x00 0x17c29000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c2b000 {
				frame-number = <0x05>;
				interrupts = <0x00 0x0d 0x04>;
				reg = <0x00 0x17c2b000 0x00 0x1000>;
				status = "disabled";
			};

			frame@17c2d000 {
				frame-number = <0x06>;
				interrupts = <0x00 0x0e 0x04>;
				reg = <0x00 0x17c2d000 0x00 0x1000>;
				status = "disabled";
			};
		};

		rsc@18200000 {
			label = "apps_rsc";
			compatible = "qcom,rpmh-rsc";
			reg = <0x00 0x18200000 0x00 0x10000 0x00 0x18210000 0x00 0x10000 0x00 0x18220000 0x00 0x10000>;
			reg-names = "drv-0\0drv-1\0drv-2";
			interrupts = <0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04>;
			qcom,tcs-offset = <0xd00>;
			qcom,drv-id = <0x02>;
			qcom,tcs-config = <0x02 0x02 0x00 0x03 0x01 0x03 0x03 0x01>;
			phandle = <0xe5>;

			clock-controller {
				compatible = "qcom,sm8250-rpmh-clk";
				#clock-cells = <0x01>;
				clock-names = "xo";
				clocks = <0x61>;
				phandle = <0x0f>;
			};

			power-controller {
				compatible = "qcom,sm8250-rpmhpd";
				#power-domain-cells = <0x01>;
				operating-points-v2 = <0x62>;
				phandle = <0x17>;

				opp-table {
					compatible = "operating-points-v2";
					phandle = <0x62>;

					opp1 {
						opp-level = <0x10>;
						phandle = <0xe6>;
					};

					opp2 {
						opp-level = <0x30>;
						phandle = <0x11>;
					};

					opp3 {
						opp-level = <0x40>;
						phandle = <0x12>;
					};

					opp4 {
						opp-level = <0x80>;
						phandle = <0x13>;
					};

					opp5 {
						opp-level = <0xc0>;
						phandle = <0xe7>;
					};

					opp6 {
						opp-level = <0x100>;
						phandle = <0xe8>;
					};

					opp7 {
						opp-level = <0x140>;
						phandle = <0xe9>;
					};

					opp8 {
						opp-level = <0x150>;
						phandle = <0xea>;
					};

					opp9 {
						opp-level = <0x180>;
						phandle = <0xeb>;
					};

					opp10 {
						opp-level = <0x1a0>;
						phandle = <0xec>;
					};
				};
			};

			bcm_voter {
				compatible = "qcom,bcm-voter";
				phandle = <0x44>;
			};

			pm8009-rpmh-regulators {
				compatible = "qcom,pm8009-1-rpmh-regulators";
				qcom,pmic-id = "f";
				vdd-s1-supply = <0x63>;
				vdd-s2-supply = <0x63>;
				vdd-l2-supply = <0x64>;
				vdd-l5-l6-supply = <0x65>;
				vdd-l7-supply = <0x48>;

				smps2 {
					regulator-name = "vreg_s2f_0p95";
					regulator-min-microvolt = <0xdbba0>;
					regulator-max-microvolt = <0xe86c0>;
					regulator-initial-mode = <0x02>;
					phandle = <0xed>;
				};

				ldo1 {
					regulator-name = "vreg_l1f_1p1";
					regulator-min-microvolt = <0x10d880>;
					regulator-max-microvolt = <0x10d880>;
					regulator-initial-mode = <0x03>;
					phandle = <0xee>;
				};

				ldo2 {
					regulator-name = "vreg_l2f_1p2";
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xef>;
				};

				ldo6 {
					regulator-name = "vreg_l6f_2p8";
					regulator-min-microvolt = <0x2ab980>;
					regulator-max-microvolt = <0x2ab980>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf0>;
				};

				ldo7 {
					regulator-name = "vreg_l7f_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf1>;
				};
			};

			pm8150-rpmh-regulators {
				compatible = "qcom,pm8150-rpmh-regulators";
				qcom,pmic-id = "a";
				vdd-s1-supply = <0x63>;
				vdd-s2-supply = <0x63>;
				vdd-s3-supply = <0x63>;
				vdd-s4-supply = <0x63>;
				vdd-s5-supply = <0x63>;
				vdd-s6-supply = <0x63>;
				vdd-s7-supply = <0x63>;
				vdd-s8-supply = <0x63>;
				vdd-s9-supply = <0x63>;
				vdd-s10-supply = <0x63>;
				vdd-l2-l10-supply = <0x65>;
				vdd-l3-l4-l5-l18-supply = <0x66>;
				vdd-l6-l9-supply = <0x64>;
				vdd-l7-l12-l14-l15-supply = <0x67>;
				vdd-l13-l16-l17-supply = <0x65>;

				ldo2 {
					regulator-name = "vreg_l2a_3p1";
					regulator-min-microvolt = <0x2ee000>;
					regulator-max-microvolt = <0x2ee000>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf2>;
				};

				ldo3 {
					regulator-name = "vreg_l3a_0p9";
					regulator-min-microvolt = <0xe2900>;
					regulator-max-microvolt = <0xe38a0>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf3>;
				};

				ldo5 {
					regulator-name = "vreg_l5a_0p88";
					regulator-min-microvolt = <0xd6d80>;
					regulator-max-microvolt = <0xd6d80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x4a>;
				};

				ldo6 {
					regulator-name = "vreg_l6a_1p2";
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x47>;
				};

				ldo7 {
					regulator-name = "vreg_l7a_1p7";
					regulator-min-microvolt = <0x1a0040>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf4>;
				};

				ldo9 {
					regulator-name = "vreg_l9a_1p2";
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x4b>;
				};

				ldo10 {
					regulator-name = "vreg_l10a_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf5>;
				};

				ldo12 {
					regulator-name = "vreg_l12a_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf6>;
				};

				ldo13 {
					regulator-name = "vreg_l13a_ts_3p0";
					regulator-min-microvolt = <0x2de600>;
					regulator-max-microvolt = <0x2de600>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf7>;
				};

				ldo14 {
					regulator-name = "vreg_l14a_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1cafc0>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf8>;
				};

				ldo15 {
					regulator-name = "vreg_l15a_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xf9>;
				};

				ldo16 {
					regulator-name = "vreg_l16a_2p7";
					regulator-min-microvolt = <0x294280>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xfa>;
				};

				ldo17 {
					regulator-name = "vreg_l17a_3p0";
					regulator-min-microvolt = <0x2b9440>;
					regulator-max-microvolt = <0x2de600>;
					regulator-initial-mode = <0x03>;
					phandle = <0x46>;
				};

				ldo18 {
					regulator-name = "vreg_l18a_0p92";
					regulator-min-microvolt = "\0\f5";
					regulator-max-microvolt = <0xdea80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xfb>;
				};

				smps5 {
					regulator-name = "vreg_s5a_1p9";
					regulator-min-microvolt = <0x1d0d80>;
					regulator-max-microvolt = <0x1e8480>;
					regulator-initial-mode = <0x03>;
					phandle = <0x67>;
				};

				smps6 {
					regulator-name = "vreg_s6a_0p95";
					regulator-min-microvolt = <0xe09c0>;
					regulator-max-microvolt = <0x113640>;
					regulator-initial-mode = <0x03>;
					phandle = <0x66>;
				};
			};

			pm8150l-rpmh-regulators {
				compatible = "qcom,pm8150l-rpmh-regulators";
				qcom,pmic-id = "c";
				vdd-s1-supply = <0x63>;
				vdd-s2-supply = <0x63>;
				vdd-s3-supply = <0x63>;
				vdd-s4-supply = <0x63>;
				vdd-s5-supply = <0x63>;
				vdd-s6-supply = <0x63>;
				vdd-s7-supply = <0x63>;
				vdd-s8-supply = <0x63>;
				vdd-l1-l8-supply = <0x48>;
				vdd-l2-l3-supply = <0x64>;
				vdd-l4-l5-l6-supply = <0x65>;
				vdd-l7-l11-supply = <0x65>;
				vdd-l9-l10-supply = <0x65>;
				vdd-bob-supply = <0x63>;

				bob {
					regulator-name = "vreg_bob";
					regulator-min-microvolt = <0x2de600>;
					regulator-max-microvolt = "\0=\t";
					regulator-initial-mode = <0x02>;
					phandle = <0x65>;
				};

				ldo1 {
					regulator-name = "vreg_l1c_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0xfc>;
				};

				ldo2 {
					regulator-name = "vreg_l2c_1p2";
					regulator-min-microvolt = <0x124f80>;
					regulator-max-microvolt = <0x124f80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xfd>;
				};

				ldo3 {
					regulator-name = "vreg_l3c_0p8";
					regulator-min-microvolt = "\0\f5";
					regulator-max-microvolt = "\0\f5";
					regulator-initial-mode = <0x03>;
					phandle = <0xfe>;
				};

				ldo4 {
					regulator-name = "vreg_l4c_1p7";
					regulator-min-microvolt = <0x1a0040>;
					regulator-max-microvolt = <0x2cad80>;
					regulator-initial-mode = <0x03>;
					phandle = <0xff>;
				};

				ldo5 {
					regulator-name = "vreg_l5c_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x2cad80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x100>;
				};

				ldo6 {
					regulator-name = "vreg_l6c_2p96";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x101>;
				};

				ldo7 {
					regulator-name = "vreg_l7c_cam_vcm0_2p85";
					regulator-min-microvolt = <0x2b9440>;
					regulator-max-microvolt = "\0/]";
					regulator-initial-mode = <0x03>;
					phandle = <0x102>;
				};

				ldo8 {
					regulator-name = "vreg_l8c_1p8";
					regulator-min-microvolt = <0x1b7740>;
					regulator-max-microvolt = <0x1b7740>;
					regulator-initial-mode = <0x03>;
					phandle = <0x103>;
				};

				ldo9 {
					regulator-name = "vreg_l9c_2p96";
					regulator-min-microvolt = <0x294280>;
					regulator-max-microvolt = <0x2d2a80>;
					regulator-initial-mode = <0x03>;
					phandle = <0x104>;
				};

				ldo10 {
					regulator-name = "vreg_l10c_3p0";
					regulator-min-microvolt = <0x2dc6c0>;
					regulator-max-microvolt = <0x2dc6c0>;
					regulator-initial-mode = <0x03>;
					phandle = <0x105>;
				};

				ldo11 {
					regulator-name = "vreg_l11c_3p3";
					regulator-min-microvolt = "\02K";
					regulator-max-microvolt = "\02K";
					regulator-initial-mode = <0x03>;
					regulator-always-on;
					phandle = <0x8e>;
				};

				smps8 {
					regulator-name = "vreg_s8c_1p3";
					regulator-min-microvolt = <0x14a140>;
					regulator-max-microvolt = <0x14a140>;
					regulator-initial-mode = <0x03>;
					phandle = <0x64>;
				};
			};
		};

		interconnect@18590000 {
			compatible = "qcom,sm8250-epss-l3";
			reg = <0x00 0x18590000 0x00 0x1000>;
			clocks = <0x0f 0x00 0x14 0x00>;
			clock-names = "xo\0alternate";
			#interconnect-cells = <0x01>;
			phandle = <0x106>;
		};

		cpufreq@18591000 {
			compatible = "qcom,sm8250-cpufreq-epss\0qcom,cpufreq-epss";
			reg = <0x00 0x18591000 0x00 0x1000 0x00 0x18592000 0x00 0x1000 0x00 0x18593000 0x00 0x1000>;
			reg-names = "freq-domain0\0freq-domain1\0freq-domain2";
			clocks = <0x0f 0x00 0x14 0x00>;
			clock-names = "xo\0alternate";
			#freq-domain-cells = <0x01>;
			phandle = <0x03>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
	};

	thermal-zones {

		cpu0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x01>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x69>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x6e>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x107>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x69>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x6e>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x02>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x6f>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x70>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x108>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x6f>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x70>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu2-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x03>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x71>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x72>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x109>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x71>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x72>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu3-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x04>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x73>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x74>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x10a>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x73>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x74>;
					cooling-device = <0x6a 0xffffffff 0xffffffff 0x6b 0xffffffff 0xffffffff 0x6c 0xffffffff 0xffffffff 0x6d 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu4-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x07>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x75>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x7a>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x10b>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x75>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x7a>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu5-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x08>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x7b>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x7c>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x10c>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x7b>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x7c>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu6-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x09>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x7d>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x7e>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x10d>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x7d>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x7e>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu7-top-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x0a>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x7f>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x80>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x10e>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x7f>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x80>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu4-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x0b>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x81>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x82>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x10f>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x81>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x82>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu5-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x0c>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x83>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x84>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x110>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x83>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x84>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu6-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x0d>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x85>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x86>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x111>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x85>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x86>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		cpu7-bottom-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x0e>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x87>;
				};

				trip-point1 {
					temperature = <0x17318>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x88>;
				};

				cpu_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x3e8>;
					type = "critical";
					phandle = <0x112>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x87>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};

				map1 {
					trip = <0x88>;
					cooling-device = <0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff 0x79 0xffffffff 0xffffffff>;
				};
			};
		};

		aoss0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x00>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x113>;
				};
			};
		};

		cluster0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x05>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x114>;
				};

				cluster0_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x115>;
				};
			};
		};

		cluster1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x06>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x116>;
				};

				cluster1_crit {
					temperature = <0x1adb0>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x117>;
				};
			};
		};

		gpu-thermal-top {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x68 0x0f>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x118>;
				};
			};
		};

		aoss1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x00>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x119>;
				};
			};
		};

		wlan-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x01>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x11a>;
				};
			};
		};

		video-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x02>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x11b>;
				};
			};
		};

		mem-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x03>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x11c>;
				};
			};
		};

		q6-hvx-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x04>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x11d>;
				};
			};
		};

		camera-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x05>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x11e>;
				};
			};
		};

		compute-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x06>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x11f>;
				};
			};
		};

		npu-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x07>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x120>;
				};
			};
		};

		gpu-thermal-bottom {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x89 0x08>;

			trips {

				trip-point0 {
					temperature = <0x15f90>;
					hysteresis = <0x7d0>;
					type = "hot";
					phandle = <0x121>;
				};
			};
		};

		pm8150 {
			polling-delay-passive = <0x64>;
			polling-delay = <0x00>;
			thermal-sensors = <0x8a>;

			trips {

				trip0 {
					temperature = <0x17318>;
					hysteresis = <0x00>;
					type = "passive";
				};

				trip1 {
					temperature = <0x1c138>;
					hysteresis = <0x00>;
					type = "hot";
				};

				trip2 {
					temperature = <0x23668>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};
		};

		pm8150b {
			polling-delay-passive = <0x64>;
			polling-delay = <0x00>;
			thermal-sensors = <0x8b>;

			trips {

				trip0 {
					temperature = <0x17318>;
					hysteresis = <0x00>;
					type = "passive";
				};

				trip1 {
					temperature = <0x1c138>;
					hysteresis = <0x00>;
					type = "hot";
				};

				trip2 {
					temperature = <0x23668>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};
		};

		pm8150l {
			polling-delay-passive = <0x64>;
			polling-delay = <0x00>;
			thermal-sensors = <0x8c>;

			trips {

				trip0 {
					temperature = <0x17318>;
					hysteresis = <0x00>;
					type = "passive";
				};

				trip1 {
					temperature = <0x1c138>;
					hysteresis = <0x00>;
					type = "hot";
				};

				trip2 {
					temperature = <0x23668>;
					hysteresis = <0x00>;
					type = "critical";
				};
			};
		};
	};

	dc12v-regulator {
		compatible = "regulator-fixed";
		regulator-name = "DC12V";
		regulator-min-microvolt = <0xb71b00>;
		regulator-max-microvolt = <0xb71b00>;
		regulator-always-on;
		phandle = <0x8f>;
	};

	leds {
		compatible = "gpio-leds";

		user4 {
			label = "green:user4";
			gpios = <0x8d 0x0a 0x00>;
			linux,default-trigger = "panic-indicator";
			default-state = "off";
		};

		wlan {
			label = "yellow:wlan";
			gpios = <0x8d 0x09 0x00>;
			linux,default-trigger = "phy0tx";
			default-state = "off";
		};

		bt {
			label = "blue:bt";
			gpios = <0x8d 0x07 0x00>;
			linux,default-trigger = "bluetooth-power";
			default-state = "off";
		};
	};

	vbat-regulator {
		compatible = "regulator-fixed";
		regulator-name = "VBAT";
		vin-supply = <0x8e>;
		regulator-min-microvolt = <0x401640>;
		regulator-max-microvolt = <0x401640>;
		regulator-always-on;
		phandle = <0x122>;
	};

	vbat-som-regulator {
		compatible = "regulator-fixed";
		regulator-name = "VBAT_SOM";
		vin-supply = <0x8f>;
		regulator-min-microvolt = <0x401640>;
		regulator-max-microvolt = <0x401640>;
		regulator-always-on;
		phandle = <0x123>;
	};

	vdc-3v3-regulator {
		compatible = "regulator-fixed";
		regulator-name = "VDC_3V3";
		vin-supply = <0x8f>;
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-always-on;
		phandle = <0x124>;
	};

	vdc-5v-regulator {
		compatible = "regulator-fixed";
		regulator-name = "VDC_5V";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-always-on;
		vin-supply = <0x8e>;
		phandle = <0x125>;
	};

	vph-pwr-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vph_pwr";
		regulator-min-microvolt = <0x387520>;
		regulator-max-microvolt = <0x387520>;
		regulator-always-on;
		phandle = <0x63>;
	};

	vreg-s4a-1p8 {
		compatible = "regulator-fixed";
		regulator-name = "vreg_s4a_1p8";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		regulator-always-on;
		phandle = <0x48>;
	};

	__symbols__ {
		xo_board = "/clocks/xo-board";
		sleep_clk = "/clocks/sleep-clk";
		CPU0 = "/cpus/cpu@0";
		L2_0 = "/cpus/cpu@0/l2-cache";
		L3_0 = "/cpus/cpu@0/l2-cache/l3-cache";
		CPU1 = "/cpus/cpu@100";
		L2_100 = "/cpus/cpu@100/l2-cache";
		CPU2 = "/cpus/cpu@200";
		L2_200 = "/cpus/cpu@200/l2-cache";
		CPU3 = "/cpus/cpu@300";
		L2_300 = "/cpus/cpu@300/l2-cache";
		CPU4 = "/cpus/cpu@400";
		L2_400 = "/cpus/cpu@400/l2-cache";
		CPU5 = "/cpus/cpu@500";
		L2_500 = "/cpus/cpu@500/l2-cache";
		CPU6 = "/cpus/cpu@600";
		L2_600 = "/cpus/cpu@600/l2-cache";
		CPU7 = "/cpus/cpu@700";
		L2_700 = "/cpus/cpu@700/l2-cache";
		scm = "/firmware/scm";
		hyp_mem = "/reserved-memory/memory@80000000";
		xbl_aop_mem = "/reserved-memory/memory@80700000";
		cmd_db = "/reserved-memory/memory@80860000";
		smem_mem = "/reserved-memory/memory@80900000";
		removed_mem = "/reserved-memory/memory@80b00000";
		camera_mem = "/reserved-memory/memory@86200000";
		wlan_mem = "/reserved-memory/memory@86700000";
		ipa_fw_mem = "/reserved-memory/memory@86800000";
		ipa_gsi_mem = "/reserved-memory/memory@86810000";
		gpu_mem = "/reserved-memory/memory@8681a000";
		npu_mem = "/reserved-memory/memory@86900000";
		video_mem = "/reserved-memory/memory@86e00000";
		cvp_mem = "/reserved-memory/memory@87300000";
		cdsp_mem = "/reserved-memory/memory@87800000";
		slpi_mem = "/reserved-memory/memory@88c00000";
		adsp_mem = "/reserved-memory/memory@8a100000";
		spss_mem = "/reserved-memory/memory@8be00000";
		cdsp_secure_heap = "/reserved-memory/memory@8bf00000";
		smem = "/qcom,smem";
		smp2p_adsp_out = "/smp2p-adsp/master-kernel";
		smp2p_adsp_in = "/smp2p-adsp/slave-kernel";
		smp2p_cdsp_out = "/smp2p-cdsp/master-kernel";
		smp2p_cdsp_in = "/smp2p-cdsp/slave-kernel";
		smp2p_slpi_out = "/smp2p-slpi/master-kernel";
		smp2p_slpi_in = "/smp2p-slpi/slave-kernel";
		soc = "/soc@0";
		gcc = "/soc@0/clock-controller@100000";
		ipcc = "/soc@0/mailbox@408000";
		qup_opp_table = "/soc@0/qup-opp-table";
		qupv3_id_2 = "/soc@0/geniqup@8c0000";
		i2c14 = "/soc@0/geniqup@8c0000/i2c@880000";
		spi14 = "/soc@0/geniqup@8c0000/spi@880000";
		i2c15 = "/soc@0/geniqup@8c0000/i2c@884000";
		spi15 = "/soc@0/geniqup@8c0000/spi@884000";
		i2c16 = "/soc@0/geniqup@8c0000/i2c@888000";
		spi16 = "/soc@0/geniqup@8c0000/spi@888000";
		i2c17 = "/soc@0/geniqup@8c0000/i2c@88c000";
		spi17 = "/soc@0/geniqup@8c0000/spi@88c000";
		uart17 = "/soc@0/geniqup@8c0000/serial@88c000";
		i2c18 = "/soc@0/geniqup@8c0000/i2c@890000";
		spi18 = "/soc@0/geniqup@8c0000/spi@890000";
		uart18 = "/soc@0/geniqup@8c0000/serial@890000";
		i2c19 = "/soc@0/geniqup@8c0000/i2c@894000";
		spi19 = "/soc@0/geniqup@8c0000/spi@894000";
		qupv3_id_0 = "/soc@0/geniqup@9c0000";
		i2c0 = "/soc@0/geniqup@9c0000/i2c@980000";
		spi0 = "/soc@0/geniqup@9c0000/spi@980000";
		i2c1 = "/soc@0/geniqup@9c0000/i2c@984000";
		spi1 = "/soc@0/geniqup@9c0000/spi@984000";
		i2c2 = "/soc@0/geniqup@9c0000/i2c@988000";
		spi2 = "/soc@0/geniqup@9c0000/spi@988000";
		uart2 = "/soc@0/geniqup@9c0000/serial@988000";
		i2c3 = "/soc@0/geniqup@9c0000/i2c@98c000";
		spi3 = "/soc@0/geniqup@9c0000/spi@98c000";
		i2c4 = "/soc@0/geniqup@9c0000/i2c@990000";
		spi4 = "/soc@0/geniqup@9c0000/spi@990000";
		i2c5 = "/soc@0/geniqup@9c0000/i2c@994000";
		spi5 = "/soc@0/geniqup@9c0000/spi@994000";
		i2c6 = "/soc@0/geniqup@9c0000/i2c@998000";
		spi6 = "/soc@0/geniqup@9c0000/spi@998000";
		uart6 = "/soc@0/geniqup@9c0000/serial@998000";
		i2c7 = "/soc@0/geniqup@9c0000/i2c@99c000";
		spi7 = "/soc@0/geniqup@9c0000/spi@99c000";
		qupv3_id_1 = "/soc@0/geniqup@ac0000";
		i2c8 = "/soc@0/geniqup@ac0000/i2c@a80000";
		spi8 = "/soc@0/geniqup@ac0000/spi@a80000";
		i2c9 = "/soc@0/geniqup@ac0000/i2c@a84000";
		spi9 = "/soc@0/geniqup@ac0000/spi@a84000";
		i2c10 = "/soc@0/geniqup@ac0000/i2c@a88000";
		spi10 = "/soc@0/geniqup@ac0000/spi@a88000";
		i2c11 = "/soc@0/geniqup@ac0000/i2c@a8c000";
		spi11 = "/soc@0/geniqup@ac0000/spi@a8c000";
		i2c12 = "/soc@0/geniqup@ac0000/i2c@a90000";
		spi12 = "/soc@0/geniqup@ac0000/spi@a90000";
		uart12 = "/soc@0/geniqup@ac0000/serial@a90000";
		i2c13 = "/soc@0/geniqup@ac0000/i2c@a94000";
		spi13 = "/soc@0/geniqup@ac0000/spi@a94000";
		config_noc = "/soc@0/interconnect@1500000";
		system_noc = "/soc@0/interconnect@1620000";
		mc_virt = "/soc@0/interconnect@163d000";
		aggre1_noc = "/soc@0/interconnect@16e0000";
		aggre2_noc = "/soc@0/interconnect@1700000";
		compute_noc = "/soc@0/interconnect@1733000";
		mmss_noc = "/soc@0/interconnect@1740000";
		ufs_mem_hc = "/soc@0/ufshc@1d84000";
		ufs_mem_phy = "/soc@0/phy@1d87000";
		ufs_mem_phy_lanes = "/soc@0/phy@1d87000/lanes@1d87400";
		ipa_virt = "/soc@0/interconnect@1e00000";
		tcsr_mutex = "/soc@0/hwlock@1f40000";
		gpu = "/soc@0/gpu@3d00000";
		gpu_opp_table = "/soc@0/gpu@3d00000/opp-table";
		gmu = "/soc@0/gmu@3d6a000";
		gmu_opp_table = "/soc@0/gmu@3d6a000/opp-table";
		gpucc = "/soc@0/clock-controller@3d90000";
		adreno_smmu = "/soc@0/iommu@3da0000";
		slpi = "/soc@0/remoteproc@5c00000";
		cdsp = "/soc@0/remoteproc@8300000";
		dc_noc = "/soc@0/interconnect@90c0000";
		gem_noc = "/soc@0/interconnect@9100000";
		npu_noc = "/soc@0/interconnect@9990000";
		pdc = "/soc@0/interrupt-controller@b220000";
		tsens0 = "/soc@0/thermal-sensor@c263000";
		tsens1 = "/soc@0/thermal-sensor@c265000";
		aoss_qmp = "/soc@0/qmp@c300000";
		spmi_bus = "/soc@0/spmi@c440000";
		pm8150_0 = "/soc@0/spmi@c440000/pmic@0";
		pon = "/soc@0/spmi@c440000/pmic@0/power-on@800";
		pm8150_temp = "/soc@0/spmi@c440000/pmic@0/temp-alarm@2400";
		pm8150_adc = "/soc@0/spmi@c440000/pmic@0/adc@3100";
		pm8150_gpios = "/soc@0/spmi@c440000/pmic@0/gpio@c000";
		pm8150b_temp = "/soc@0/spmi@c440000/pmic@2/temp-alarm@2400";
		pm8150b_adc = "/soc@0/spmi@c440000/pmic@2/adc@3100";
		pm8150b_gpios = "/soc@0/spmi@c440000/pmic@2/gpio@c000";
		pm8150l_temp = "/soc@0/spmi@c440000/pmic@4/temp-alarm@2400";
		pm8150l_adc = "/soc@0/spmi@c440000/pmic@4/adc@3100";
		pm8150l_gpios = "/soc@0/spmi@c440000/pmic@4/gpio@c000";
		tlmm = "/soc@0/pinctrl@f100000";
		qup_i2c0_default = "/soc@0/pinctrl@f100000/qup-i2c0-default";
		qup_i2c1_default = "/soc@0/pinctrl@f100000/qup-i2c1-default";
		qup_i2c2_default = "/soc@0/pinctrl@f100000/qup-i2c2-default";
		qup_i2c3_default = "/soc@0/pinctrl@f100000/qup-i2c3-default";
		qup_i2c4_default = "/soc@0/pinctrl@f100000/qup-i2c4-default";
		qup_i2c5_default = "/soc@0/pinctrl@f100000/qup-i2c5-default";
		qup_i2c6_default = "/soc@0/pinctrl@f100000/qup-i2c6-default";
		qup_i2c7_default = "/soc@0/pinctrl@f100000/qup-i2c7-default";
		qup_i2c8_default = "/soc@0/pinctrl@f100000/qup-i2c8-default";
		qup_i2c9_default = "/soc@0/pinctrl@f100000/qup-i2c9-default";
		qup_i2c10_default = "/soc@0/pinctrl@f100000/qup-i2c10-default";
		qup_i2c11_default = "/soc@0/pinctrl@f100000/qup-i2c11-default";
		qup_i2c12_default = "/soc@0/pinctrl@f100000/qup-i2c12-default";
		qup_i2c13_default = "/soc@0/pinctrl@f100000/qup-i2c13-default";
		qup_i2c14_default = "/soc@0/pinctrl@f100000/qup-i2c14-default";
		qup_i2c15_default = "/soc@0/pinctrl@f100000/qup-i2c15-default";
		qup_i2c16_default = "/soc@0/pinctrl@f100000/qup-i2c16-default";
		qup_i2c17_default = "/soc@0/pinctrl@f100000/qup-i2c17-default";
		qup_i2c18_default = "/soc@0/pinctrl@f100000/qup-i2c18-default";
		qup_i2c19_default = "/soc@0/pinctrl@f100000/qup-i2c19-default";
		qup_spi0_default = "/soc@0/pinctrl@f100000/qup-spi0-default";
		qup_spi1_default = "/soc@0/pinctrl@f100000/qup-spi1-default";
		qup_spi2_default = "/soc@0/pinctrl@f100000/qup-spi2-default";
		qup_spi3_default = "/soc@0/pinctrl@f100000/qup-spi3-default";
		qup_spi4_default = "/soc@0/pinctrl@f100000/qup-spi4-default";
		qup_spi5_default = "/soc@0/pinctrl@f100000/qup-spi5-default";
		qup_spi6_default = "/soc@0/pinctrl@f100000/qup-spi6-default";
		qup_spi7_default = "/soc@0/pinctrl@f100000/qup-spi7-default";
		qup_spi8_default = "/soc@0/pinctrl@f100000/qup-spi8-default";
		qup_spi9_default = "/soc@0/pinctrl@f100000/qup-spi9-default";
		qup_spi10_default = "/soc@0/pinctrl@f100000/qup-spi10-default";
		qup_spi11_default = "/soc@0/pinctrl@f100000/qup-spi11-default";
		qup_spi12_default = "/soc@0/pinctrl@f100000/qup-spi12-default";
		qup_spi13_default = "/soc@0/pinctrl@f100000/qup-spi13-default";
		qup_spi14_default = "/soc@0/pinctrl@f100000/qup-spi14-default";
		qup_spi15_default = "/soc@0/pinctrl@f100000/qup-spi15-default";
		qup_spi16_default = "/soc@0/pinctrl@f100000/qup-spi16-default";
		qup_spi17_default = "/soc@0/pinctrl@f100000/qup-spi17-default";
		qup_spi18_default = "/soc@0/pinctrl@f100000/qup-spi18-default";
		qup_spi19_default = "/soc@0/pinctrl@f100000/qup-spi19-default";
		qup_uart2_default = "/soc@0/pinctrl@f100000/qup-uart2-default";
		qup_uart6_default = "/soc@0/pinctrl@f100000/qup-uart6-default";
		qup_uart12_default = "/soc@0/pinctrl@f100000/qup-uart12-default";
		qup_uart17_default = "/soc@0/pinctrl@f100000/qup-uart17-default";
		qup_uart18_default = "/soc@0/pinctrl@f100000/qup-uart18-default";
		adsp = "/soc@0/remoteproc@17300000";
		intc = "/soc@0/interrupt-controller@17a00000";
		apps_rsc = "/soc@0/rsc@18200000";
		rpmhcc = "/soc@0/rsc@18200000/clock-controller";
		rpmhpd = "/soc@0/rsc@18200000/power-controller";
		rpmhpd_opp_table = "/soc@0/rsc@18200000/power-controller/opp-table";
		rpmhpd_opp_ret = "/soc@0/rsc@18200000/power-controller/opp-table/opp1";
		rpmhpd_opp_min_svs = "/soc@0/rsc@18200000/power-controller/opp-table/opp2";
		rpmhpd_opp_low_svs = "/soc@0/rsc@18200000/power-controller/opp-table/opp3";
		rpmhpd_opp_svs = "/soc@0/rsc@18200000/power-controller/opp-table/opp4";
		rpmhpd_opp_svs_l1 = "/soc@0/rsc@18200000/power-controller/opp-table/opp5";
		rpmhpd_opp_nom = "/soc@0/rsc@18200000/power-controller/opp-table/opp6";
		rpmhpd_opp_nom_l1 = "/soc@0/rsc@18200000/power-controller/opp-table/opp7";
		rpmhpd_opp_nom_l2 = "/soc@0/rsc@18200000/power-controller/opp-table/opp8";
		rpmhpd_opp_turbo = "/soc@0/rsc@18200000/power-controller/opp-table/opp9";
		rpmhpd_opp_turbo_l1 = "/soc@0/rsc@18200000/power-controller/opp-table/opp10";
		apps_bcm_voter = "/soc@0/rsc@18200000/bcm_voter";
		vreg_s2f_0p95 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/smps2";
		vreg_l1f_1p1 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo1";
		vreg_l2f_1p2 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo2";
		vreg_l6f_2p8 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo6";
		vreg_l7f_1p8 = "/soc@0/rsc@18200000/pm8009-rpmh-regulators/ldo7";
		vreg_l2a_3p1 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo2";
		vreg_l3a_0p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo3";
		vreg_l5a_0p88 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo5";
		vreg_l6a_1p2 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo6";
		vreg_l7a_1p7 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo7";
		vreg_l9a_1p2 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo9";
		vreg_l10a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo10";
		vreg_l12a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo12";
		vreg_l13a_ts_3p0 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo13";
		vreg_l14a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo14";
		vreg_l15a_1p8 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo15";
		vreg_l16a_2p7 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo16";
		vreg_l17a_3p0 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo17";
		vreg_l18a_0p92 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/ldo18";
		vreg_s5a_1p9 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/smps5";
		vreg_s6a_0p95 = "/soc@0/rsc@18200000/pm8150-rpmh-regulators/smps6";
		vreg_bob = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/bob";
		vreg_l1c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo1";
		vreg_l2c_1p2 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo2";
		vreg_l3c_0p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo3";
		vreg_l4c_1p7 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo4";
		vreg_l5c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo5";
		vreg_l6c_2p96 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo6";
		vreg_l7c_cam_vcm0_2p85 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo7";
		vreg_l8c_1p8 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo8";
		vreg_l9c_2p96 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo9";
		vreg_l10c_3p0 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo10";
		vreg_l11c_3p3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/ldo11";
		vreg_s8c_1p3 = "/soc@0/rsc@18200000/pm8150l-rpmh-regulators/smps8";
		epss_l3 = "/soc@0/interconnect@18590000";
		cpufreq_hw = "/soc@0/cpufreq@18591000";
		cpu0_alert0 = "/thermal-zones/cpu0-thermal/trips/trip-point0";
		cpu0_alert1 = "/thermal-zones/cpu0-thermal/trips/trip-point1";
		cpu0_crit = "/thermal-zones/cpu0-thermal/trips/cpu_crit";
		cpu1_alert0 = "/thermal-zones/cpu1-thermal/trips/trip-point0";
		cpu1_alert1 = "/thermal-zones/cpu1-thermal/trips/trip-point1";
		cpu1_crit = "/thermal-zones/cpu1-thermal/trips/cpu_crit";
		cpu2_alert0 = "/thermal-zones/cpu2-thermal/trips/trip-point0";
		cpu2_alert1 = "/thermal-zones/cpu2-thermal/trips/trip-point1";
		cpu2_crit = "/thermal-zones/cpu2-thermal/trips/cpu_crit";
		cpu3_alert0 = "/thermal-zones/cpu3-thermal/trips/trip-point0";
		cpu3_alert1 = "/thermal-zones/cpu3-thermal/trips/trip-point1";
		cpu3_crit = "/thermal-zones/cpu3-thermal/trips/cpu_crit";
		cpu4_top_alert0 = "/thermal-zones/cpu4-top-thermal/trips/trip-point0";
		cpu4_top_alert1 = "/thermal-zones/cpu4-top-thermal/trips/trip-point1";
		cpu4_top_crit = "/thermal-zones/cpu4-top-thermal/trips/cpu_crit";
		cpu5_top_alert0 = "/thermal-zones/cpu5-top-thermal/trips/trip-point0";
		cpu5_top_alert1 = "/thermal-zones/cpu5-top-thermal/trips/trip-point1";
		cpu5_top_crit = "/thermal-zones/cpu5-top-thermal/trips/cpu_crit";
		cpu6_top_alert0 = "/thermal-zones/cpu6-top-thermal/trips/trip-point0";
		cpu6_top_alert1 = "/thermal-zones/cpu6-top-thermal/trips/trip-point1";
		cpu6_top_crit = "/thermal-zones/cpu6-top-thermal/trips/cpu_crit";
		cpu7_top_alert0 = "/thermal-zones/cpu7-top-thermal/trips/trip-point0";
		cpu7_top_alert1 = "/thermal-zones/cpu7-top-thermal/trips/trip-point1";
		cpu7_top_crit = "/thermal-zones/cpu7-top-thermal/trips/cpu_crit";
		cpu4_bottom_alert0 = "/thermal-zones/cpu4-bottom-thermal/trips/trip-point0";
		cpu4_bottom_alert1 = "/thermal-zones/cpu4-bottom-thermal/trips/trip-point1";
		cpu4_bottom_crit = "/thermal-zones/cpu4-bottom-thermal/trips/cpu_crit";
		cpu5_bottom_alert0 = "/thermal-zones/cpu5-bottom-thermal/trips/trip-point0";
		cpu5_bottom_alert1 = "/thermal-zones/cpu5-bottom-thermal/trips/trip-point1";
		cpu5_bottom_crit = "/thermal-zones/cpu5-bottom-thermal/trips/cpu_crit";
		cpu6_bottom_alert0 = "/thermal-zones/cpu6-bottom-thermal/trips/trip-point0";
		cpu6_bottom_alert1 = "/thermal-zones/cpu6-bottom-thermal/trips/trip-point1";
		cpu6_bottom_crit = "/thermal-zones/cpu6-bottom-thermal/trips/cpu_crit";
		cpu7_bottom_alert0 = "/thermal-zones/cpu7-bottom-thermal/trips/trip-point0";
		cpu7_bottom_alert1 = "/thermal-zones/cpu7-bottom-thermal/trips/trip-point1";
		cpu7_bottom_crit = "/thermal-zones/cpu7-bottom-thermal/trips/cpu_crit";
		aoss0_alert0 = "/thermal-zones/aoss0-thermal/trips/trip-point0";
		cluster0_alert0 = "/thermal-zones/cluster0-thermal/trips/trip-point0";
		cluster0_crit = "/thermal-zones/cluster0-thermal/trips/cluster0_crit";
		cluster1_alert0 = "/thermal-zones/cluster1-thermal/trips/trip-point0";
		cluster1_crit = "/thermal-zones/cluster1-thermal/trips/cluster1_crit";
		gpu1_alert0 = "/thermal-zones/gpu-thermal-top/trips/trip-point0";
		aoss1_alert0 = "/thermal-zones/aoss1-thermal/trips/trip-point0";
		wlan_alert0 = "/thermal-zones/wlan-thermal/trips/trip-point0";
		video_alert0 = "/thermal-zones/video-thermal/trips/trip-point0";
		mem_alert0 = "/thermal-zones/mem-thermal/trips/trip-point0";
		q6_hvx_alert0 = "/thermal-zones/q6-hvx-thermal/trips/trip-point0";
		camera_alert0 = "/thermal-zones/camera-thermal/trips/trip-point0";
		compute_alert0 = "/thermal-zones/compute-thermal/trips/trip-point0";
		npu_alert0 = "/thermal-zones/npu-thermal/trips/trip-point0";
		gpu2_alert0 = "/thermal-zones/gpu-thermal-bottom/trips/trip-point0";
		dc12v = "/dc12v-regulator";
		vbat = "/vbat-regulator";
		vbat_som = "/vbat-som-regulator";
		vdc_3v3 = "/vdc-3v3-regulator";
		vdc_5v = "/vdc-5v-regulator";
		vph_pwr = "/vph-pwr-regulator";
		vreg_s4a_1p8 = "/vreg-s4a-1p8";
	};
};