/dts-v1/;

/ {
	compatible = "hisilicon,hip07-d05";
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "Hisilicon Hip07 D05 Development Board";

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu-map {

			cluster0 {

				core0 {
					cpu = <0x02>;
				};

				core1 {
					cpu = <0x03>;
				};

				core2 {
					cpu = <0x04>;
				};

				core3 {
					cpu = <0x05>;
				};
			};

			cluster1 {

				core0 {
					cpu = <0x06>;
				};

				core1 {
					cpu = <0x07>;
				};

				core2 {
					cpu = <0x08>;
				};

				core3 {
					cpu = <0x09>;
				};
			};

			cluster2 {

				core0 {
					cpu = <0x0a>;
				};

				core1 {
					cpu = <0x0b>;
				};

				core2 {
					cpu = <0x0c>;
				};

				core3 {
					cpu = <0x0d>;
				};
			};

			cluster3 {

				core0 {
					cpu = <0x0e>;
				};

				core1 {
					cpu = <0x0f>;
				};

				core2 {
					cpu = <0x10>;
				};

				core3 {
					cpu = <0x11>;
				};
			};

			cluster4 {

				core0 {
					cpu = <0x12>;
				};

				core1 {
					cpu = <0x13>;
				};

				core2 {
					cpu = <0x14>;
				};

				core3 {
					cpu = <0x15>;
				};
			};

			cluster5 {

				core0 {
					cpu = <0x16>;
				};

				core1 {
					cpu = <0x17>;
				};

				core2 {
					cpu = <0x18>;
				};

				core3 {
					cpu = <0x19>;
				};
			};

			cluster6 {

				core0 {
					cpu = <0x1a>;
				};

				core1 {
					cpu = <0x1b>;
				};

				core2 {
					cpu = <0x1c>;
				};

				core3 {
					cpu = <0x1d>;
				};
			};

			cluster7 {

				core0 {
					cpu = <0x1e>;
				};

				core1 {
					cpu = <0x1f>;
				};

				core2 {
					cpu = <0x20>;
				};

				core3 {
					cpu = <0x21>;
				};
			};

			cluster8 {

				core0 {
					cpu = <0x22>;
				};

				core1 {
					cpu = <0x23>;
				};

				core2 {
					cpu = <0x24>;
				};

				core3 {
					cpu = <0x25>;
				};
			};

			cluster9 {

				core0 {
					cpu = <0x26>;
				};

				core1 {
					cpu = <0x27>;
				};

				core2 {
					cpu = <0x28>;
				};

				core3 {
					cpu = <0x29>;
				};
			};

			cluster10 {

				core0 {
					cpu = <0x2a>;
				};

				core1 {
					cpu = <0x2b>;
				};

				core2 {
					cpu = <0x2c>;
				};

				core3 {
					cpu = <0x2d>;
				};
			};

			cluster11 {

				core0 {
					cpu = <0x2e>;
				};

				core1 {
					cpu = <0x2f>;
				};

				core2 {
					cpu = <0x30>;
				};

				core3 {
					cpu = <0x31>;
				};
			};

			cluster12 {

				core0 {
					cpu = <0x32>;
				};

				core1 {
					cpu = <0x33>;
				};

				core2 {
					cpu = <0x34>;
				};

				core3 {
					cpu = <0x35>;
				};
			};

			cluster13 {

				core0 {
					cpu = <0x36>;
				};

				core1 {
					cpu = <0x37>;
				};

				core2 {
					cpu = <0x38>;
				};

				core3 {
					cpu = <0x39>;
				};
			};

			cluster14 {

				core0 {
					cpu = <0x3a>;
				};

				core1 {
					cpu = <0x3b>;
				};

				core2 {
					cpu = <0x3c>;
				};

				core3 {
					cpu = <0x3d>;
				};
			};

			cluster15 {

				core0 {
					cpu = <0x3e>;
				};

				core1 {
					cpu = <0x3f>;
				};

				core2 {
					cpu = <0x40>;
				};

				core3 {
					cpu = <0x41>;
				};
			};
		};

		cpu@10000 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10000>;
			enable-method = "psci";
			next-level-cache = <0x42>;
			numa-node-id = <0x00>;
			phandle = <0x02>;
		};

		cpu@10001 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10001>;
			enable-method = "psci";
			next-level-cache = <0x42>;
			numa-node-id = <0x00>;
			phandle = <0x03>;
		};

		cpu@10002 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10002>;
			enable-method = "psci";
			next-level-cache = <0x42>;
			numa-node-id = <0x00>;
			phandle = <0x04>;
		};

		cpu@10003 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10003>;
			enable-method = "psci";
			next-level-cache = <0x42>;
			numa-node-id = <0x00>;
			phandle = <0x05>;
		};

		cpu@10100 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10100>;
			enable-method = "psci";
			next-level-cache = <0x43>;
			numa-node-id = <0x00>;
			phandle = <0x06>;
		};

		cpu@10101 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10101>;
			enable-method = "psci";
			next-level-cache = <0x43>;
			numa-node-id = <0x00>;
			phandle = <0x07>;
		};

		cpu@10102 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10102>;
			enable-method = "psci";
			next-level-cache = <0x43>;
			numa-node-id = <0x00>;
			phandle = <0x08>;
		};

		cpu@10103 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10103>;
			enable-method = "psci";
			next-level-cache = <0x43>;
			numa-node-id = <0x00>;
			phandle = <0x09>;
		};

		cpu@10200 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10200>;
			enable-method = "psci";
			next-level-cache = <0x44>;
			numa-node-id = <0x00>;
			phandle = <0x0a>;
		};

		cpu@10201 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10201>;
			enable-method = "psci";
			next-level-cache = <0x44>;
			numa-node-id = <0x00>;
			phandle = <0x0b>;
		};

		cpu@10202 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10202>;
			enable-method = "psci";
			next-level-cache = <0x44>;
			numa-node-id = <0x00>;
			phandle = <0x0c>;
		};

		cpu@10203 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10203>;
			enable-method = "psci";
			next-level-cache = <0x44>;
			numa-node-id = <0x00>;
			phandle = <0x0d>;
		};

		cpu@10300 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10300>;
			enable-method = "psci";
			next-level-cache = <0x45>;
			numa-node-id = <0x00>;
			phandle = <0x0e>;
		};

		cpu@10301 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10301>;
			enable-method = "psci";
			next-level-cache = <0x45>;
			numa-node-id = <0x00>;
			phandle = <0x0f>;
		};

		cpu@10302 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10302>;
			enable-method = "psci";
			next-level-cache = <0x45>;
			numa-node-id = <0x00>;
			phandle = <0x10>;
		};

		cpu@10303 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x10303>;
			enable-method = "psci";
			next-level-cache = <0x45>;
			numa-node-id = <0x00>;
			phandle = <0x11>;
		};

		cpu@30000 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30000>;
			enable-method = "psci";
			next-level-cache = <0x46>;
			numa-node-id = <0x01>;
			phandle = <0x12>;
		};

		cpu@30001 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30001>;
			enable-method = "psci";
			next-level-cache = <0x46>;
			numa-node-id = <0x01>;
			phandle = <0x13>;
		};

		cpu@30002 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30002>;
			enable-method = "psci";
			next-level-cache = <0x46>;
			numa-node-id = <0x01>;
			phandle = <0x14>;
		};

		cpu@30003 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30003>;
			enable-method = "psci";
			next-level-cache = <0x46>;
			numa-node-id = <0x01>;
			phandle = <0x15>;
		};

		cpu@30100 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30100>;
			enable-method = "psci";
			next-level-cache = <0x47>;
			numa-node-id = <0x01>;
			phandle = <0x16>;
		};

		cpu@30101 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30101>;
			enable-method = "psci";
			next-level-cache = <0x47>;
			numa-node-id = <0x01>;
			phandle = <0x17>;
		};

		cpu@30102 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30102>;
			enable-method = "psci";
			next-level-cache = <0x47>;
			numa-node-id = <0x01>;
			phandle = <0x18>;
		};

		cpu@30103 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30103>;
			enable-method = "psci";
			next-level-cache = <0x47>;
			numa-node-id = <0x01>;
			phandle = <0x19>;
		};

		cpu@30200 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30200>;
			enable-method = "psci";
			next-level-cache = <0x48>;
			numa-node-id = <0x01>;
			phandle = <0x1a>;
		};

		cpu@30201 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30201>;
			enable-method = "psci";
			next-level-cache = <0x48>;
			numa-node-id = <0x01>;
			phandle = <0x1b>;
		};

		cpu@30202 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30202>;
			enable-method = "psci";
			next-level-cache = <0x48>;
			numa-node-id = <0x01>;
			phandle = <0x1c>;
		};

		cpu@30203 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30203>;
			enable-method = "psci";
			next-level-cache = <0x48>;
			numa-node-id = <0x01>;
			phandle = <0x1d>;
		};

		cpu@30300 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30300>;
			enable-method = "psci";
			next-level-cache = <0x49>;
			numa-node-id = <0x01>;
			phandle = <0x1e>;
		};

		cpu@30301 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30301>;
			enable-method = "psci";
			next-level-cache = <0x49>;
			numa-node-id = <0x01>;
			phandle = <0x1f>;
		};

		cpu@30302 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30302>;
			enable-method = "psci";
			next-level-cache = <0x49>;
			numa-node-id = <0x01>;
			phandle = <0x20>;
		};

		cpu@30303 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x30303>;
			enable-method = "psci";
			next-level-cache = <0x49>;
			numa-node-id = <0x01>;
			phandle = <0x21>;
		};

		cpu@50000 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50000>;
			enable-method = "psci";
			next-level-cache = <0x4a>;
			numa-node-id = <0x02>;
			phandle = <0x22>;
		};

		cpu@50001 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50001>;
			enable-method = "psci";
			next-level-cache = <0x4a>;
			numa-node-id = <0x02>;
			phandle = <0x23>;
		};

		cpu@50002 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50002>;
			enable-method = "psci";
			next-level-cache = <0x4a>;
			numa-node-id = <0x02>;
			phandle = <0x24>;
		};

		cpu@50003 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50003>;
			enable-method = "psci";
			next-level-cache = <0x4a>;
			numa-node-id = <0x02>;
			phandle = <0x25>;
		};

		cpu@50100 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50100>;
			enable-method = "psci";
			next-level-cache = <0x4b>;
			numa-node-id = <0x02>;
			phandle = <0x26>;
		};

		cpu@50101 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50101>;
			enable-method = "psci";
			next-level-cache = <0x4b>;
			numa-node-id = <0x02>;
			phandle = <0x27>;
		};

		cpu@50102 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50102>;
			enable-method = "psci";
			next-level-cache = <0x4b>;
			numa-node-id = <0x02>;
			phandle = <0x28>;
		};

		cpu@50103 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50103>;
			enable-method = "psci";
			next-level-cache = <0x4b>;
			numa-node-id = <0x02>;
			phandle = <0x29>;
		};

		cpu@50200 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50200>;
			enable-method = "psci";
			next-level-cache = <0x4c>;
			numa-node-id = <0x02>;
			phandle = <0x2a>;
		};

		cpu@50201 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50201>;
			enable-method = "psci";
			next-level-cache = <0x4c>;
			numa-node-id = <0x02>;
			phandle = <0x2b>;
		};

		cpu@50202 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50202>;
			enable-method = "psci";
			next-level-cache = <0x4c>;
			numa-node-id = <0x02>;
			phandle = <0x2c>;
		};

		cpu@50203 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50203>;
			enable-method = "psci";
			next-level-cache = <0x4c>;
			numa-node-id = <0x02>;
			phandle = <0x2d>;
		};

		cpu@50300 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50300>;
			enable-method = "psci";
			next-level-cache = <0x4d>;
			numa-node-id = <0x02>;
			phandle = <0x2e>;
		};

		cpu@50301 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50301>;
			enable-method = "psci";
			next-level-cache = <0x4d>;
			numa-node-id = <0x02>;
			phandle = <0x2f>;
		};

		cpu@50302 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50302>;
			enable-method = "psci";
			next-level-cache = <0x4d>;
			numa-node-id = <0x02>;
			phandle = <0x30>;
		};

		cpu@50303 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x50303>;
			enable-method = "psci";
			next-level-cache = <0x4d>;
			numa-node-id = <0x02>;
			phandle = <0x31>;
		};

		cpu@70000 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70000>;
			enable-method = "psci";
			next-level-cache = <0x4e>;
			numa-node-id = <0x03>;
			phandle = <0x32>;
		};

		cpu@70001 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70001>;
			enable-method = "psci";
			next-level-cache = <0x4e>;
			numa-node-id = <0x03>;
			phandle = <0x33>;
		};

		cpu@70002 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70002>;
			enable-method = "psci";
			next-level-cache = <0x4e>;
			numa-node-id = <0x03>;
			phandle = <0x34>;
		};

		cpu@70003 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70003>;
			enable-method = "psci";
			next-level-cache = <0x4e>;
			numa-node-id = <0x03>;
			phandle = <0x35>;
		};

		cpu@70100 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70100>;
			enable-method = "psci";
			next-level-cache = <0x4f>;
			numa-node-id = <0x03>;
			phandle = <0x36>;
		};

		cpu@70101 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70101>;
			enable-method = "psci";
			next-level-cache = <0x4f>;
			numa-node-id = <0x03>;
			phandle = <0x37>;
		};

		cpu@70102 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70102>;
			enable-method = "psci";
			next-level-cache = <0x4f>;
			numa-node-id = <0x03>;
			phandle = <0x38>;
		};

		cpu@70103 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70103>;
			enable-method = "psci";
			next-level-cache = <0x4f>;
			numa-node-id = <0x03>;
			phandle = <0x39>;
		};

		cpu@70200 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70200>;
			enable-method = "psci";
			next-level-cache = <0x50>;
			numa-node-id = <0x03>;
			phandle = <0x3a>;
		};

		cpu@70201 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70201>;
			enable-method = "psci";
			next-level-cache = <0x50>;
			numa-node-id = <0x03>;
			phandle = <0x3b>;
		};

		cpu@70202 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70202>;
			enable-method = "psci";
			next-level-cache = <0x50>;
			numa-node-id = <0x03>;
			phandle = <0x3c>;
		};

		cpu@70203 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70203>;
			enable-method = "psci";
			next-level-cache = <0x50>;
			numa-node-id = <0x03>;
			phandle = <0x3d>;
		};

		cpu@70300 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70300>;
			enable-method = "psci";
			next-level-cache = <0x51>;
			numa-node-id = <0x03>;
			phandle = <0x3e>;
		};

		cpu@70301 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70301>;
			enable-method = "psci";
			next-level-cache = <0x51>;
			numa-node-id = <0x03>;
			phandle = <0x3f>;
		};

		cpu@70302 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70302>;
			enable-method = "psci";
			next-level-cache = <0x51>;
			numa-node-id = <0x03>;
			phandle = <0x40>;
		};

		cpu@70303 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x70303>;
			enable-method = "psci";
			next-level-cache = <0x51>;
			numa-node-id = <0x03>;
			phandle = <0x41>;
		};

		l2-cache0 {
			compatible = "cache";
			phandle = <0x42>;
		};

		l2-cache1 {
			compatible = "cache";
			phandle = <0x43>;
		};

		l2-cache2 {
			compatible = "cache";
			phandle = <0x44>;
		};

		l2-cache3 {
			compatible = "cache";
			phandle = <0x45>;
		};

		l2-cache4 {
			compatible = "cache";
			phandle = <0x46>;
		};

		l2-cache5 {
			compatible = "cache";
			phandle = <0x47>;
		};

		l2-cache6 {
			compatible = "cache";
			phandle = <0x48>;
		};

		l2-cache7 {
			compatible = "cache";
			phandle = <0x49>;
		};

		l2-cache8 {
			compatible = "cache";
			phandle = <0x4a>;
		};

		l2-cache9 {
			compatible = "cache";
			phandle = <0x4b>;
		};

		l2-cache10 {
			compatible = "cache";
			phandle = <0x4c>;
		};

		l2-cache11 {
			compatible = "cache";
			phandle = <0x4d>;
		};

		l2-cache12 {
			compatible = "cache";
			phandle = <0x4e>;
		};

		l2-cache13 {
			compatible = "cache";
			phandle = <0x4f>;
		};

		l2-cache14 {
			compatible = "cache";
			phandle = <0x50>;
		};

		l2-cache15 {
			compatible = "cache";
			phandle = <0x51>;
		};
	};

	interrupt-controller@4d000000 {
		compatible = "arm,gic-v3";
		#interrupt-cells = <0x03>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		interrupt-controller;
		#redistributor-regions = <0x04>;
		redistributor-stride = <0x00 0x40000>;
		reg = <0x00 0x4d000000 0x00 0x10000 0x00 0x4d100000 0x00 0x400000 0x00 0x6d100000 0x00 0x400000 0x400 0x4d100000 0x00 0x400000 0x400 0x6d100000 0x00 0x400000 0x00 0xfe000000 0x00 0x10000 0x00 0xfe010000 0x00 0x10000 0x00 0xfe020000 0x00 0x10000>;
		interrupts = <0x01 0x09 0x04>;
		phandle = <0x01>;

		interrupt-controller@4c000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x00 0x4c000000 0x00 0x40000>;
			phandle = <0x77>;
		};

		interrupt-controller@6c000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x00 0x6c000000 0x00 0x40000>;
			phandle = <0x52>;
		};

		interrupt-controller@c6000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x00 0xc6000000 0x00 0x40000>;
			phandle = <0x53>;
		};

		interrupt-controller@8,c6000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x08 0xc6000000 0x00 0x40000>;
			phandle = <0x54>;
		};

		interrupt-controller@400,4c000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x400 0x4c000000 0x00 0x40000>;
			phandle = <0x78>;
		};

		interrupt-controller@400,6c000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x400 0x6c000000 0x00 0x40000>;
			phandle = <0x79>;
		};

		interrupt-controller@400,c6000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x400 0xc6000000 0x00 0x40000>;
			phandle = <0x55>;
		};

		interrupt-controller@408,c6000000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <0x01>;
			reg = <0x408 0xc6000000 0x00 0x40000>;
			phandle = <0x56>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>;
	};

	pmu {
		compatible = "arm,cortex-a72-pmu";
		interrupts = <0x01 0x07 0x04>;
	};

	interrupt-controller@60080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x00 0x60080000 0x00 0x10000>;
		phandle = <0x7a>;

		uart_intc {
			msi-parent = <0x52 0x120c7>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x01>;
			phandle = <0x5b>;
		};
	};

	interrupt-controller@a0080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x00 0xa0080000 0x00 0x10000>;
		phandle = <0x7b>;

		intc_pcie2_a {
			msi-parent = <0x53 0x40087>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x0a>;
			phandle = <0x6e>;
		};

		intc_sas1 {
			msi-parent = <0x53 0x40000>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x80>;
			phandle = <0x6c>;
		};

		intc_sas2 {
			msi-parent = <0x53 0x40040>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x80>;
			phandle = <0x6d>;
		};

		intc_smmu_pcie {
			msi-parent = <0x53 0x40b0c>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x03>;
			phandle = <0x7c>;
		};

		intc_usb {
			msi-parent = <0x53 0x40080>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x02>;
			phandle = <0x5c>;
		};
	};

	interrupt-controller@d0080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x00 0xd0080000 0x00 0x10000>;
		phandle = <0x7d>;

		intc_sec {
			msi-parent = <0x53 0x40400>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x21>;
			phandle = <0x6f>;
		};

		intc_smmu_alg {
			msi-parent = <0x53 0x40b1b>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x03>;
			phandle = <0x57>;
		};
	};

	interrupt-controller@8,d0080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x08 0xd0080000 0x00 0x10000>;
		phandle = <0x7e>;

		intc_sec {
			msi-parent = <0x54 0x42400>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x21>;
			phandle = <0x71>;
		};

		intc_smmu_alg {
			msi-parent = <0x54 0x42b1b>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x03>;
			phandle = <0x58>;
		};
	};

	interrupt-controller@400,d0080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x400 0xd0080000 0x00 0x10000>;
		phandle = <0x7f>;

		intc_sec {
			msi-parent = <0x55 0x44400>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x21>;
			phandle = <0x73>;
		};

		intc_smmu_alg {
			msi-parent = <0x55 0x44b1b>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x03>;
			phandle = <0x59>;
		};
	};

	interrupt-controller@408,d0080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x408 0xd0080000 0x00 0x10000>;
		phandle = <0x80>;

		intc_sec {
			msi-parent = <0x56 0x46400>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x21>;
			phandle = <0x75>;
		};

		intc_smmu_alg {
			msi-parent = <0x56 0x46b1b>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x03>;
			phandle = <0x5a>;
		};
	};

	interrupt-controller@c0080000 {
		compatible = "hisilicon,mbigen-v2";
		reg = <0x00 0xc0080000 0x00 0x10000>;
		phandle = <0x81>;

		intc_dsaf0 {
			msi-parent = <0x53 0x40800>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x199>;
			phandle = <0x5e>;
		};

		intc-roce {
			msi-parent = <0x53 0x40b1e>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x22>;
			phandle = <0x69>;
		};

		intc-sas0 {
			msi-parent = <0x53 0x40900>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x80>;
			phandle = <0x6a>;
		};

		intc_smmu_dsa {
			msi-parent = <0x53 0x40b20>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			num-pins = <0x03>;
			phandle = <0x82>;
		};
	};

	smmu_pcie {
		compatible = "arm,smmu-v3";
		reg = <0x00 0xa0040000 0x00 0x20000>;
		#iommu-cells = <0x01>;
		dma-coherent;
		smmu-cb-memtype = <0x00 0x01>;
		hisilicon,broken-prefetch-cmd;
		status = "disabled";
		phandle = <0x83>;
	};

	smmu_alg@d0040000 {
		compatible = "arm,smmu-v3";
		reg = <0x00 0xd0040000 0x00 0x20000>;
		interrupt-parent = <0x57>;
		interrupts = <0x2dd 0x01 0x2de 0x01 0x2df 0x01>;
		interrupt-names = "eventq\0gerror\0priq";
		#iommu-cells = <0x01>;
		dma-coherent;
		hisilicon,broken-prefetch-cmd;
		phandle = <0x70>;
	};

	smmu_alg@8,d0040000 {
		compatible = "arm,smmu-v3";
		reg = <0x08 0xd0040000 0x00 0x20000>;
		interrupt-parent = <0x58>;
		interrupts = <0x2dd 0x01 0x2de 0x01 0x2df 0x01>;
		interrupt-names = "eventq\0gerror\0priq";
		#iommu-cells = <0x01>;
		dma-coherent;
		hisilicon,broken-prefetch-cmd;
		phandle = <0x72>;
	};

	smmu_alg@400,d0040000 {
		compatible = "arm,smmu-v3";
		reg = <0x400 0xd0040000 0x00 0x20000>;
		interrupt-parent = <0x59>;
		interrupts = <0x2dd 0x01 0x2de 0x01 0x2df 0x01>;
		interrupt-names = "eventq\0gerror\0priq";
		#iommu-cells = <0x01>;
		dma-coherent;
		hisilicon,broken-prefetch-cmd;
		phandle = <0x74>;
	};

	smmu_alg@408,d0040000 {
		compatible = "arm,smmu-v3";
		reg = <0x408 0xd0040000 0x00 0x20000>;
		interrupt-parent = <0x5a>;
		interrupts = <0x2dd 0x01 0x2de 0x01 0x2df 0x01>;
		interrupt-names = "eventq\0gerror\0priq";
		#iommu-cells = <0x01>;
		dma-coherent;
		hisilicon,broken-prefetch-cmd;
		phandle = <0x76>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		isa@a01b0000 {
			compatible = "hisilicon,hip07-lpc";
			#size-cells = <0x01>;
			#address-cells = <0x02>;
			reg = <0x00 0xa01b0000 0x00 0x1000>;

			bt@e4 {
				compatible = "ipmi-bt";
				device_type = "ipmi";
				reg = <0x01 0xe4 0x04>;
				status = "okay";
				phandle = <0x84>;
			};
		};

		uart@602b0000 {
			compatible = "arm,sbsa-uart";
			reg = <0x00 0x602b0000 0x00 0x1000>;
			interrupt-parent = <0x5b>;
			interrupts = <0x327 0x04>;
			current-speed = <0x1c200>;
			reg-io-width = <0x04>;
			status = "okay";
			phandle = <0x85>;
		};

		ohci@a7030000 {
			compatible = "generic-ohci";
			reg = <0x00 0xa7030000 0x00 0x10000>;
			interrupt-parent = <0x5c>;
			interrupts = <0x280 0x04>;
			dma-coherent;
			status = "okay";
			phandle = <0x86>;
		};

		ehci@a7020000 {
			compatible = "generic-ehci";
			reg = <0x00 0xa7020000 0x00 0x10000>;
			interrupt-parent = <0x5c>;
			interrupts = <0x281 0x04>;
			dma-coherent;
			status = "okay";
			phandle = <0x87>;
		};

		sub_ctrl_c@60000000 {
			compatible = "hisilicon,peri-subctrl\0syscon";
			reg = <0x00 0x60000000 0x00 0x10000>;
			phandle = <0x5d>;
		};

		dsa_subctrl@c0000000 {
			compatible = "hisilicon,dsa-subctrl\0syscon";
			reg = <0x00 0xc0000000 0x00 0x10000>;
			phandle = <0x5f>;
		};

		dsa_cpld@78000010 {
			compatible = "syscon";
			reg = <0x00 0x78000010 0x00 0x100>;
			reg-io-width = <0x02>;
			phandle = <0x61>;
		};

		pcie_subctl@a0000000 {
			compatible = "hisilicon,pcie-sas-subctrl\0syscon";
			reg = <0x00 0xa0000000 0x00 0x10000>;
			phandle = <0x6b>;
		};

		sds_ctrl@c2200000 {
			compatible = "syscon";
			reg = <0x00 0xc2200000 0x00 0x80000>;
			phandle = <0x60>;
		};

		mdio@603c0000 {
			compatible = "hisilicon,hns-mdio";
			reg = <0x00 0x603c0000 0x00 0x1000>;
			subctrl-vbase = <0x5d 0x338 0xa38 0x531c 0x5a1c>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			ethernet-phy@0 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <0x00>;
				phandle = <0x62>;
			};

			ethernet-phy@1 {
				compatible = "ethernet-phy-ieee802.3-c22";
				reg = <0x01>;
				phandle = <0x63>;
			};
		};

		dsa@c7000000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "hisilicon,hns-dsaf-v2";
			mode = "6port-16rss";
			reg = <0x00 0xc5000000 0x00 0x890000 0x00 0xc7000000 0x00 0x600000>;
			reg-names = "ppe-base\0dsaf-base";
			interrupt-parent = <0x5e>;
			subctrl-syscon = <0x5f>;
			reset-field-offset = <0x00>;
			interrupts = <0x240 0x01 0x241 0x01 0x242 0x01 0x243 0x01 0x244 0x01 0x245 0x01 0x246 0x01 0x247 0x01 0x248 0x01 0x249 0x01 0x24a 0x01 0x24b 0x01 0x24c 0x01 0x24d 0x01 0x24e 0x01 0x24f 0x01 0x250 0x01 0x251 0x01 0x252 0x01 0x253 0x01 0x254 0x01 0x255 0x01 0x256 0x01 0x257 0x01 0x258 0x01 0x3c0 0x01 0x3c1 0x01 0x3c2 0x01 0x3c3 0x01 0x3c4 0x01 0x3c5 0x01 0x3c6 0x01 0x3c7 0x01 0x3c8 0x01 0x3c9 0x01 0x3ca 0x01 0x3cb 0x01 0x3cc 0x01 0x3cd 0x01 0x3ce 0x01 0x3cf 0x01 0x3d0 0x01 0x3d1 0x01 0x3d2 0x01 0x3d3 0x01 0x3d4 0x01 0x3d5 0x01 0x3d6 0x01 0x3d7 0x01 0x3d8 0x01 0x3d9 0x01 0x3da 0x01 0x3db 0x01 0x3dc 0x01 0x3dd 0x01 0x3de 0x01 0x3df 0x01 0x3e0 0x01 0x3e1 0x01 0x3e2 0x01 0x3e3 0x01 0x3e4 0x01 0x3e5 0x01 0x3e6 0x01 0x3e7 0x01 0x3e8 0x01 0x3e9 0x01 0x3ea 0x01 0x3eb 0x01 0x3ec 0x01 0x3ed 0x01 0x3ee 0x01 0x3ef 0x01 0x3f0 0x01 0x3f1 0x01 0x3f2 0x01 0x3f3 0x01 0x3f4 0x01 0x3f5 0x01 0x3f6 0x01 0x3f7 0x01 0x3f8 0x01 0x3f9 0x01 0x3fa 0x01 0x3fb 0x01 0x3fc 0x01 0x3fd 0x01 0x3fe 0x01 0x3ff 0x01 0x400 0x01 0x401 0x01 0x402 0x01 0x403 0x01 0x404 0x01 0x405 0x01 0x406 0x01 0x407 0x01 0x408 0x01 0x409 0x01 0x40a 0x01 0x40b 0x01 0x40c 0x01 0x40d 0x01 0x40e 0x01 0x40f 0x01 0x410 0x01 0x411 0x01 0x412 0x01 0x413 0x01 0x414 0x01 0x415 0x01 0x416 0x01 0x417 0x01 0x418 0x01 0x419 0x01 0x41a 0x01 0x41b 0x01 0x41c 0x01 0x41d 0x01 0x41e 0x01 0x41f 0x01 0x420 0x01 0x421 0x01 0x422 0x01 0x423 0x01 0x424 0x01 0x425 0x01 0x426 0x01 0x427 0x01 0x428 0x01 0x429 0x01 0x42a 0x01 0x42b 0x01 0x42c 0x01 0x42d 0x01 0x42e 0x01 0x42f 0x01 0x430 0x01 0x431 0x01 0x432 0x01 0x433 0x01 0x434 0x01 0x435 0x01 0x436 0x01 0x437 0x01 0x438 0x01 0x439 0x01 0x43a 0x01 0x43b 0x01 0x43c 0x01 0x43d 0x01 0x43e 0x01 0x43f 0x01 0x440 0x01 0x441 0x01 0x442 0x01 0x443 0x01 0x444 0x01 0x445 0x01 0x446 0x01 0x447 0x01 0x448 0x01 0x449 0x01 0x44a 0x01 0x44b 0x01 0x44c 0x01 0x44d 0x01 0x44e 0x01 0x44f 0x01 0x450 0x01 0x451 0x01 0x452 0x01 0x453 0x01 0x454 0x01 0x455 0x01 0x456 0x01 0x457 0x01 0x458 0x01 0x459 0x01 0x45a 0x01 0x45b 0x01 0x45c 0x01 0x45d 0x01 0x45e 0x01 0x45f 0x01 0x460 0x01 0x461 0x01 0x462 0x01 0x463 0x01 0x464 0x01 0x465 0x01 0x466 0x01 0x467 0x01 0x468 0x01 0x469 0x01 0x46a 0x01 0x46b 0x01 0x46c 0x01 0x46d 0x01 0x46e 0x01 0x46f 0x01 0x470 0x01 0x471 0x01 0x472 0x01 0x473 0x01 0x474 0x01 0x475 0x01 0x476 0x01 0x477 0x01 0x478 0x01 0x479 0x01 0x47a 0x01 0x47b 0x01 0x47c 0x01 0x47d 0x01 0x47e 0x01 0x47f 0x01 0x480 0x01 0x481 0x01 0x482 0x01 0x483 0x01 0x484 0x01 0x485 0x01 0x486 0x01 0x487 0x01 0x488 0x01 0x489 0x01 0x48a 0x01 0x48b 0x01 0x48c 0x01 0x48d 0x01 0x48e 0x01 0x48f 0x01 0x490 0x01 0x491 0x01 0x492 0x01 0x493 0x01 0x494 0x01 0x495 0x01 0x496 0x01 0x497 0x01 0x498 0x01 0x499 0x01 0x49a 0x01 0x49b 0x01 0x49c 0x01 0x49d 0x01 0x49e 0x01 0x49f 0x01 0x4a0 0x01 0x4a1 0x01 0x4a2 0x01 0x4a3 0x01 0x4a4 0x01 0x4a5 0x01 0x4a6 0x01 0x4a7 0x01 0x4a8 0x01 0x4a9 0x01 0x4aa 0x01 0x4ab 0x01 0x4ac 0x01 0x4ad 0x01 0x4ae 0x01 0x4af 0x01 0x4b0 0x01 0x4b1 0x01 0x4b2 0x01 0x4b3 0x01 0x4b4 0x01 0x4b5 0x01 0x4b6 0x01 0x4b7 0x01 0x4b8 0x01 0x4b9 0x01 0x4ba 0x01 0x4bb 0x01 0x4bc 0x01 0x4bd 0x01 0x4be 0x01 0x4bf 0x01 0x4c0 0x01 0x4c1 0x01 0x4c2 0x01 0x4c3 0x01 0x4c4 0x01 0x4c5 0x01 0x4c6 0x01 0x4c7 0x01 0x4c8 0x01 0x4c9 0x01 0x4ca 0x01 0x4cb 0x01 0x4cc 0x01 0x4cd 0x01 0x4ce 0x01 0x4cf 0x01 0x4d0 0x01 0x4d1 0x01 0x4d2 0x01 0x4d3 0x01 0x4d4 0x01 0x4d5 0x01 0x4d6 0x01 0x4d7 0x01 0x4d8 0x01 0x4d9 0x01 0x4da 0x01 0x4db 0x01 0x4dc 0x01 0x4dd 0x01 0x4de 0x01 0x4df 0x01 0x4e0 0x01 0x4e1 0x01 0x4e2 0x01 0x4e3 0x01 0x4e4 0x01 0x4e5 0x01 0x4e6 0x01 0x4e7 0x01 0x4e8 0x01 0x4e9 0x01 0x4ea 0x01 0x4eb 0x01 0x4ec 0x01 0x4ed 0x01 0x4ee 0x01 0x4ef 0x01 0x4f0 0x01 0x4f1 0x01 0x4f2 0x01 0x4f3 0x01 0x4f4 0x01 0x4f5 0x01 0x4f6 0x01 0x4f7 0x01 0x4f8 0x01 0x4f9 0x01 0x4fa 0x01 0x4fb 0x01 0x4fc 0x01 0x4fd 0x01 0x4fe 0x01 0x4ff 0x01 0x500 0x01 0x501 0x01 0x502 0x01 0x503 0x01 0x504 0x01 0x505 0x01 0x506 0x01 0x507 0x01 0x508 0x01 0x509 0x01 0x50a 0x01 0x50b 0x01 0x50c 0x01 0x50d 0x01 0x50e 0x01 0x50f 0x01 0x510 0x01 0x511 0x01 0x512 0x01 0x513 0x01 0x514 0x01 0x515 0x01 0x516 0x01 0x517 0x01 0x518 0x01 0x519 0x01 0x51a 0x01 0x51b 0x01 0x51c 0x01 0x51d 0x01 0x51e 0x01 0x51f 0x01 0x520 0x01 0x521 0x01 0x522 0x01 0x523 0x01 0x524 0x01 0x525 0x01 0x526 0x01 0x527 0x01 0x528 0x01 0x529 0x01 0x52a 0x01 0x52b 0x01 0x52c 0x01 0x52d 0x01 0x52e 0x01 0x52f 0x01 0x530 0x01 0x531 0x01 0x532 0x01 0x533 0x01 0x534 0x01 0x535 0x01 0x536 0x01 0x537 0x01 0x538 0x01 0x539 0x01 0x53a 0x01 0x53b 0x01 0x53c 0x01 0x53d 0x01 0x53e 0x01 0x53f 0x01>;
			desc-num = <0x400>;
			buf-size = <0x1000>;
			dma-coherent;
			phandle = <0x64>;

			port@0 {
				reg = <0x00>;
				serdes-syscon = <0x60>;
				cpld-syscon = <0x61 0x00>;
				port-rst-offset = <0x00>;
				port-mode-offset = <0x00>;
				mc-mac-mask = [ff f0 00 00 00 00];
				media-type = "fiber";
			};

			port@1 {
				reg = <0x01>;
				serdes-syscon = <0x60>;
				cpld-syscon = <0x61 0x04>;
				port-rst-offset = <0x01>;
				port-mode-offset = <0x01>;
				mc-mac-mask = [ff f0 00 00 00 00];
				media-type = "fiber";
			};

			port@4 {
				reg = <0x04>;
				phy-handle = <0x62>;
				serdes-syscon = <0x60>;
				port-rst-offset = <0x04>;
				port-mode-offset = <0x02>;
				mc-mac-mask = [ff f0 00 00 00 00];
				media-type = "copper";
			};

			port@5 {
				reg = <0x05>;
				phy-handle = <0x63>;
				serdes-syscon = <0x60>;
				port-rst-offset = <0x05>;
				port-mode-offset = <0x03>;
				mc-mac-mask = [ff f0 00 00 00 00];
				media-type = "copper";
			};
		};

		ethernet@4 {
			compatible = "hisilicon,hns-nic-v2";
			ae-handle = <0x64>;
			port-idx-in-ae = <0x04>;
			local-mac-address = [00 00 00 00 00 00];
			status = "okay";
			dma-coherent;
			phandle = <0x67>;
		};

		ethernet@5 {
			compatible = "hisilicon,hns-nic-v2";
			ae-handle = <0x64>;
			port-idx-in-ae = <0x05>;
			local-mac-address = [00 00 00 00 00 00];
			status = "okay";
			dma-coherent;
			phandle = <0x68>;
		};

		ethernet@0 {
			compatible = "hisilicon,hns-nic-v2";
			ae-handle = <0x64>;
			port-idx-in-ae = <0x00>;
			local-mac-address = [00 00 00 00 00 00];
			status = "okay";
			dma-coherent;
			phandle = <0x65>;
		};

		ethernet@1 {
			compatible = "hisilicon,hns-nic-v2";
			ae-handle = <0x64>;
			port-idx-in-ae = <0x01>;
			local-mac-address = [00 00 00 00 00 00];
			status = "okay";
			dma-coherent;
			phandle = <0x66>;
		};

		infiniband@c4000000 {
			compatible = "hisilicon,hns-roce-v1";
			reg = <0x00 0xc4000000 0x00 0x100000>;
			dma-coherent;
			eth-handle = <0x65 0x66 0x00 0x00 0x67 0x68>;
			dsaf-handle = <0x64>;
			node-guid = <0x9acd00 0x10203>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			interrupt-parent = <0x69>;
			interrupts = <0x2d2 0x01 0x2d3 0x01 0x2d4 0x01 0x2d5 0x01 0x2d6 0x01 0x2d7 0x01 0x2d8 0x01 0x2d9 0x01 0x2da 0x01 0x2db 0x01 0x2dc 0x01 0x2dd 0x01 0x2de 0x01 0x2df 0x01 0x2e0 0x01 0x2e1 0x01 0x2e2 0x01 0x2e3 0x01 0x2e4 0x01 0x2e5 0x01 0x2e6 0x01 0x2e7 0x01 0x2e8 0x01 0x2e9 0x01 0x2ea 0x01 0x2eb 0x01 0x2ec 0x01 0x2ed 0x01 0x2ee 0x01 0x2ef 0x01 0x2f0 0x01 0x2f1 0x01 0x311 0x01 0x2f2 0x04>;
			interrupt-names = "hns-roce-comp-0\0hns-roce-comp-1\0hns-roce-comp-2\0hns-roce-comp-3\0hns-roce-comp-4\0hns-roce-comp-5\0hns-roce-comp-6\0hns-roce-comp-7\0hns-roce-comp-8\0hns-roce-comp-9\0hns-roce-comp-10\0hns-roce-comp-11\0hns-roce-comp-12\0hns-roce-comp-13\0hns-roce-comp-14\0hns-roce-comp-15\0hns-roce-comp-16\0hns-roce-comp-17\0hns-roce-comp-18\0hns-roce-comp-19\0hns-roce-comp-20\0hns-roce-comp-21\0hns-roce-comp-22\0hns-roce-comp-23\0hns-roce-comp-24\0hns-roce-comp-25\0hns-roce-comp-26\0hns-roce-comp-27\0hns-roce-comp-28\0hns-roce-comp-29\0hns-roce-comp-30\0hns-roce-comp-31\0hns-roce-async\0hns-roce-common";
		};

		sas@c3000000 {
			compatible = "hisilicon,hip07-sas-v2";
			reg = <0x00 0xc3000000 0x00 0x10000>;
			sas-addr = <0x50018820 0x16000000>;
			hisilicon,sas-syscon = <0x5f>;
			ctrl-reset-reg = <0xa60>;
			ctrl-reset-sts-reg = <0x5a30>;
			ctrl-clock-ena-reg = <0x338>;
			queue-count = <0x10>;
			phy-count = <0x08>;
			dma-coherent;
			interrupt-parent = <0x6a>;
			interrupts = <0x40 0x04 0x41 0x04 0x42 0x04 0x43 0x04 0x44 0x04 0x45 0x04 0x46 0x04 0x47 0x04 0x48 0x04 0x49 0x04 0x4a 0x04 0x4b 0x04 0x4c 0x04 0x4d 0x04 0x4e 0x04 0x4f 0x04 0x50 0x04 0x51 0x04 0x52 0x04 0x53 0x04 0x54 0x04 0x55 0x04 0x56 0x04 0x57 0x04 0x58 0x04 0x59 0x04 0x5a 0x04 0x5b 0x04 0x5c 0x04 0x5d 0x04 0x5e 0x04 0x5f 0x04 0x60 0x04 0x61 0x04 0x62 0x04 0x63 0x04 0x64 0x04 0x65 0x04 0x66 0x04 0x67 0x04 0x68 0x04 0x69 0x04 0x6a 0x04 0x6b 0x04 0x6c 0x04 0x6d 0x04 0x6e 0x04 0x6f 0x04 0x70 0x04 0x71 0x04 0x72 0x04 0x73 0x04 0x74 0x04 0x75 0x04 0x76 0x04 0x77 0x04 0x78 0x04 0x79 0x04 0x7a 0x04 0x7b 0x04 0x7c 0x04 0x7d 0x04 0x7e 0x04 0x7f 0x04 0x80 0x04 0x81 0x04 0x82 0x04 0x83 0x04 0x84 0x04 0x85 0x04 0x86 0x04 0x87 0x04 0x88 0x04 0x89 0x04 0x8a 0x04 0x8b 0x04 0x8c 0x04 0x8d 0x04 0x8e 0x04 0x8f 0x04 0x90 0x04 0x91 0x04 0x92 0x04 0x93 0x04 0x94 0x04 0x95 0x04 0x96 0x04 0x97 0x04 0x98 0x04 0x99 0x04 0x9a 0x04 0x9b 0x04 0x9c 0x04 0x9d 0x04 0x9e 0x04 0x9f 0x04 0x259 0x01 0x25a 0x01 0x25b 0x01 0x25c 0x01 0x25d 0x01 0x25e 0x01 0x25f 0x01 0x260 0x01 0x261 0x01 0x262 0x01 0x263 0x01 0x264 0x01 0x265 0x01 0x266 0x01 0x267 0x01 0x268 0x01 0x269 0x01 0x26a 0x01 0x26b 0x01 0x26c 0x01 0x26d 0x01 0x26e 0x01 0x26f 0x01 0x270 0x01 0x271 0x01 0x272 0x01 0x273 0x01 0x274 0x01 0x275 0x01 0x276 0x01 0x277 0x01 0x278 0x01>;
			status = "disabled";
			phandle = <0x88>;
		};

		sas@a2000000 {
			compatible = "hisilicon,hip07-sas-v2";
			reg = <0x00 0xa2000000 0x00 0x10000>;
			sas-addr = <0x50018820 0x16000000>;
			hisilicon,sas-syscon = <0x6b>;
			hip06-sas-v2-quirk-amt;
			ctrl-reset-reg = <0xa18>;
			ctrl-reset-sts-reg = <0x5a0c>;
			ctrl-clock-ena-reg = <0x318>;
			queue-count = <0x10>;
			phy-count = <0x08>;
			dma-coherent;
			interrupt-parent = <0x6c>;
			interrupts = <0x40 0x04 0x41 0x04 0x42 0x04 0x43 0x04 0x44 0x04 0x45 0x04 0x46 0x04 0x47 0x04 0x48 0x04 0x49 0x04 0x4a 0x04 0x4b 0x04 0x4c 0x04 0x4d 0x04 0x4e 0x04 0x4f 0x04 0x50 0x04 0x51 0x04 0x52 0x04 0x53 0x04 0x54 0x04 0x55 0x04 0x56 0x04 0x57 0x04 0x58 0x04 0x59 0x04 0x5a 0x04 0x5b 0x04 0x5c 0x04 0x5d 0x04 0x5e 0x04 0x5f 0x04 0x60 0x04 0x61 0x04 0x62 0x04 0x63 0x04 0x64 0x04 0x65 0x04 0x66 0x04 0x67 0x04 0x68 0x04 0x69 0x04 0x6a 0x04 0x6b 0x04 0x6c 0x04 0x6d 0x04 0x6e 0x04 0x6f 0x04 0x70 0x04 0x71 0x04 0x72 0x04 0x73 0x04 0x74 0x04 0x75 0x04 0x76 0x04 0x77 0x04 0x78 0x04 0x79 0x04 0x7a 0x04 0x7b 0x04 0x7c 0x04 0x7d 0x04 0x7e 0x04 0x7f 0x04 0x80 0x04 0x81 0x04 0x82 0x04 0x83 0x04 0x84 0x04 0x85 0x04 0x86 0x04 0x87 0x04 0x88 0x04 0x89 0x04 0x8a 0x04 0x8b 0x04 0x8c 0x04 0x8d 0x04 0x8e 0x04 0x8f 0x04 0x90 0x04 0x91 0x04 0x92 0x04 0x93 0x04 0x94 0x04 0x95 0x04 0x96 0x04 0x97 0x04 0x98 0x04 0x99 0x04 0x9a 0x04 0x9b 0x04 0x9c 0x04 0x9d 0x04 0x9e 0x04 0x9f 0x04 0x240 0x01 0x241 0x01 0x242 0x01 0x243 0x01 0x244 0x01 0x245 0x01 0x246 0x01 0x247 0x01 0x248 0x01 0x249 0x01 0x24a 0x01 0x24b 0x01 0x24c 0x01 0x24d 0x01 0x24e 0x01 0x24f 0x01 0x250 0x01 0x251 0x01 0x252 0x01 0x253 0x01 0x254 0x01 0x255 0x01 0x256 0x01 0x257 0x01 0x258 0x01 0x259 0x01 0x25a 0x01 0x25b 0x01 0x25c 0x01 0x25d 0x01 0x25e 0x01 0x25f 0x01>;
			status = "okay";
			phandle = <0x89>;
		};

		sas@a3000000 {
			compatible = "hisilicon,hip07-sas-v2";
			reg = <0x00 0xa3000000 0x00 0x10000>;
			sas-addr = <0x50018820 0x16000000>;
			hisilicon,sas-syscon = <0x6b>;
			ctrl-reset-reg = <0xae0>;
			ctrl-reset-sts-reg = <0x5a70>;
			ctrl-clock-ena-reg = <0x3a8>;
			queue-count = <0x10>;
			phy-count = <0x09>;
			dma-coherent;
			interrupt-parent = <0x6d>;
			interrupts = <0xc0 0x04 0xc1 0x04 0xc2 0x04 0xc3 0x04 0xc4 0x04 0xc5 0x04 0xc6 0x04 0xc7 0x04 0xc8 0x04 0xc9 0x04 0xca 0x04 0xcb 0x04 0xcc 0x04 0xcd 0x04 0xce 0x04 0xcf 0x04 0xd0 0x04 0xd1 0x04 0xd2 0x04 0xd3 0x04 0xd4 0x04 0xd5 0x04 0xd6 0x04 0xd7 0x04 0xd8 0x04 0xd9 0x04 0xda 0x04 0xdb 0x04 0xdc 0x04 0xdd 0x04 0xde 0x04 0xdf 0x04 0xe0 0x04 0xe1 0x04 0xe2 0x04 0xe3 0x04 0xe4 0x04 0xe5 0x04 0xe6 0x04 0xe7 0x04 0xe8 0x04 0xe9 0x04 0xea 0x04 0xeb 0x04 0xec 0x04 0xed 0x04 0xee 0x04 0xef 0x04 0xf0 0x04 0xf1 0x04 0xf2 0x04 0xf3 0x04 0xf4 0x04 0xf5 0x04 0xf6 0x04 0xf7 0x04 0xf8 0x04 0xf9 0x04 0xfa 0x04 0xfb 0x04 0xfc 0x04 0xfd 0x04 0xfe 0x04 0xff 0x04 0x100 0x04 0x101 0x04 0x102 0x04 0x103 0x04 0x104 0x04 0x105 0x04 0x106 0x04 0x107 0x04 0x108 0x04 0x109 0x04 0x10a 0x04 0x10b 0x04 0x10c 0x04 0x10d 0x04 0x10e 0x04 0x10f 0x04 0x110 0x04 0x111 0x04 0x112 0x04 0x113 0x04 0x114 0x04 0x115 0x04 0x116 0x04 0x117 0x04 0x118 0x04 0x119 0x04 0x11a 0x04 0x11b 0x04 0x11c 0x04 0x11d 0x04 0x11e 0x04 0x11f 0x04 0x260 0x01 0x261 0x01 0x262 0x01 0x263 0x01 0x264 0x01 0x265 0x01 0x266 0x01 0x267 0x01 0x268 0x01 0x269 0x01 0x26a 0x01 0x26b 0x01 0x26c 0x01 0x26d 0x01 0x26e 0x01 0x26f 0x01 0x270 0x01 0x271 0x01 0x272 0x01 0x273 0x01 0x274 0x01 0x275 0x01 0x276 0x01 0x277 0x01 0x278 0x01 0x279 0x01 0x27a 0x01 0x27b 0x01 0x27c 0x01 0x27d 0x01 0x27e 0x01 0x27f 0x01>;
			status = "disabled";
			phandle = <0x8a>;
		};

		pcie@a00a0000 {
			compatible = "hisilicon,hip07-pcie-ecam";
			reg = <0x00 0xaf800000 0x00 0x800000 0x00 0xa00a0000 0x00 0x10000>;
			bus-range = <0xf8 0xff>;
			msi-map = <0xf800 0x53 0xf800 0x800>;
			msi-map-mask = <0xffff>;
			#address-cells = <0x03>;
			#size-cells = <0x02>;
			device_type = "pci";
			dma-coherent;
			ranges = <0x2000000 0x00 0xa8000000 0x00 0xa8000000 0x00 0x77f0000 0x1000000 0x00 0x00 0x00 0xaf7f0000 0x00 0x10000>;
			#interrupt-cells = <0x01>;
			interrupt-map-mask = <0xf800 0x00 0x00 0x07>;
			interrupt-map = <0x00 0x00 0x00 0x01 0x6e 0x29f 0x04 0x00 0x00 0x00 0x02 0x6e 0x29f 0x04 0x00 0x00 0x00 0x03 0x6e 0x29f 0x04 0x00 0x00 0x00 0x04 0x6e 0x29f 0x04>;
			status = "okay";
			phandle = <0x8b>;
		};

		crypto@d2000000 {
			compatible = "hisilicon,hip07-sec";
			reg = <0x00 0xd0000000 0x00 0x10000 0x00 0xd2000000 0x00 0x10000 0x00 0xd2010000 0x00 0x10000 0x00 0xd2020000 0x00 0x10000 0x00 0xd2030000 0x00 0x10000 0x00 0xd2040000 0x00 0x10000 0x00 0xd2050000 0x00 0x10000 0x00 0xd2060000 0x00 0x10000 0x00 0xd2070000 0x00 0x10000 0x00 0xd2080000 0x00 0x10000 0x00 0xd2090000 0x00 0x10000 0x00 0xd20a0000 0x00 0x10000 0x00 0xd20b0000 0x00 0x10000 0x00 0xd20c0000 0x00 0x10000 0x00 0xd20d0000 0x00 0x10000 0x00 0xd20e0000 0x00 0x10000 0x00 0xd20f0000 0x00 0x10000 0x00 0xd2100000 0x00 0x10000>;
			interrupt-parent = <0x6f>;
			iommus = <0x70 0x600>;
			dma-coherent;
			interrupts = <0x240 0x04 0x241 0x01 0x242 0x04 0x243 0x01 0x244 0x04 0x245 0x01 0x246 0x04 0x247 0x01 0x248 0x04 0x249 0x01 0x24a 0x04 0x24b 0x01 0x24c 0x04 0x24d 0x01 0x24e 0x04 0x24f 0x01 0x250 0x04 0x251 0x01 0x252 0x04 0x253 0x01 0x254 0x04 0x255 0x01 0x256 0x04 0x257 0x01 0x258 0x04 0x259 0x01 0x25a 0x04 0x25b 0x01 0x25c 0x04 0x25d 0x01 0x25e 0x04 0x25f 0x01 0x260 0x04>;
			phandle = <0x8c>;
		};

		crypto@8,d2000000 {
			compatible = "hisilicon,hip07-sec";
			reg = <0x08 0xd0000000 0x00 0x10000 0x08 0xd2000000 0x00 0x10000 0x08 0xd2010000 0x00 0x10000 0x08 0xd2020000 0x00 0x10000 0x08 0xd2030000 0x00 0x10000 0x08 0xd2040000 0x00 0x10000 0x08 0xd2050000 0x00 0x10000 0x08 0xd2060000 0x00 0x10000 0x08 0xd2070000 0x00 0x10000 0x08 0xd2080000 0x00 0x10000 0x08 0xd2090000 0x00 0x10000 0x08 0xd20a0000 0x00 0x10000 0x08 0xd20b0000 0x00 0x10000 0x08 0xd20c0000 0x00 0x10000 0x08 0xd20d0000 0x00 0x10000 0x08 0xd20e0000 0x00 0x10000 0x08 0xd20f0000 0x00 0x10000 0x08 0xd2100000 0x00 0x10000>;
			interrupt-parent = <0x71>;
			iommus = <0x72 0x600>;
			dma-coherent;
			interrupts = <0x240 0x04 0x241 0x01 0x242 0x04 0x243 0x01 0x244 0x04 0x245 0x01 0x246 0x04 0x247 0x01 0x248 0x04 0x249 0x01 0x24a 0x04 0x24b 0x01 0x24c 0x04 0x24d 0x01 0x24e 0x04 0x24f 0x01 0x250 0x04 0x251 0x01 0x252 0x04 0x253 0x01 0x254 0x04 0x255 0x01 0x256 0x04 0x257 0x01 0x258 0x04 0x259 0x01 0x25a 0x04 0x25b 0x01 0x25c 0x04 0x25d 0x01 0x25e 0x04 0x25f 0x01 0x260 0x04>;
			phandle = <0x8d>;
		};

		crypto@400,d2000000 {
			compatible = "hisilicon,hip07-sec";
			reg = <0x400 0xd0000000 0x00 0x10000 0x400 0xd2000000 0x00 0x10000 0x400 0xd2010000 0x00 0x10000 0x400 0xd2020000 0x00 0x10000 0x400 0xd2030000 0x00 0x10000 0x400 0xd2040000 0x00 0x10000 0x400 0xd2050000 0x00 0x10000 0x400 0xd2060000 0x00 0x10000 0x400 0xd2070000 0x00 0x10000 0x400 0xd2080000 0x00 0x10000 0x400 0xd2090000 0x00 0x10000 0x400 0xd20a0000 0x00 0x10000 0x400 0xd20b0000 0x00 0x10000 0x400 0xd20c0000 0x00 0x10000 0x400 0xd20d0000 0x00 0x10000 0x400 0xd20e0000 0x00 0x10000 0x400 0xd20f0000 0x00 0x10000 0x400 0xd2100000 0x00 0x10000>;
			interrupt-parent = <0x73>;
			iommus = <0x74 0x600>;
			dma-coherent;
			interrupts = <0x240 0x04 0x241 0x01 0x242 0x04 0x243 0x01 0x244 0x04 0x245 0x01 0x246 0x04 0x247 0x01 0x248 0x04 0x249 0x01 0x24a 0x04 0x24b 0x01 0x24c 0x04 0x24d 0x01 0x24e 0x04 0x24f 0x01 0x250 0x04 0x251 0x01 0x252 0x04 0x253 0x01 0x254 0x04 0x255 0x01 0x256 0x04 0x257 0x01 0x258 0x04 0x259 0x01 0x25a 0x04 0x25b 0x01 0x25c 0x04 0x25d 0x01 0x25e 0x04 0x25f 0x01 0x260 0x04>;
			phandle = <0x8e>;
		};

		crypto@408,d2000000 {
			compatible = "hisilicon,hip07-sec";
			reg = <0x408 0xd0000000 0x00 0x10000 0x408 0xd2000000 0x00 0x10000 0x408 0xd2010000 0x00 0x10000 0x408 0xd2020000 0x00 0x10000 0x408 0xd2030000 0x00 0x10000 0x408 0xd2040000 0x00 0x10000 0x408 0xd2050000 0x00 0x10000 0x408 0xd2060000 0x00 0x10000 0x408 0xd2070000 0x00 0x10000 0x408 0xd2080000 0x00 0x10000 0x408 0xd2090000 0x00 0x10000 0x408 0xd20a0000 0x00 0x10000 0x408 0xd20b0000 0x00 0x10000 0x408 0xd20c0000 0x00 0x10000 0x408 0xd20d0000 0x00 0x10000 0x408 0xd20e0000 0x00 0x10000 0x408 0xd20f0000 0x00 0x10000 0x408 0xd2100000 0x00 0x10000>;
			interrupt-parent = <0x75>;
			iommus = <0x76 0x600>;
			dma-coherent;
			interrupts = <0x240 0x04 0x241 0x01 0x242 0x04 0x243 0x01 0x244 0x04 0x245 0x01 0x246 0x04 0x247 0x01 0x248 0x04 0x249 0x01 0x24a 0x04 0x24b 0x01 0x24c 0x04 0x24d 0x01 0x24e 0x04 0x24f 0x01 0x250 0x04 0x251 0x01 0x252 0x04 0x253 0x01 0x254 0x04 0x255 0x01 0x256 0x04 0x257 0x01 0x258 0x04 0x259 0x01 0x25a 0x04 0x25b 0x01 0x25c 0x04 0x25d 0x01 0x25e 0x04 0x25f 0x01 0x260 0x04>;
			phandle = <0x8f>;
		};
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00 0x00 0x00 0x40000000>;
		numa-node-id = <0x00>;
	};

	distance-map {
		compatible = "numa-distance-map-v1";
		distance-matrix = <0x00 0x00 0x0a 0x00 0x01 0x0f 0x00 0x02 0x14 0x00 0x03 0x19 0x01 0x00 0x0f 0x01 0x01 0x0a 0x01 0x02 0x19 0x01 0x03 0x1e 0x02 0x00 0x14 0x02 0x01 0x19 0x02 0x02 0x0a 0x02 0x03 0x0f 0x03 0x00 0x19 0x03 0x01 0x1e 0x03 0x02 0x0f 0x03 0x03 0x0a>;
	};

	aliases {
		serial0 = "/soc/uart@602b0000";
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	__symbols__ {
		cpu0 = "/cpus/cpu@10000";
		cpu1 = "/cpus/cpu@10001";
		cpu2 = "/cpus/cpu@10002";
		cpu3 = "/cpus/cpu@10003";
		cpu4 = "/cpus/cpu@10100";
		cpu5 = "/cpus/cpu@10101";
		cpu6 = "/cpus/cpu@10102";
		cpu7 = "/cpus/cpu@10103";
		cpu8 = "/cpus/cpu@10200";
		cpu9 = "/cpus/cpu@10201";
		cpu10 = "/cpus/cpu@10202";
		cpu11 = "/cpus/cpu@10203";
		cpu12 = "/cpus/cpu@10300";
		cpu13 = "/cpus/cpu@10301";
		cpu14 = "/cpus/cpu@10302";
		cpu15 = "/cpus/cpu@10303";
		cpu16 = "/cpus/cpu@30000";
		cpu17 = "/cpus/cpu@30001";
		cpu18 = "/cpus/cpu@30002";
		cpu19 = "/cpus/cpu@30003";
		cpu20 = "/cpus/cpu@30100";
		cpu21 = "/cpus/cpu@30101";
		cpu22 = "/cpus/cpu@30102";
		cpu23 = "/cpus/cpu@30103";
		cpu24 = "/cpus/cpu@30200";
		cpu25 = "/cpus/cpu@30201";
		cpu26 = "/cpus/cpu@30202";
		cpu27 = "/cpus/cpu@30203";
		cpu28 = "/cpus/cpu@30300";
		cpu29 = "/cpus/cpu@30301";
		cpu30 = "/cpus/cpu@30302";
		cpu31 = "/cpus/cpu@30303";
		cpu32 = "/cpus/cpu@50000";
		cpu33 = "/cpus/cpu@50001";
		cpu34 = "/cpus/cpu@50002";
		cpu35 = "/cpus/cpu@50003";
		cpu36 = "/cpus/cpu@50100";
		cpu37 = "/cpus/cpu@50101";
		cpu38 = "/cpus/cpu@50102";
		cpu39 = "/cpus/cpu@50103";
		cpu40 = "/cpus/cpu@50200";
		cpu41 = "/cpus/cpu@50201";
		cpu42 = "/cpus/cpu@50202";
		cpu43 = "/cpus/cpu@50203";
		cpu44 = "/cpus/cpu@50300";
		cpu45 = "/cpus/cpu@50301";
		cpu46 = "/cpus/cpu@50302";
		cpu47 = "/cpus/cpu@50303";
		cpu48 = "/cpus/cpu@70000";
		cpu49 = "/cpus/cpu@70001";
		cpu50 = "/cpus/cpu@70002";
		cpu51 = "/cpus/cpu@70003";
		cpu52 = "/cpus/cpu@70100";
		cpu53 = "/cpus/cpu@70101";
		cpu54 = "/cpus/cpu@70102";
		cpu55 = "/cpus/cpu@70103";
		cpu56 = "/cpus/cpu@70200";
		cpu57 = "/cpus/cpu@70201";
		cpu58 = "/cpus/cpu@70202";
		cpu59 = "/cpus/cpu@70203";
		cpu60 = "/cpus/cpu@70300";
		cpu61 = "/cpus/cpu@70301";
		cpu62 = "/cpus/cpu@70302";
		cpu63 = "/cpus/cpu@70303";
		cluster0_l2 = "/cpus/l2-cache0";
		cluster1_l2 = "/cpus/l2-cache1";
		cluster2_l2 = "/cpus/l2-cache2";
		cluster3_l2 = "/cpus/l2-cache3";
		cluster4_l2 = "/cpus/l2-cache4";
		cluster5_l2 = "/cpus/l2-cache5";
		cluster6_l2 = "/cpus/l2-cache6";
		cluster7_l2 = "/cpus/l2-cache7";
		cluster8_l2 = "/cpus/l2-cache8";
		cluster9_l2 = "/cpus/l2-cache9";
		cluster10_l2 = "/cpus/l2-cache10";
		cluster11_l2 = "/cpus/l2-cache11";
		cluster12_l2 = "/cpus/l2-cache12";
		cluster13_l2 = "/cpus/l2-cache13";
		cluster14_l2 = "/cpus/l2-cache14";
		cluster15_l2 = "/cpus/l2-cache15";
		gic = "/interrupt-controller@4d000000";
		p0_its_peri_a = "/interrupt-controller@4d000000/interrupt-controller@4c000000";
		p0_its_peri_b = "/interrupt-controller@4d000000/interrupt-controller@6c000000";
		p0_its_dsa_a = "/interrupt-controller@4d000000/interrupt-controller@c6000000";
		p0_its_dsa_b = "/interrupt-controller@4d000000/interrupt-controller@8,c6000000";
		p1_its_peri_a = "/interrupt-controller@4d000000/interrupt-controller@400,4c000000";
		p1_its_peri_b = "/interrupt-controller@4d000000/interrupt-controller@400,6c000000";
		p1_its_dsa_a = "/interrupt-controller@4d000000/interrupt-controller@400,c6000000";
		p1_its_dsa_b = "/interrupt-controller@4d000000/interrupt-controller@408,c6000000";
		p0_mbigen_peri_b = "/interrupt-controller@60080000";
		mbigen_uart = "/interrupt-controller@60080000/uart_intc";
		p0_mbigen_pcie_a = "/interrupt-controller@a0080000";
		mbigen_pcie2_a = "/interrupt-controller@a0080000/intc_pcie2_a";
		mbigen_sas1 = "/interrupt-controller@a0080000/intc_sas1";
		mbigen_sas2 = "/interrupt-controller@a0080000/intc_sas2";
		mbigen_smmu_pcie = "/interrupt-controller@a0080000/intc_smmu_pcie";
		mbigen_usb = "/interrupt-controller@a0080000/intc_usb";
		p0_mbigen_alg_a = "/interrupt-controller@d0080000";
		p0_mbigen_sec_a = "/interrupt-controller@d0080000/intc_sec";
		p0_mbigen_smmu_alg_a = "/interrupt-controller@d0080000/intc_smmu_alg";
		p0_mbigen_alg_b = "/interrupt-controller@8,d0080000";
		p0_mbigen_sec_b = "/interrupt-controller@8,d0080000/intc_sec";
		p0_mbigen_smmu_alg_b = "/interrupt-controller@8,d0080000/intc_smmu_alg";
		p1_mbigen_alg_a = "/interrupt-controller@400,d0080000";
		p1_mbigen_sec_a = "/interrupt-controller@400,d0080000/intc_sec";
		p1_mbigen_smmu_alg_a = "/interrupt-controller@400,d0080000/intc_smmu_alg";
		p1_mbigen_alg_b = "/interrupt-controller@408,d0080000";
		p1_mbigen_sec_b = "/interrupt-controller@408,d0080000/intc_sec";
		p1_mbigen_smmu_alg_b = "/interrupt-controller@408,d0080000/intc_smmu_alg";
		p0_mbigen_dsa_a = "/interrupt-controller@c0080000";
		mbigen_dsaf0 = "/interrupt-controller@c0080000/intc_dsaf0";
		mbigen_dsa_roce = "/interrupt-controller@c0080000/intc-roce";
		mbigen_sas0 = "/interrupt-controller@c0080000/intc-sas0";
		mbigen_smmu_dsa = "/interrupt-controller@c0080000/intc_smmu_dsa";
		smmu0 = "/smmu_pcie";
		p0_smmu_alg_a = "/smmu_alg@d0040000";
		p0_smmu_alg_b = "/smmu_alg@8,d0040000";
		p1_smmu_alg_a = "/smmu_alg@400,d0040000";
		p1_smmu_alg_b = "/smmu_alg@408,d0040000";
		ipmi0 = "/soc/isa@a01b0000/bt@e4";
		uart0 = "/soc/uart@602b0000";
		usb_ohci = "/soc/ohci@a7030000";
		usb_ehci = "/soc/ehci@a7020000";
		peri_c_subctrl = "/soc/sub_ctrl_c@60000000";
		dsa_subctrl = "/soc/dsa_subctrl@c0000000";
		dsa_cpld = "/soc/dsa_cpld@78000010";
		pcie_subctl = "/soc/pcie_subctl@a0000000";
		serdes_ctrl = "/soc/sds_ctrl@c2200000";
		phy0 = "/soc/mdio@603c0000/ethernet-phy@0";
		phy1 = "/soc/mdio@603c0000/ethernet-phy@1";
		dsaf0 = "/soc/dsa@c7000000";
		eth0 = "/soc/ethernet@4";
		eth1 = "/soc/ethernet@5";
		eth2 = "/soc/ethernet@0";
		eth3 = "/soc/ethernet@1";
		sas0 = "/soc/sas@c3000000";
		sas1 = "/soc/sas@a2000000";
		sas2 = "/soc/sas@a3000000";
		p0_pcie2_a = "/soc/pcie@a00a0000";
		p0_sec_a = "/soc/crypto@d2000000";
		p0_sec_b = "/soc/crypto@8,d2000000";
		p1_sec_a = "/soc/crypto@400,d2000000";
		p1_sec_b = "/soc/crypto@408,d2000000";
	};
};