clk: qcom: mmcc-msm8998: Fix the SMMU GDSC
[ Upstream commit 1fc62c8347397faf4e18249e88ecd4470c0a5357 ] The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the HW_CTRL flag (it's separate from hw_ctrl_addr). In addition to that, it should feature a cxc entry for bimc_smmu_axi_clk and be marked as votable. Fix all of these issues. Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-5-ba1b1fd9ee75@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -2662,11 +2662,13 @@ static struct gdsc camss_cpp_gdsc = {
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static struct gdsc bimc_smmu_gdsc = {
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.gdscr = 0xe020,
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.gds_hw_ctrl = 0xe024,
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.cxcs = (unsigned int []){ 0xe008 },
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.cxc_count = 1,
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.pd = {
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.name = "bimc_smmu",
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},
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.pwrsts = PWRSTS_OFF_ON,
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.flags = HW_CTRL | ALWAYS_ON,
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.flags = VOTABLE,
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};
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static struct clk_regmap *mmcc_msm8998_clocks[] = {
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