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Revert "clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228"

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This reverts commit f7789d5a0b.
This commit is contained in:
Ksawlii 2024-11-24 00:23:22 +01:00
parent 20521bf999
commit c836f072e0
1 changed files with 1 additions and 1 deletions
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drivers/clk/rockchip/clk-rk3228.c
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@ -408,7 +408,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(29), 0, 3, DFLAGS),
DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
RK2928_CLKSEL_CON(27), 8, 8, DFLAGS),
MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
RK2928_CLKSEL_CON(27), 1, 1, MFLAGS),
FACTOR(0, "xin12m", "xin24m", 0, 1, 2),