Revert "net: fec: Refactor: #define magic constants"
This reverts commit 64636f4e88
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e7b1ec68bc
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a5b7b870fc
1 changed files with 16 additions and 30 deletions
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@ -220,8 +220,8 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
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#define PKT_MINBUF_SIZE 64
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#define PKT_MINBUF_SIZE 64
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/* FEC receive acceleration */
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/* FEC receive acceleration */
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#define FEC_RACC_IPDIS BIT(1)
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#define FEC_RACC_IPDIS (1 << 1)
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#define FEC_RACC_PRODIS BIT(2)
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#define FEC_RACC_PRODIS (1 << 2)
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#define FEC_RACC_SHIFT16 BIT(7)
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#define FEC_RACC_SHIFT16 BIT(7)
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#define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
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#define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
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@ -253,23 +253,8 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
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#define FEC_MMFR_TA (2 << 16)
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#define FEC_MMFR_TA (2 << 16)
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#define FEC_MMFR_DATA(v) (v & 0xffff)
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#define FEC_MMFR_DATA(v) (v & 0xffff)
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/* FEC ECR bits definition */
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/* FEC ECR bits definition */
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#define FEC_ECR_RESET BIT(0)
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#define FEC_ECR_MAGICEN (1 << 2)
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#define FEC_ECR_ETHEREN BIT(1)
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#define FEC_ECR_SLEEP (1 << 3)
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#define FEC_ECR_MAGICEN BIT(2)
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#define FEC_ECR_SLEEP BIT(3)
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#define FEC_ECR_EN1588 BIT(4)
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#define FEC_ECR_BYTESWP BIT(8)
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/* FEC RCR bits definition */
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#define FEC_RCR_LOOP BIT(0)
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#define FEC_RCR_HALFDPX BIT(1)
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#define FEC_RCR_MII BIT(2)
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#define FEC_RCR_PROMISC BIT(3)
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#define FEC_RCR_BC_REJ BIT(4)
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#define FEC_RCR_FLOWCTL BIT(5)
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#define FEC_RCR_RMII BIT(8)
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#define FEC_RCR_10BASET BIT(9)
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/* TX WMARK bits */
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#define FEC_TXWMRK_STRFWD BIT(8)
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#define FEC_MII_TIMEOUT 30000 /* us */
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#define FEC_MII_TIMEOUT 30000 /* us */
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@ -964,7 +949,7 @@ fec_restart(struct net_device *ndev)
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u32 val;
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u32 val;
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u32 temp_mac[2];
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u32 temp_mac[2];
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u32 rcntl = OPT_FRAME_SIZE | 0x04;
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u32 rcntl = OPT_FRAME_SIZE | 0x04;
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u32 ecntl = FEC_ECR_ETHEREN;
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u32 ecntl = 0x2; /* ETHEREN */
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/* Whack a reset. We should wait for this.
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/* Whack a reset. We should wait for this.
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* For i.MX6SX SOC, enet use AXI bus, we use disable MAC
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* For i.MX6SX SOC, enet use AXI bus, we use disable MAC
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@ -1040,18 +1025,18 @@ fec_restart(struct net_device *ndev)
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fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
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fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
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rcntl |= (1 << 6);
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rcntl |= (1 << 6);
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else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
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else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
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rcntl |= FEC_RCR_RMII;
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rcntl |= (1 << 8);
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else
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else
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rcntl &= ~FEC_RCR_RMII;
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rcntl &= ~(1 << 8);
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/* 1G, 100M or 10M */
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/* 1G, 100M or 10M */
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if (ndev->phydev) {
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if (ndev->phydev) {
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if (ndev->phydev->speed == SPEED_1000)
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if (ndev->phydev->speed == SPEED_1000)
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ecntl |= (1 << 5);
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ecntl |= (1 << 5);
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else if (ndev->phydev->speed == SPEED_100)
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else if (ndev->phydev->speed == SPEED_100)
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rcntl &= ~FEC_RCR_10BASET;
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rcntl &= ~(1 << 9);
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else
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else
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rcntl |= FEC_RCR_10BASET;
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rcntl |= (1 << 9);
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}
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}
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} else {
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} else {
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#ifdef FEC_MIIGSK_ENR
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#ifdef FEC_MIIGSK_ENR
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@ -1110,13 +1095,13 @@ fec_restart(struct net_device *ndev)
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if (fep->quirks & FEC_QUIRK_ENET_MAC) {
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if (fep->quirks & FEC_QUIRK_ENET_MAC) {
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/* enable ENET endian swap */
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/* enable ENET endian swap */
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ecntl |= FEC_ECR_BYTESWP;
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ecntl |= (1 << 8);
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/* enable ENET store and forward mode */
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/* enable ENET store and forward mode */
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writel(FEC_TXWMRK_STRFWD, fep->hwp + FEC_X_WMRK);
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writel(1 << 8, fep->hwp + FEC_X_WMRK);
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}
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}
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if (fep->bufdesc_ex)
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if (fep->bufdesc_ex)
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ecntl |= FEC_ECR_EN1588;
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ecntl |= (1 << 4);
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#ifndef CONFIG_M5272
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#ifndef CONFIG_M5272
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/* Enable the MIB statistic event counters */
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/* Enable the MIB statistic event counters */
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@ -1163,7 +1148,7 @@ static void
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fec_stop(struct net_device *ndev)
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fec_stop(struct net_device *ndev)
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{
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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struct fec_enet_private *fep = netdev_priv(ndev);
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u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & FEC_RCR_RMII;
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u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
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u32 val;
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u32 val;
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/* We cannot expect a graceful transmit stop without link !!! */
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/* We cannot expect a graceful transmit stop without link !!! */
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@ -1182,7 +1167,7 @@ fec_stop(struct net_device *ndev)
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if (fep->quirks & FEC_QUIRK_HAS_AVB) {
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if (fep->quirks & FEC_QUIRK_HAS_AVB) {
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writel(0, fep->hwp + FEC_ECNTRL);
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writel(0, fep->hwp + FEC_ECNTRL);
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} else {
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} else {
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writel(FEC_ECR_RESET, fep->hwp + FEC_ECNTRL);
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writel(1, fep->hwp + FEC_ECNTRL);
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udelay(10);
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udelay(10);
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}
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}
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writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
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writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
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@ -1198,11 +1183,12 @@ fec_stop(struct net_device *ndev)
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/* We have to keep ENET enabled to have MII interrupt stay working */
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/* We have to keep ENET enabled to have MII interrupt stay working */
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if (fep->quirks & FEC_QUIRK_ENET_MAC &&
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if (fep->quirks & FEC_QUIRK_ENET_MAC &&
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!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
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!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
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writel(FEC_ECR_ETHEREN, fep->hwp + FEC_ECNTRL);
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writel(2, fep->hwp + FEC_ECNTRL);
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writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
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writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
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}
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}
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}
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}
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static void
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static void
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fec_timeout(struct net_device *ndev, unsigned int txqueue)
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fec_timeout(struct net_device *ndev, unsigned int txqueue)
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{
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{
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