drm/lima: set gp bus_stop bit before hard reset
[ Upstream commit 27aa58ec85f973d98d336df7b7941149308db80f ] This is required for reliable hard resets. Otherwise, doing a hard reset while a task is still running (such as a task which is being stopped by the drm_sched timeout handler) may result in random mmu write timeouts or lockups which cause the entire gpu to hang. Signed-off-by: Erico Nunes <nunes.erico@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240124025947.2110659-5-nunes.erico@gmail.com Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -166,6 +166,11 @@ static void lima_gp_task_run(struct lima_sched_pipe *pipe,
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gp_write(LIMA_GP_CMD, cmd);
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}
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static int lima_gp_bus_stop_poll(struct lima_ip *ip)
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{
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return !!(gp_read(LIMA_GP_STATUS) & LIMA_GP_STATUS_BUS_STOPPED);
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}
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static int lima_gp_hard_reset_poll(struct lima_ip *ip)
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{
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gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC01A0000);
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@ -179,6 +184,13 @@ static int lima_gp_hard_reset(struct lima_ip *ip)
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gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC0FFE000);
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gp_write(LIMA_GP_INT_MASK, 0);
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gp_write(LIMA_GP_CMD, LIMA_GP_CMD_STOP_BUS);
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ret = lima_poll_timeout(ip, lima_gp_bus_stop_poll, 10, 100);
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if (ret) {
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dev_err(dev->dev, "%s bus stop timeout\n", lima_ip_name(ip));
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return ret;
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}
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gp_write(LIMA_GP_CMD, LIMA_GP_CMD_RESET);
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ret = lima_poll_timeout(ip, lima_gp_hard_reset_poll, 10, 100);
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if (ret) {
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