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net: phy: ti: add PHY_RST_AFTER_CLK_EN flag

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[ Upstream commit 256748d5480bb3c4b731236c6d6fc86a8e2815d8 ]

DP83848	datasheet (section 4.7.2) indicates that the reset pin should be
toggled after the clocks are running. Add the PHY_RST_AFTER_CLK_EN to
make sure that this indication is respected.

In my experience not having this flag enabled would lead to, on some
boots, the wrong MII mode being selected if the PHY was initialized on
the bootloader and was receiving data during Linux boot.

Signed-off-by: Diogo Silva <diogompaissilva@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Fixes: 34e45ad9378c ("net: phy: dp83848: Add TI DP83848 Ethernet PHY")
Link: https://patch.msgid.link/20241102151504.811306-1-paissilva@ld-100007.ds1.internal
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Diogo Silva 2024-11-02 16:15:05 +01:00 committed by Kreciorek
parent a2b6d0907f
commit 7b0cca4552
1 changed files with 2 additions and 0 deletions
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2
drivers/net/phy/dp83848.c
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@ -137,6 +137,8 @@ MODULE_DEVICE_TABLE(mdio, dp83848_tbl);
.ack_interrupt = dp83848_ack_interrupt, \
.config_intr = dp83848_config_intr, \
.handle_interrupt = dp83848_handle_interrupt, \
\
.flags = PHY_RST_AFTER_CLK_EN, \
}
static struct phy_driver dp83848_driver[] = {