Revert "PCI: keystone: Add workaround for Errata #i2037 (AM65x SR 1.0)"

This reverts commit 5738327c02.
This commit is contained in:
Ksawlii 2024-11-24 00:23:42 +01:00
parent fb8a13301a
commit 2c757dbb98

View file

@ -35,11 +35,6 @@
#define PCIE_DEVICEID_SHIFT 16
/* Application registers */
#define PID 0x000
#define RTL GENMASK(15, 11)
#define RTL_SHIFT 11
#define AM6_PCI_PG1_RTL_VER 0x15
#define CMD_STATUS 0x004
#define LTSSM_EN_VAL BIT(0)
#define OB_XLAT_EN_VAL BIT(1)
@ -110,8 +105,6 @@
#define to_keystone_pcie(x) dev_get_drvdata((x)->dev)
#define PCI_DEVICE_ID_TI_AM654X 0xb00c
struct ks_pcie_of_data {
enum dw_pcie_device_mode mode;
const struct dw_pcie_host_ops *host_ops;
@ -544,11 +537,7 @@ static int ks_pcie_start_link(struct dw_pcie *pci)
static void ks_pcie_quirk(struct pci_dev *dev)
{
struct pci_bus *bus = dev->bus;
struct keystone_pcie *ks_pcie;
struct device *bridge_dev;
struct pci_dev *bridge;
u32 val;
static const struct pci_device_id rc_pci_devids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2HK),
.class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
@ -560,11 +549,6 @@ static void ks_pcie_quirk(struct pci_dev *dev)
.class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
{ 0, },
};
static const struct pci_device_id am6_pci_devids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654X),
.class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
{ 0, },
};
if (pci_is_root_bus(bus))
bridge = dev;
@ -586,36 +570,10 @@ static void ks_pcie_quirk(struct pci_dev *dev)
*/
if (pci_match_id(rc_pci_devids, bridge)) {
if (pcie_get_readrq(dev) > 256) {
dev_info(&dev->dev, "limiting MRRS to 256 bytes\n");
dev_info(&dev->dev, "limiting MRRS to 256\n");
pcie_set_readrq(dev, 256);
}
}
/*
* Memory transactions fail with PCI controller in AM654 PG1.0
* when MRRS is set to more than 128 bytes. Force the MRRS to
* 128 bytes in all downstream devices.
*/
if (pci_match_id(am6_pci_devids, bridge)) {
bridge_dev = pci_get_host_bridge_device(dev);
if (!bridge_dev && !bridge_dev->parent)
return;
ks_pcie = dev_get_drvdata(bridge_dev->parent);
if (!ks_pcie)
return;
val = ks_pcie_app_readl(ks_pcie, PID);
val &= RTL;
val >>= RTL_SHIFT;
if (val != AM6_PCI_PG1_RTL_VER)
return;
if (pcie_get_readrq(dev) > 128) {
dev_info(&dev->dev, "limiting MRRS to 128 bytes\n");
pcie_set_readrq(dev, 128);
}
}
}
DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, ks_pcie_quirk);