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leds: ss4200: Convert PCIBIOS_* return codes to errnos

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commit ce068e83976140badb19c7f1307926b4b562fac4 upstream.

ich7_lpc_probe() uses pci_read_config_dword() that returns PCIBIOS_*
codes. The error handling code assumes incorrectly it's a normal errno
and checks for < 0. The return code is returned from the probe function
as is but probe functions should return normal errnos.

Remove < 0 from the check and convert PCIBIOS_* returns code using
pcibios_err_to_errno() into normal errno before returning it.

Fixes: a328e95b82c1 ("leds: LED driver for Intel NAS SS4200 series (v5)")
Cc:  <stable@vger.kernel.org>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20240527132700.14260-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Ilpo Järvinen 2024-05-27 16:27:00 +03:00 • committed by Ksawlii
parent 64663028ab
commit 1720436af8
1 changed files with 5 additions and 2 deletions
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7
drivers/leds/leds-ss4200.c
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@ -356,8 +356,10 @@ static int ich7_lpc_probe(struct pci_dev *dev,
nas_gpio_pci_dev = dev; nas_gpio_pci_dev = dev;
status = pci_read_config_dword(dev, PMBASE, &g_pm_io_base); status = pci_read_config_dword(dev, PMBASE, &g_pm_io_base);
if (status) if (status) {
status = pcibios_err_to_errno(status);
goto out; goto out;
}
g_pm_io_base &= 0x00000ff80; g_pm_io_base &= 0x00000ff80;
status = pci_read_config_dword(dev, GPIO_CTRL, &gc); status = pci_read_config_dword(dev, GPIO_CTRL, &gc);
@ -369,8 +371,9 @@ static int ich7_lpc_probe(struct pci_dev *dev,
} }
status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base); status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base);
if (0 > status) { if (status) {
dev_info(&dev->dev, "Unable to read GPIOBASE.\n"); dev_info(&dev->dev, "Unable to read GPIOBASE.\n");
status = pcibios_err_to_errno(status);
goto out; goto out;
} }
dev_dbg(&dev->dev, ": GPIOBASE = 0x%08x\n", nas_gpio_io_base); dev_dbg(&dev->dev, ": GPIOBASE = 0x%08x\n", nas_gpio_io_base);