From 155cc059f67ee7a9312b366926c8dc9b928cc133 Mon Sep 17 00:00:00 2001 From: xxmustafacooTR Date: Tue, 20 Jun 2023 01:41:22 +0300 Subject: [PATCH] mali/exynos: show current voltage --- .../arm/exynos/frontend/gpex_clock_sysfs.c | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/arm/exynos/frontend/gpex_clock_sysfs.c b/drivers/gpu/arm/exynos/frontend/gpex_clock_sysfs.c index 9b20b038b..773637272 100755 --- a/drivers/gpu/arm/exynos/frontend/gpex_clock_sysfs.c +++ b/drivers/gpu/arm/exynos/frontend/gpex_clock_sysfs.c @@ -24,9 +24,12 @@ #include #include +#include + #include "gpex_clock_internal.h" static struct _clock_info *clk_info; +static struct regulator *g3d_regulator; #define GPU_UNLOCKED_FREQ 1209000 #define GPU_NORMAL_FREQ 897000 @@ -446,9 +449,35 @@ GPEX_STATIC ssize_t show_gpu_freq_table(char *buf) } CREATE_SYSFS_KOBJECT_READ_FUNCTION(show_gpu_freq_table) +GPEX_STATIC ssize_t show_volt(char *buf) +{ + ssize_t len = 0; + int volt = 0; + + gpex_pm_lock(); + if (g3d_regulator) + volt = regulator_get_voltage(g3d_regulator); + else if (gpex_pm_get_status(false)) + volt = clk_info->table[gpex_clock_get_table_idx(gpex_clock_get_clock_slow())].voltage; + gpex_pm_unlock(); + + if (volt < 0) + volt = 0; + + len += snprintf(buf + len, PAGE_SIZE - len, "%d", volt); + + return gpex_utils_sysfs_endbuf(buf, len); +} +CREATE_SYSFS_DEVICE_READ_FUNCTION(show_volt) +CREATE_SYSFS_KOBJECT_READ_FUNCTION(show_volt) + int gpex_clock_sysfs_init(struct _clock_info *_clk_info) { clk_info = _clk_info; + g3d_regulator = regulator_get(NULL, "vdd_g3d"); + + if (IS_ERR(g3d_regulator)) + g3d_regulator = NULL; GPEX_UTILS_SYSFS_DEVICE_FILE_ADD(clock, show_clock, set_clock); GPEX_UTILS_SYSFS_DEVICE_FILE_ADD_RO(asv_table, show_asv_table); @@ -457,6 +486,7 @@ int gpex_clock_sysfs_init(struct _clock_info *_clk_info) GPEX_UTILS_SYSFS_DEVICE_FILE_ADD_RO(dvfs_min_lock, show_min_lock_dvfs); GPEX_UTILS_SYSFS_DEVICE_FILE_ADD_RO(dvfs_max_lock_status, show_max_lock_status); GPEX_UTILS_SYSFS_DEVICE_FILE_ADD_RO(dvfs_min_lock_status, show_min_lock_status); + GPEX_UTILS_SYSFS_DEVICE_FILE_ADD_RO(volt, show_volt); GPEX_UTILS_SYSFS_KOBJECT_FILE_ADD_RO(gpu_max_clock, show_max_lock_dvfs_kobj); GPEX_UTILS_SYSFS_KOBJECT_FILE_ADD_RO(gpu_min_clock, show_min_lock_dvfs_kobj); @@ -465,6 +495,7 @@ int gpex_clock_sysfs_init(struct _clock_info *_clk_info) GPEX_UTILS_SYSFS_KOBJECT_FILE_ADD_RO(gpu_clock, show_clock); GPEX_UTILS_SYSFS_KOBJECT_FILE_ADD_RO(gpu_freq_table, show_gpu_freq_table); GPEX_UTILS_SYSFS_KOBJECT_FILE_ADD(gpu_unlock, get_gpu_unlock, set_gpu_unlock); + GPEX_UTILS_SYSFS_KOBJECT_FILE_ADD_RO(gpu_volt, show_volt); return 0; }