kernel_samsung_a53x/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts

/dts-v1/;

/ {
	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "HiKey Development Board";

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;

		cpu-map {

			cluster0 {

				core0 {
					cpu = <0x02>;
				};

				core1 {
					cpu = <0x03>;
				};

				core2 {
					cpu = <0x04>;
				};

				core3 {
					cpu = <0x05>;
				};
			};

			cluster1 {

				core0 {
					cpu = <0x06>;
				};

				core1 {
					cpu = <0x07>;
				};

				core2 {
					cpu = <0x08>;
				};

				core3 {
					cpu = <0x09>;
				};
			};
		};

		idle-states {
			entry-method = "psci";

			cpu-sleep {
				compatible = "arm,idle-state";
				local-timer-stop;
				arm,psci-suspend-param = <0x10000>;
				entry-latency-us = <0x2bc>;
				exit-latency-us = <0xfa>;
				min-residency-us = <0x3e8>;
				phandle = <0x0d>;
			};

			cluster-sleep {
				compatible = "arm,idle-state";
				local-timer-stop;
				arm,psci-suspend-param = <0x1010000>;
				entry-latency-us = <0x3e8>;
				exit-latency-us = <0x2bc>;
				min-residency-us = <0xa8c>;
				wakeup-latency-us = <0x5dc>;
				phandle = <0x0e>;
			};
		};

		cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x00>;
			enable-method = "psci";
			next-level-cache = <0x0a>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x02>;
		};

		cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x01>;
			enable-method = "psci";
			next-level-cache = <0x0a>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x03>;
		};

		cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x02>;
			enable-method = "psci";
			next-level-cache = <0x0a>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x04>;
		};

		cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x03>;
			enable-method = "psci";
			next-level-cache = <0x0a>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x05>;
		};

		cpu@100 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x100>;
			enable-method = "psci";
			next-level-cache = <0x0f>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x06>;
		};

		cpu@101 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x101>;
			enable-method = "psci";
			next-level-cache = <0x0f>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x07>;
		};

		cpu@102 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x102>;
			enable-method = "psci";
			next-level-cache = <0x0f>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x08>;
		};

		cpu@103 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x00 0x103>;
			enable-method = "psci";
			next-level-cache = <0x0f>;
			clocks = <0x0b 0x00>;
			operating-points-v2 = <0x0c>;
			cpu-idle-states = <0x0d 0x0e>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x137>;
			phandle = <0x09>;
		};

		l2-cache0 {
			compatible = "cache";
			phandle = <0x0a>;
		};

		l2-cache1 {
			compatible = "cache";
			phandle = <0x0f>;
		};
	};

	cpu_opp_table {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x0c>;

		opp00 {
			opp-hz = <0x00 0xc65d400>;
			opp-microvolt = <0xfde80>;
			clock-latency-ns = <0x7a120>;
		};

		opp01 {
			opp-hz = <0x00 0x19bfcc00>;
			opp-microvolt = <0xfde80>;
			clock-latency-ns = <0x7a120>;
		};

		opp02 {
			opp-hz = <0x00 0x2b73a840>;
			opp-microvolt = <0x10a1d0>;
			clock-latency-ns = <0x7a120>;
		};

		opp03 {
			opp-hz = <0x00 0x39387000>;
			opp-microvolt = <0x120160>;
			clock-latency-ns = <0x7a120>;
		};

		opp04 {
			opp-hz = <0x00 0x47868c00>;
			opp-microvolt = <0x144b50>;
			clock-latency-ns = <0x7a120>;
		};
	};

	interrupt-controller@f6801000 {
		compatible = "arm,gic-400";
		reg = <0x00 0xf6801000 0x00 0x1000 0x00 0xf6802000 0x00 0x2000 0x00 0xf6804000 0x00 0x2000 0x00 0xf6806000 0x00 0x2000>;
		#address-cells = <0x00>;
		#interrupt-cells = <0x03>;
		interrupt-controller;
		interrupts = <0x01 0x09 0xff04>;
		phandle = <0x01>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <0x01>;
		interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		sram@fff80000 {
			compatible = "hisilicon,hi6220-sramctrl", "syscon";
			reg = <0x00 0xfff80000 0x00 0x12000>;
			phandle = <0x10>;
		};

		ao_ctrl@f7800000 {
			compatible = "hisilicon,hi6220-aoctrl", "syscon";
			reg = <0x00 0xf7800000 0x00 0x2000>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x12>;
		};

		sys_ctrl@f7030000 {
			compatible = "hisilicon,hi6220-sysctrl", "syscon";
			reg = <0x00 0xf7030000 0x00 0x2000>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x13>;
		};

		media_ctrl@f4410000 {
			compatible = "hisilicon,hi6220-mediactrl", "syscon";
			reg = <0x00 0xf4410000 0x00 0x1000>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x54>;
		};

		pm_ctrl@f7032000 {
			compatible = "hisilicon,hi6220-pmctrl", "syscon";
			reg = <0x00 0xf7032000 0x00 0x1000>;
			#clock-cells = <0x01>;
			phandle = <0x7f>;
		};

		acpu_sctrl@f6504000 {
			compatible = "hisilicon,hi6220-acpu-sctrl", "syscon";
			reg = <0x00 0xf6504000 0x00 0x1000>;
			#clock-cells = <0x01>;
			phandle = <0x58>;
		};

		medianoc_ade@f4520000 {
			compatible = "syscon";
			reg = <0x00 0xf4520000 0x00 0x4000>;
			phandle = <0x53>;
		};

		stub_clock {
			compatible = "hisilicon,hi6220-stub-clk";
			hisilicon,hi6220-clk-sram = <0x10>;
			#clock-cells = <0x01>;
			mbox-names = "mbox-tx";
			mboxes = <0x11 0x01 0x00 0x0b>;
			phandle = <0x0b>;
		};

		serial@f8015000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0x00 0xf8015000 0x00 0x1000>;
			interrupts = <0x00 0x24 0x04>;
			clocks = <0x12 0x24 0x12 0x24>;
			clock-names = "uartclk", "apb_pclk";
			phandle = <0x80>;
		};

		serial@f7111000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0x00 0xf7111000 0x00 0x1000>;
			interrupts = <0x00 0x25 0x04>;
			clocks = <0x13 0x11 0x13 0x11>;
			clock-names = "uartclk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <0x14 0x15 0x16>;
			dmas = <0x17 0x08 0x17 0x09>;
			dma-names = "rx", "tx";
			status = "okay";
			assigned-clocks = <0x13 0x29>;
			assigned-clock-rates = <0x8f0d180>;
			phandle = <0x81>;

			bluetooth {
				compatible = "ti,wl1835-st";
				enable-gpios = <0x18 0x07 0x00>;
				clocks = <0x19>;
				clock-names = "ext_clock";
			};
		};

		serial@f7112000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0x00 0xf7112000 0x00 0x1000>;
			interrupts = <0x00 0x26 0x04>;
			clocks = <0x13 0x12 0x13 0x12>;
			clock-names = "uartclk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <0x1a 0x1b>;
			status = "okay";
			label = "LS-UART0";
			phandle = <0x82>;
		};

		serial@f7113000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0x00 0xf7113000 0x00 0x1000>;
			interrupts = <0x00 0x27 0x04>;
			clocks = <0x13 0x13 0x13 0x13>;
			clock-names = "uartclk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <0x1c 0x1d>;
			status = "okay";
			label = "LS-UART1";
			phandle = <0x83>;
		};

		serial@f7114000 {
			compatible = "arm,pl011", "arm,primecell";
			reg = <0x00 0xf7114000 0x00 0x1000>;
			interrupts = <0x00 0x28 0x04>;
			clocks = <0x13 0x14 0x13 0x14>;
			clock-names = "uartclk", "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <0x1e 0x1f>;
			status = "disabled";
			phandle = <0x84>;
		};

		dma@f7370000 {
			compatible = "hisilicon,k3-dma-1.0";
			reg = <0x00 0xf7370000 0x00 0x1000>;
			#dma-cells = <0x01>;
			dma-channels = <0x0f>;
			dma-requests = <0x20>;
			interrupts = <0x00 0x54 0x04>;
			clocks = <0x13 0x0b>;
			dma-no-cci;
			dma-type = "hi6220_dma";
			status = "okay";
			phandle = <0x17>;
		};

		timer@f8008000 {
			compatible = "arm,sp804", "arm,primecell";
			reg = <0x00 0xf8008000 0x00 0x1000>;
			interrupts = <0x00 0x0e 0x04 0x00 0x0f 0x04>;
			clocks = <0x12 0x1b 0x12 0x1b 0x12 0x1b>;
			clock-names = "timer1", "timer2", "apb_pclk";
			phandle = <0x85>;
		};

		rtc@f8003000 {
			compatible = "arm,pl031", "arm,primecell";
			reg = <0x00 0xf8003000 0x00 0x1000>;
			interrupts = <0x00 0x0c 0x04>;
			clocks = <0x12 0x25>;
			clock-names = "apb_pclk";
			phandle = <0x86>;
		};

		rtc@f8004000 {
			compatible = "arm,pl031", "arm,primecell";
			reg = <0x00 0xf8004000 0x00 0x1000>;
			interrupts = <0x00 0x08 0x04>;
			clocks = <0x12 0x26>;
			clock-names = "apb_pclk";
			phandle = <0x87>;
		};

		pinmux@f7010000 {
			compatible = "pinctrl-single";
			reg = <0x00 0xf7010000 0x00 0x27c>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			#pinctrl-cells = <0x01>;
			#gpio-range-cells = <0x03>;
			pinctrl-single,register-width = <0x20>;
			pinctrl-single,function-mask = <0x07>;
			pinctrl-single,gpio-range = <0x20 0x50 0x08 0x00 0x20 0x58 0x08 0x00 0x20 0x60 0x08 0x00 0x20 0x68 0x08 0x00 0x20 0x70 0x08 0x00 0x20 0x78 0x02 0x00 0x20 0x02 0x06 0x01 0x20 0x08 0x08 0x01 0x20 0x00 0x01 0x01 0x20 0x10 0x07 0x01 0x20 0x17 0x03 0x01 0x20 0x1c 0x05 0x01 0x20 0x21 0x03 0x01 0x20 0x2b 0x05 0x01 0x20 0x30 0x08 0x01 0x20 0x38 0x08 0x01 0x20 0x4a 0x06 0x01 0x20 0x7a 0x01 0x01 0x20 0x7e 0x01 0x01 0x20 0x7f 0x08 0x01 0x20 0x87 0x08 0x01 0x20 0x8f 0x08 0x01 0x20 0x97 0x08 0x01>;
			pinctrl-names = "default";
			pinctrl-0 = <0x21 0x22 0x23 0x24 0x25>;
			phandle = <0x2c>;

			gpio-range {
				#pinctrl-single,gpio-range-cells = <0x03>;
				phandle = <0x20>;
			};

			boot_sel_pmx_func {
				pinctrl-single,pins = <0x00 0x00>;
				phandle = <0x21>;
			};

			emmc_pmx_func {
				pinctrl-single,pins = <0x100 0x00 0x104 0x00 0x108 0x00 0x10c 0x00 0x110 0x00 0x114 0x00 0x118 0x00 0x11c 0x00 0x120 0x00 0x124 0x00>;
				phandle = <0x3b>;
			};

			sd_pmx_func {
				pinctrl-single,pins = <0x0c 0x00 0x10 0x00 0x14 0x00 0x18 0x00 0x1c 0x00 0x20 0x00>;
				phandle = <0x40>;
			};

			sd_pmx_idle {
				pinctrl-single,pins = <0x0c 0x01 0x10 0x01 0x14 0x01 0x18 0x01 0x1c 0x01 0x20 0x01>;
				phandle = <0x43>;
			};

			sdio_pmx_func {
				pinctrl-single,pins = <0x128 0x00 0x12c 0x00 0x130 0x00 0x134 0x00 0x138 0x00 0x13c 0x00>;
				phandle = <0x48>;
			};

			sdio_pmx_idle {
				pinctrl-single,pins = <0x128 0x01 0x12c 0x01 0x130 0x01 0x134 0x01 0x138 0x01 0x13c 0x01>;
				phandle = <0x4b>;
			};

			isp_pmx_func {
				pinctrl-single,pins = <0x24 0x00 0x28 0x00 0x2c 0x00 0x30 0x01 0x34 0x01 0x38 0x01 0x3c 0x00 0x40 0x00 0x44 0x00 0x48 0x00 0x4c 0x01 0x50 0x01 0x54 0x00 0x58 0x00 0x5c 0x00 0x60 0x00>;
				phandle = <0x88>;
			};

			hkadc_ssi_pmx_func {
				pinctrl-single,pins = <0x68 0x00>;
				phandle = <0x22>;
			};

			codec_clk_pmx_func {
				pinctrl-single,pins = <0x6c 0x00>;
				phandle = <0x23>;
			};

			codec_pmx_func {
				pinctrl-single,pins = <0x70 0x01 0x74 0x00 0x78 0x00 0x7c 0x00>;
				phandle = <0x89>;
			};

			fm_pmx_func {
				pinctrl-single,pins = <0x80 0x01 0x84 0x01 0x88 0x01 0x8c 0x01>;
				phandle = <0x8a>;
			};

			bt_pmx_func {
				pinctrl-single,pins = <0x90 0x00 0x94 0x00 0x98 0x00 0x9c 0x00>;
				phandle = <0x8b>;
			};

			pwm_in_pmx_func {
				pinctrl-single,pins = <0xb8 0x01>;
				phandle = <0x24>;
			};

			bl_pwm_pmx_func {
				pinctrl-single,pins = <0xbc 0x01>;
				phandle = <0x25>;
			};

			uart0_pmx_func {
				pinctrl-single,pins = <0xc0 0x00 0xc4 0x00>;
				phandle = <0x8c>;
			};

			uart1_pmx_func {
				pinctrl-single,pins = <0xc8 0x00 0xcc 0x00 0xd0 0x00 0xd4 0x00>;
				phandle = <0x14>;
			};

			uart2_pmx_func {
				pinctrl-single,pins = <0xd8 0x00 0xdc 0x00 0xe0 0x00 0xe4 0x00>;
				phandle = <0x1a>;
			};

			uart3_pmx_func {
				pinctrl-single,pins = <0x180 0x01 0x184 0x01 0x188 0x01 0x18c 0x01>;
				phandle = <0x1c>;
			};

			uart4_pmx_func {
				pinctrl-single,pins = <0x1d0 0x01 0x1d4 0x01 0x1d8 0x01 0x1dc 0x01>;
				phandle = <0x1e>;
			};

			uart5_pmx_func {
				pinctrl-single,pins = <0x1c8 0x01 0x1cc 0x01>;
				phandle = <0x8d>;
			};

			i2c0_pmx_func {
				pinctrl-single,pins = <0xe8 0x00 0xec 0x00>;
				phandle = <0x30>;
			};

			i2c1_pmx_func {
				pinctrl-single,pins = <0xf0 0x00 0xf4 0x00>;
				phandle = <0x32>;
			};

			i2c2_pmx_func {
				pinctrl-single,pins = <0xf8 0x00 0xfc 0x00>;
				phandle = <0x34>;
			};

			spi0_pmx_func {
				pinctrl-single,pins = <0x1a0 0x01 0x1a4 0x01 0x1a8 0x01 0x1ac 0x01>;
				phandle = <0x2d>;
			};
		};

		pinmux@f7010800 {
			compatible = "pinconf-single";
			reg = <0x00 0xf7010800 0x00 0x28c>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			#pinctrl-cells = <0x01>;
			pinctrl-single,register-width = <0x20>;
			pinctrl-names = "default";
			pinctrl-0 = <0x26 0x27 0x28 0x29 0x2a>;
			phandle = <0x8e>;

			boot_sel_cfg_func {
				pinctrl-single,pins = <0x00 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x26>;
			};

			hkadc_ssi_cfg_func {
				pinctrl-single,pins = <0x6c 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x27>;
			};

			emmc_clk_cfg_func {
				pinctrl-single,pins = <0x104 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x20 0x70>;
				phandle = <0x3c>;
			};

			emmc_cfg_func {
				pinctrl-single,pins = <0x108 0x00 0x10c 0x00 0x110 0x00 0x114 0x00 0x118 0x00 0x11c 0x00 0x120 0x00 0x124 0x00 0x128 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x10 0x70>;
				phandle = <0x3d>;
			};

			emmc_rst_cfg_func {
				pinctrl-single,pins = <0x12c 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x10 0x70>;
				phandle = <0x3e>;
			};

			sd_clk_cfg_func {
				pinctrl-single,pins = <0x0c 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x30 0x70>;
				phandle = <0x41>;
			};

			sd_clk_cfg_idle {
				pinctrl-single,pins = <0x0c 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x44>;
			};

			sd_cfg_func {
				pinctrl-single,pins = <0x10 0x00 0x14 0x00 0x18 0x00 0x1c 0x00 0x20 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x20 0x70>;
				phandle = <0x42>;
			};

			sd_cfg_idle {
				pinctrl-single,pins = <0x10 0x00 0x14 0x00 0x18 0x00 0x1c 0x00 0x20 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x45>;
			};

			sdio_clk_cfg_func {
				pinctrl-single,pins = <0x134 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x20 0x70>;
				phandle = <0x49>;
			};

			sdio_clk_cfg_idle {
				pinctrl-single,pins = <0x134 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x4c>;
			};

			sdio_cfg_func {
				pinctrl-single,pins = <0x138 0x00 0x13c 0x00 0x140 0x00 0x144 0x00 0x148 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x10 0x70>;
				phandle = <0x4a>;
			};

			sdio_cfg_idle {
				pinctrl-single,pins = <0x138 0x00 0x13c 0x00 0x140 0x00 0x144 0x00 0x148 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x4d>;
			};

			isp_cfg_func1 {
				pinctrl-single,pins = <0x28 0x00 0x2c 0x00 0x30 0x00 0x34 0x00 0x38 0x00 0x3c 0x00 0x40 0x00 0x44 0x00 0x48 0x00 0x4c 0x00 0x50 0x00 0x58 0x00 0x5c 0x00 0x60 0x00 0x64 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x8f>;
			};

			isp_cfg_idle1 {
				pinctrl-single,pins = <0x34 0x00 0x38 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x90>;
			};

			isp_cfg_func2 {
				pinctrl-single,pins = <0x54 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x91>;
			};

			codec_clk_cfg_func {
				pinctrl-single,pins = <0x70 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x10 0x70>;
				phandle = <0x28>;
			};

			codec_clk_cfg_idle {
				pinctrl-single,pins = <0x70 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x92>;
			};

			codec_cfg_func1 {
				pinctrl-single,pins = <0x74 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x93>;
			};

			codec_cfg_func2 {
				pinctrl-single,pins = <0x78 0x00 0x7c 0x00 0x80 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x10 0x70>;
				phandle = <0x94>;
			};

			codec_cfg_idle2 {
				pinctrl-single,pins = <0x78 0x00 0x7c 0x00 0x80 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x95>;
			};

			fm_cfg_func {
				pinctrl-single,pins = <0x84 0x00 0x88 0x00 0x8c 0x00 0x90 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x96>;
			};

			bt_cfg_func {
				pinctrl-single,pins = <0x94 0x00 0x98 0x00 0x9c 0x00 0xa0 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x97>;
			};

			bt_cfg_idle {
				pinctrl-single,pins = <0x94 0x00 0x98 0x00 0x9c 0x00 0xa0 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x98>;
			};

			pwm_in_cfg_func {
				pinctrl-single,pins = <0xbc 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x29>;
			};

			bl_pwm_cfg_func {
				pinctrl-single,pins = <0xc0 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x2a>;
			};

			uart0_cfg_func1 {
				pinctrl-single,pins = <0xc4 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x99>;
			};

			uart0_cfg_func2 {
				pinctrl-single,pins = <0xc8 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x10 0x70>;
				phandle = <0x9a>;
			};

			uart1_cfg_func1 {
				pinctrl-single,pins = <0xcc 0x00 0xd4 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x01 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x15>;
			};

			uart1_cfg_func2 {
				pinctrl-single,pins = <0xd0 0x00 0xd8 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x16>;
			};

			uart2_cfg_func {
				pinctrl-single,pins = <0xdc 0x00 0xe0 0x00 0xe4 0x00 0xe8 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x1b>;
			};

			uart3_cfg_func {
				pinctrl-single,pins = <0x190 0x00 0x194 0x00 0x198 0x00 0x19c 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x1d>;
			};

			uart4_cfg_func {
				pinctrl-single,pins = <0x1e0 0x00 0x1e4 0x00 0x1e8 0x00 0x1ec 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x1f>;
			};

			uart5_cfg_func {
				pinctrl-single,pins = <0x1d8 0x00 0x1dc 0x00>;
				pinctrl-single,bias-pulldown = <0x02 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x9b>;
			};

			i2c0_cfg_func {
				pinctrl-single,pins = <0xec 0x00 0xf0 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x31>;
			};

			i2c1_cfg_func {
				pinctrl-single,pins = <0xf4 0x00 0xf8 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x33>;
			};

			i2c2_cfg_func {
				pinctrl-single,pins = <0xfc 0x00 0x100 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x35>;
			};

			spi0_cfg_func {
				pinctrl-single,pins = <0x1b0 0x00 0x1b4 0x00 0x1b8 0x00 0x1bc 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x2e>;
			};
		};

		pinmux@f8001800 {
			compatible = "pinconf-single";
			reg = <0x00 0xf8001800 0x00 0x78>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			#pinctrl-cells = <0x01>;
			pinctrl-single,register-width = <0x20>;
			pinctrl-names = "default";
			pinctrl-0 = <0x2b>;
			phandle = <0x9c>;

			rstout_n_cfg_func {
				pinctrl-single,pins = <0x00 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x2b>;
			};

			pmu_peri_en_cfg_func {
				pinctrl-single,pins = <0x04 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x9d>;
			};

			sysclk0_en_cfg_func {
				pinctrl-single,pins = <0x08 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0x9e>;
			};

			jtag_tdo_cfg_func {
				pinctrl-single,pins = <0x0c 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x20 0x70>;
				phandle = <0x9f>;
			};

			rf_reset_cfg_func {
				pinctrl-single,pins = <0x70 0x00 0x74 0x00>;
				pinctrl-single,bias-pulldown = <0x00 0x02 0x00 0x02>;
				pinctrl-single,bias-pullup = <0x00 0x01 0x00 0x01>;
				pinctrl-single,drive-strength = <0x00 0x70>;
				phandle = <0xa0>;
			};
		};

		gpio@f8011000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf8011000 0x00 0x1000>;
			interrupts = <0x00 0x34 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "PWR_HOLD", "DSI_SEL", "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON", "PWRON_DET", "5V_HUB_EN";
			phandle = <0x36>;
		};

		gpio@f8012000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf8012000 0x00 0x1000>;
			interrupts = <0x00 0x35 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N", "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
			phandle = <0x18>;
		};

		gpio@f8013000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf8013000 0x00 0x1000>;
			interrupts = <0x00 0x36 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "GPIO-A", "GPIO-B", "GPIO-C", "GPIO-D", "GPIO-E", "USB_ID_DET", "USB_VBUS_DET", "GPIO-H";
			phandle = <0xa1>;
		};

		gpio@f8014000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf8014000 0x00 0x1000>;
			interrupts = <0x00 0x37 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x50 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "", "WLAN_ACTIVE", "NC", "NC";
			phandle = <0x7d>;
		};

		gpio@f7020000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7020000 0x00 0x1000>;
			interrupts = <0x00 0x38 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x58 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3", "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
			phandle = <0x7c>;
		};

		gpio@f7021000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7021000 0x00 0x1000>;
			interrupts = <0x00 0x39 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x60 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "NC", "NC", "[UART1_RxD]", "[UART1_TxD]", "[AUX_SSI1]", "NC", "[PCM_CLK]", "[PCM_FS]";
			phandle = <0xa2>;
		};

		gpio@f7022000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7022000 0x00 0x1000>;
			interrupts = <0x00 0x3a 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x68 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "[SPI0_DIN]", "[SPI0_DOUT]", "[SPI0_CS]", "[SPI0_SCLK]", "NC", "NC", "NC", "GPIO-G";
			phandle = <0x2f>;
		};

		gpio@f7023000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7023000 0x00 0x1000>;
			interrupts = <0x00 0x3b 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x70 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "NC", "NC", "NC", "NC", "[PCM_DI]", "[PCM_DO]", "NC", "NC";
			phandle = <0xa3>;
		};

		gpio@f7024000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7024000 0x00 0x1000>;
			interrupts = <0x00 0x3c 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x78 0x02 0x2c 0x02 0x02 0x06>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC", "", "", "", "", "", "";
			phandle = <0xa4>;
		};

		gpio@f7025000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7025000 0x00 0x1000>;
			interrupts = <0x00 0x3d 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x08 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "", "GPIO-J", "GPIO-L", "NC", "NC", "NC", "NC", "[ISP_CCLK0]";
			phandle = <0xa5>;
		};

		gpio@f7026000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7026000 0x00 0x1000>;
			interrupts = <0x00 0x3e 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x00 0x01 0x2c 0x01 0x10 0x07>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "BOOT_SEL", "[ISP_CCLK1]", "GPIO-I", "GPIO-K", "NC", "NC", "[I2C2_SDA]", "[I2C2_SCL]";
			phandle = <0xa6>;
		};

		gpio@f7027000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7027000 0x00 0x1000>;
			interrupts = <0x00 0x3f 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x17 0x03 0x2c 0x03 0x1c 0x05>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "[I2C3_SDA]", "[I2C3_SCL]", "", "NC", "NC", "NC", "", "";
			phandle = <0xa7>;
		};

		gpio@f7028000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7028000 0x00 0x1000>;
			interrupts = <0x00 0x40 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x21 0x03 0x2c 0x03 0x2b 0x05>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]", "[BT_PCM_DO]", "NC", "NC", "NC", "NC", "GPIO-F";
			phandle = <0xa8>;
		};

		gpio@f7029000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf7029000 0x00 0x1000>;
			interrupts = <0x00 0x41 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x30 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "[UART0_RX]", "[UART0_TX]", "[BT_UART1_CTS]", "[BT_UART1_RTS]", "[BT_UART1_RX]", "[BT_UART1_TX]", "[UART0_CTS]", "[UART0_RTS]";
			phandle = <0xa9>;
		};

		gpio@f702a000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf702a000 0x00 0x1000>;
			interrupts = <0x00 0x42 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x38 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = "[UART0_RxD]", "[UART0_TxD]", "[I2C0_SCL]", "[I2C0_SDA]", "[I2C1_SCL]", "[I2C1_SDA]", "[I2C2_SCL]", "[I2C2_SDA]";
			phandle = <0xaa>;
		};

		gpio@f702b000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf702b000 0x00 0x1000>;
			interrupts = <0x00 0x43 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x4a 0x06 0x2c 0x06 0x7a 0x01 0x2c 0x07 0x7e 0x01>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			gpio-line-names = [00 00 00 00 00 00 4e 43 00 00];
			phandle = <0xab>;
		};

		gpio@f702c000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf702c000 0x00 0x1000>;
			interrupts = <0x00 0x44 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x7f 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			phandle = <0xac>;
		};

		gpio@f702d000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf702d000 0x00 0x1000>;
			interrupts = <0x00 0x45 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x87 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			phandle = <0xad>;
		};

		gpio@f702e000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf702e000 0x00 0x1000>;
			interrupts = <0x00 0x46 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x8f 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			phandle = <0xae>;
		};

		gpio@f702f000 {
			compatible = "arm,pl061", "arm,primecell";
			reg = <0x00 0xf702f000 0x00 0x1000>;
			interrupts = <0x00 0x47 0x04>;
			gpio-controller;
			#gpio-cells = <0x02>;
			gpio-ranges = <0x2c 0x00 0x97 0x08>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			clocks = <0x12 0x02>;
			clock-names = "apb_pclk";
			phandle = <0xaf>;
		};

		spi@f7106000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0x00 0xf7106000 0x00 0x1000>;
			interrupts = <0x00 0x32 0x04>;
			bus-id = <0x00>;
			enable-dma = <0x00>;
			clocks = <0x13 0x15>;
			clock-names = "apb_pclk";
			pinctrl-names = "default";
			pinctrl-0 = <0x2d 0x2e>;
			num-cs = <0x01>;
			cs-gpios = <0x2f 0x02 0x00>;
			status = "okay";
			phandle = <0xb0>;
		};

		i2c@f7100000 {
			compatible = "snps,designware-i2c";
			reg = <0x00 0xf7100000 0x00 0x1000>;
			interrupts = <0x00 0x2c 0x04>;
			clocks = <0x13 0x0d>;
			i2c-sda-hold-time-ns = <0x12c>;
			pinctrl-names = "default";
			pinctrl-0 = <0x30 0x31>;
			status = "okay";
			phandle = <0xb1>;
		};

		i2c@f7101000 {
			compatible = "snps,designware-i2c";
			reg = <0x00 0xf7101000 0x00 0x1000>;
			clocks = <0x13 0x0e>;
			interrupts = <0x00 0x2d 0x04>;
			i2c-sda-hold-time-ns = <0x12c>;
			pinctrl-names = "default";
			pinctrl-0 = <0x32 0x33>;
			status = "okay";
			phandle = <0xb2>;
		};

		i2c@f7102000 {
			compatible = "snps,designware-i2c";
			reg = <0x00 0xf7102000 0x00 0x1000>;
			clocks = <0x13 0x0f>;
			interrupts = <0x00 0x2e 0x04>;
			i2c-sda-hold-time-ns = <0x12c>;
			pinctrl-names = "default";
			pinctrl-0 = <0x34 0x35>;
			status = "okay";
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0xb3>;

			adv7533@39 {
				compatible = "adi,adv7533";
				reg = <0x39>;
				interrupt-parent = <0x18>;
				interrupts = <0x01 0x02>;
				pd-gpios = <0x36 0x04 0x00>;
				adi,dsi-lanes = <0x04>;
				#sound-dai-cells = <0x00>;
				phandle = <0xb4>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@0 {

						endpoint {
							remote-endpoint = <0x37>;
							phandle = <0x57>;
						};
					};

					port@2 {
						reg = <0x02>;

						endpoint {
							remote-endpoint = <0x38>;
							phandle = <0x50>;
						};
					};
				};
			};
		};

		usbphy {
			compatible = "hisilicon,hi6220-usb-phy";
			#phy-cells = <0x00>;
			phy-supply = <0x39>;
			hisilicon,peripheral-syscon = <0x13>;
			phandle = <0x3a>;
		};

		usb@f72c0000 {
			compatible = "hisilicon,hi6220-usb";
			reg = <0x00 0xf72c0000 0x00 0x40000>;
			phys = <0x3a>;
			phy-names = "usb2-phy";
			clocks = <0x13 0x07>;
			clock-names = "otg";
			dr_mode = "otg";
			g-rx-fifo-size = <0x200>;
			g-np-tx-fifo-size = <0x80>;
			g-tx-fifo-size = <0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x10 0x10 0x10 0x10 0x10 0x10 0x10>;
			interrupts = <0x00 0x4d 0x04>;
			phandle = <0xb5>;
		};

		mailbox@f7510000 {
			compatible = "hisilicon,hi6220-mbox";
			reg = <0x00 0xf7510000 0x00 0x1000 0x00 0x6dff800 0x00 0x800>;
			interrupts = <0x00 0x5e 0x04>;
			#mbox-cells = <0x03>;
			phandle = <0x11>;
		};

		dwmmc0@f723d000 {
			compatible = "hisilicon,hi6220-dw-mshc";
			reg = <0x00 0xf723d000 0x00 0x1000>;
			interrupts = <0x00 0x48 0x04>;
			clocks = <0x13 0x02 0x13 0x01>;
			clock-names = "ciu", "biu";
			resets = <0x13 0x00>;
			reset-names = "reset";
			pinctrl-names = "default";
			pinctrl-0 = <0x3b 0x3c 0x3d 0x3e>;
			cap-mmc-highspeed;
			non-removable;
			bus-width = <0x08>;
			vmmc-supply = <0x3f>;
			phandle = <0xb6>;
		};

		dwmmc1@f723e000 {
			compatible = "hisilicon,hi6220-dw-mshc";
			hisilicon,peripheral-syscon = <0x12>;
			reg = <0x00 0xf723e000 0x00 0x1000>;
			interrupts = <0x00 0x49 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x13 0x04 0x13 0x03>;
			clock-names = "ciu", "biu";
			resets = <0x13 0x01>;
			reset-names = "reset";
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x40 0x41 0x42>;
			pinctrl-1 = <0x43 0x44 0x45>;
			card-detect-delay = <0xc8>;
			cap-sd-highspeed;
			sd-uhs-sdr12;
			sd-uhs-sdr25;
			sd-uhs-sdr50;
			vqmmc-supply = <0x46>;
			vmmc-supply = <0x47>;
			bus-width = <0x04>;
			disable-wp;
			cd-gpios = <0x18 0x00 0x01>;
			phandle = <0xb7>;
		};

		dwmmc2@f723f000 {
			compatible = "hisilicon,hi6220-dw-mshc";
			reg = <0x00 0xf723f000 0x00 0x1000>;
			interrupts = <0x00 0x4a 0x04>;
			clocks = <0x13 0x06 0x13 0x05>;
			clock-names = "ciu", "biu";
			resets = <0x13 0x02>;
			reset-names = "reset";
			pinctrl-names = "default", "idle";
			pinctrl-0 = <0x48 0x49 0x4a>;
			pinctrl-1 = <0x4b 0x4c 0x4d>;
			bus-width = <0x04>;
			non-removable;
			cap-power-off-card;
			vmmc-supply = <0x4e>;
			mmc-pwrseq = <0x4f>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0xb8>;

			wlcore@2 {
				compatible = "ti,wl1835";
				reg = <0x02>;
				interrupt-parent = <0x18>;
				interrupts = <0x03 0x01>;
				phandle = <0xb9>;
			};
		};

		watchdog@f8005000 {
			compatible = "arm,sp805", "arm,primecell";
			reg = <0x00 0xf8005000 0x00 0x1000>;
			interrupts = <0x00 0x0d 0x04>;
			clocks = <0x12 0x18 0x12 0x18>;
			clock-names = "wdog_clk", "apb_pclk";
			phandle = <0xba>;
		};

		tsensor@0,f7030700 {
			compatible = "hisilicon,tsensor";
			reg = <0x00 0xf7030700 0x00 0x1000>;
			interrupts = <0x00 0x07 0x04>;
			clocks = <0x13 0x16>;
			clock-names = "thermal_clk";
			#thermal-sensor-cells = <0x01>;
			phandle = <0x51>;
		};

		i2s@f7118000 {
			compatible = "hisilicon,hi6210-i2s";
			reg = <0x00 0xf7118000 0x00 0x8000>;
			interrupts = <0x00 0x7b 0x04>;
			clocks = <0x13 0x0a 0x13 0x38>;
			clock-names = "dacodec", "i2s-base";
			dmas = <0x17 0x0f 0x17 0x0e>;
			dma-names = "rx", "tx";
			hisilicon,sysctrl-syscon = <0x13>;
			#sound-dai-cells = <0x01>;
			phandle = <0xbb>;

			ports {

				port@0 {
					phandle = <0x7e>;

					endpoint {
						remote-endpoint = <0x50>;
						dai-format = "i2s";
						phandle = <0x38>;
					};
				};
			};
		};

		thermal-zones {

			cls0 {
				polling-delay = <0x3e8>;
				polling-delay-passive = <0x64>;
				sustainable-power = <0xcfe>;
				thermal-sensors = <0x51 0x02>;
				phandle = <0xbc>;

				trips {

					trip-point@0 {
						temperature = <0xfde8>;
						hysteresis = <0x00>;
						type = "passive";
						phandle = <0xbd>;
					};

					trip-point@1 {
						temperature = <0x124f8>;
						hysteresis = <0x00>;
						type = "passive";
						phandle = <0x52>;
					};
				};

				cooling-maps {

					map0 {
						trip = <0x52>;
						cooling-device = <0x02 0xffffffff 0xffffffff 0x03 0xffffffff 0xffffffff 0x04 0xffffffff 0xffffffff 0x05 0xffffffff 0xffffffff 0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>;
					};
				};
			};
		};

		ade@f4100000 {
			compatible = "hisilicon,hi6220-ade";
			reg = <0x00 0xf4100000 0x00 0x7800>;
			reg-names = "ade_base";
			hisilicon,noc-syscon = <0x53>;
			resets = <0x54 0x05>;
			interrupts = <0x00 0x73 0x04>;
			clocks = <0x54 0x05 0x54 0x11 0x54 0x15>;
			clock-names = "clk_ade_core", "clk_codec_jpeg", "clk_ade_pix";
			assigned-clocks = <0x54 0x05 0x54 0x11>;
			assigned-clock-rates = <0x15752a00 0x112a8800>;
			dma-coherent;
			status = "okay";
			phandle = <0xbe>;

			port {

				endpoint {
					remote-endpoint = <0x55>;
					phandle = <0x56>;
				};
			};
		};

		dsi@f4107800 {
			compatible = "hisilicon,hi6220-dsi";
			reg = <0x00 0xf4107800 0x00 0x100>;
			clocks = <0x54 0x01>;
			clock-names = "pclk";
			status = "okay";
			phandle = <0xbf>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x56>;
						phandle = <0x55>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint@0 {
						remote-endpoint = <0x57>;
						phandle = <0x37>;
					};
				};
			};
		};

		debug@f6590000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf6590000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x02>;
		};

		debug@f6592000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf6592000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x03>;
		};

		debug@f6594000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf6594000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x04>;
		};

		debug@f6596000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf6596000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x05>;
		};

		debug@f65d0000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf65d0000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x06>;
		};

		debug@f65d2000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf65d2000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x07>;
		};

		debug@f65d4000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf65d4000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x08>;
		};

		debug@f65d6000 {
			compatible = "arm,coresight-cpu-debug", "arm,primecell";
			reg = <0x00 0xf65d6000 0x00 0x1000>;
			clocks = <0x13 0x3b>;
			clock-names = "apb_pclk";
			cpu = <0x09>;
		};

		gpu@f4080000 {
			compatible = "hisilicon,hi6220-mali", "arm,mali-450";
			reg = <0x00 0xf4080000 0x00 0x40000>;
			interrupt-parent = <0x01>;
			interrupts = <0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04 0x01 0x7e 0x04>;
			interrupt-names = "gp", "gpmmu", "pp", "pp0", "ppmmu0", "pp1", "ppmmu1", "pp2", "ppmmu2", "pp3", "ppmmu3";
			clocks = <0x54 0x16 0x54 0x02>;
			clock-names = "core", "bus";
			assigned-clocks = <0x54 0x16 0x54 0x02>;
			assigned-clock-rates = <0x1dcd6500 0x8954400>;
			reset-names = "ao_g3d", "media_g3d";
			resets = <0x12 0x01 0x54 0x00>;
			phandle = <0xc0>;
		};

		funnel@f6401000 {
			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
			reg = <0x00 0xf6401000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x59>;
						phandle = <0x5b>;
					};
				};
			};

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x5a>;
						phandle = <0x62>;
					};
				};
			};
		};

		etf@f6402000 {
			compatible = "arm,coresight-tmc", "arm,primecell";
			reg = <0x00 0xf6402000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x5b>;
						phandle = <0x59>;
					};
				};
			};

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x5c>;
						phandle = <0x5d>;
					};
				};
			};
		};

		replicator {
			compatible = "arm,coresight-static-replicator";
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x5d>;
						phandle = <0x5c>;
					};
				};
			};

			out-ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x5e>;
						phandle = <0x60>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint {
						remote-endpoint = <0x5f>;
						phandle = <0x61>;
					};
				};
			};
		};

		etr@f6404000 {
			compatible = "arm,coresight-tmc", "arm,primecell";
			reg = <0x00 0xf6404000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x60>;
						phandle = <0x5e>;
					};
				};
			};
		};

		tpiu@f6405000 {
			compatible = "arm,coresight-tpiu", "arm,primecell";
			reg = <0x00 0xf6405000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";

			in-ports {

				port {

					endpoint {
						remote-endpoint = <0x61>;
						phandle = <0x5f>;
					};
				};
			};
		};

		funnel@f6501000 {
			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
			reg = <0x00 0xf6501000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x62>;
						phandle = <0x5a>;
					};
				};
			};

			in-ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x63>;
						phandle = <0x6b>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint {
						remote-endpoint = <0x64>;
						phandle = <0x6c>;
					};
				};

				port@2 {
					reg = <0x02>;

					endpoint {
						remote-endpoint = <0x65>;
						phandle = <0x6d>;
					};
				};

				port@3 {
					reg = <0x03>;

					endpoint {
						remote-endpoint = <0x66>;
						phandle = <0x6e>;
					};
				};

				port@4 {
					reg = <0x04>;

					endpoint {
						remote-endpoint = <0x67>;
						phandle = <0x6f>;
					};
				};

				port@5 {
					reg = <0x05>;

					endpoint {
						remote-endpoint = <0x68>;
						phandle = <0x70>;
					};
				};

				port@6 {
					reg = <0x06>;

					endpoint {
						remote-endpoint = <0x69>;
						phandle = <0x71>;
					};
				};

				port@7 {
					reg = <0x07>;

					endpoint {
						remote-endpoint = <0x6a>;
						phandle = <0x72>;
					};
				};
			};
		};

		etm@f659c000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf659c000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x02>;
			phandle = <0x73>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x6b>;
						phandle = <0x63>;
					};
				};
			};
		};

		etm@f659d000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf659d000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x03>;
			phandle = <0x74>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x6c>;
						phandle = <0x64>;
					};
				};
			};
		};

		etm@f659e000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf659e000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x04>;
			phandle = <0x75>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x6d>;
						phandle = <0x65>;
					};
				};
			};
		};

		etm@f659f000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf659f000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x05>;
			phandle = <0x76>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x6e>;
						phandle = <0x66>;
					};
				};
			};
		};

		etm@f65dc000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf65dc000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x06>;
			phandle = <0x77>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x6f>;
						phandle = <0x67>;
					};
				};
			};
		};

		etm@f65dd000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf65dd000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x07>;
			phandle = <0x78>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x70>;
						phandle = <0x68>;
					};
				};
			};
		};

		etm@f65de000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf65de000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x08>;
			phandle = <0x79>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x71>;
						phandle = <0x69>;
					};
				};
			};
		};

		etm@f65df000 {
			compatible = "arm,coresight-etm4x", "arm,primecell";
			reg = <0x00 0xf65df000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x09>;
			phandle = <0x7a>;

			out-ports {

				port {

					endpoint {
						remote-endpoint = <0x72>;
						phandle = <0x6a>;
					};
				};
			};
		};

		cti@f6403000 {
			compatible = "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf6403000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
		};

		cti@f6598000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf6598000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x02>;
			arm,cs-dev-assoc = <0x73>;
		};

		cti@f6599000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf6599000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x03>;
			arm,cs-dev-assoc = <0x74>;
		};

		cti@f659a000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf659a000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x04>;
			arm,cs-dev-assoc = <0x75>;
		};

		cti@f659b000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf659b000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x05>;
			arm,cs-dev-assoc = <0x76>;
		};

		cti@f65d8000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf65d8000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x06>;
			arm,cs-dev-assoc = <0x77>;
		};

		cti@f65d9000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf65d9000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x07>;
			arm,cs-dev-assoc = <0x78>;
		};

		cti@f65da000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf65da000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x08>;
			arm,cs-dev-assoc = <0x79>;
		};

		cti@f65db000 {
			compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
			reg = <0x00 0xf65db000 0x00 0x1000>;
			clocks = <0x58 0x00>;
			clock-names = "apb_pclk";
			cpu = <0x09>;
			arm,cs-dev-assoc = <0x7a>;
		};
	};

	aliases {
		serial0 = "/soc/serial@f8015000";
		serial1 = "/soc/serial@f7111000";
		serial2 = "/soc/serial@f7112000";
		serial3 = "/soc/serial@f7113000";
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00 0x00 0x00 0x5e00000 0x00 0x5f00000 0x00 0x1000 0x00 0x5f02000 0x00 0xefd000 0x00 0x6e00000 0x00 0x60f000 0x00 0x7410000 0x00 0x1aaf0000 0x00 0x22000000 0x00 0x1c000000>;
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		ramoops@21f00000 {
			compatible = "ramoops";
			reg = <0x00 0x21f00000 0x00 0x100000>;
			record-size = <0x20000>;
			console-size = <0x20000>;
			ftrace-size = <0x20000>;
		};

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x00 0x8000000>;
			linux,cma-default;
		};
	};

	reboot-mode-syscon@5f01000 {
		compatible = "syscon", "simple-mfd";
		reg = <0x00 0x5f01000 0x00 0x1000>;

		reboot-mode {
			compatible = "syscon-reboot-mode";
			offset = <0x00>;
			mode-normal = <0x77665501>;
			mode-bootloader = "wfU";
			mode-recovery = <0x77665502>;
		};
	};

	regulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "SYS_5V";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-boot-on;
		regulator-always-on;
		phandle = <0x7b>;
	};

	regulator@1 {
		compatible = "regulator-fixed";
		regulator-name = "VDD_3V3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-boot-on;
		regulator-always-on;
		vin-supply = <0x7b>;
		phandle = <0x4e>;
	};

	regulator@2 {
		compatible = "regulator-fixed";
		regulator-name = "5V_HUB";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-boot-on;
		gpio = <0x36 0x07 0x00>;
		regulator-always-on;
		vin-supply = <0x7b>;
		phandle = <0x39>;
	};

	wl1835-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <0x36 0x05 0x01>;
		clocks = <0x19>;
		clock-names = "ext_clock";
		post-power-on-delay-ms = <0x0a>;
		power-off-delay-us = <0x0a>;
		phandle = <0x4f>;
	};

	leds {
		compatible = "gpio-leds";

		user_led1 {
			label = "green:user1";
			gpios = <0x7c 0x00 0x00>;
			linux,default-trigger = "heartbeat";
		};

		user_led2 {
			label = "green:user2";
			gpios = <0x7c 0x01 0x00>;
			linux,default-trigger = "mmc0";
		};

		user_led3 {
			label = "green:user3";
			gpios = <0x7c 0x02 0x00>;
			linux,default-trigger = "mmc1";
		};

		user_led4 {
			label = "green:user4";
			gpios = <0x7c 0x03 0x00>;
			panic-indicator;
			linux,default-trigger = "none";
		};

		wlan_active_led {
			label = "yellow:wlan";
			gpios = <0x7d 0x05 0x00>;
			linux,default-trigger = "phy0tx";
			default-state = "off";
		};

		bt_active_led {
			label = "blue:bt";
			gpios = <0x7c 0x07 0x00>;
			linux,default-trigger = "hci0-power";
			default-state = "off";
		};
	};

	pmic@f8000000 {
		compatible = "hisilicon,hi655x-pmic";
		reg = <0x00 0xf8000000 0x00 0x1000>;
		#clock-cells = <0x00>;
		interrupt-controller;
		#interrupt-cells = <0x02>;
		pmic-gpios = <0x18 0x02 0x00>;
		phandle = <0x19>;

		regulators {

			LDO2 {
				regulator-name = "LDO2_2V8";
				regulator-min-microvolt = <0x2625a0>;
				regulator-max-microvolt = <0x30d400>;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc1>;
			};

			LDO7 {
				regulator-name = "LDO7_SDIO";
				regulator-min-microvolt = <0x1b7740>;
				regulator-max-microvolt = <0x325aa0>;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0x46>;
			};

			LDO10 {
				regulator-name = "LDO10_2V85";
				regulator-min-microvolt = <0x1b7740>;
				regulator-max-microvolt = <0x2dc6c0>;
				regulator-enable-ramp-delay = <0x168>;
				phandle = <0x47>;
			};

			LDO13 {
				regulator-name = "LDO13_1V8";
				regulator-min-microvolt = <0x186a00>;
				regulator-max-microvolt = <0x1dc130>;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc2>;
			};

			LDO14 {
				regulator-name = "LDO14_2V8";
				regulator-min-microvolt = <0x2625a0>;
				regulator-max-microvolt = <0x30d400>;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc3>;
			};

			LDO15 {
				regulator-name = "LDO15_1V8";
				regulator-min-microvolt = <0x186a00>;
				regulator-max-microvolt = <0x1dc130>;
				regulator-boot-on;
				regulator-always-on;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc4>;
			};

			LDO17 {
				regulator-name = "LDO17_2V5";
				regulator-min-microvolt = <0x2625a0>;
				regulator-max-microvolt = <0x30d400>;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc5>;
			};

			LDO19 {
				regulator-name = "LDO19_3V0";
				regulator-min-microvolt = <0x1b7740>;
				regulator-max-microvolt = <0x2dc6c0>;
				regulator-enable-ramp-delay = <0x168>;
				phandle = <0x3f>;
			};

			LDO21 {
				regulator-name = "LDO21_1V8";
				regulator-min-microvolt = <0x192d50>;
				regulator-max-microvolt = <0x1e8480>;
				regulator-always-on;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc6>;
			};

			LDO22 {
				regulator-name = "LDO22_1V2";
				regulator-min-microvolt = <0xdbba0>;
				regulator-max-microvolt = <0x124f80>;
				regulator-boot-on;
				regulator-always-on;
				regulator-enable-ramp-delay = <0x78>;
				phandle = <0xc7>;
			};
		};
	};

	firmware {

		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};

	sound_card {
		compatible = "audio-graph-card";
		dais = <0x7e>;
	};

	__symbols__ {
		CPU_SLEEP = "/cpus/idle-states/cpu-sleep";
		CLUSTER_SLEEP = "/cpus/idle-states/cluster-sleep";
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@1";
		cpu2 = "/cpus/cpu@2";
		cpu3 = "/cpus/cpu@3";
		cpu4 = "/cpus/cpu@100";
		cpu5 = "/cpus/cpu@101";
		cpu6 = "/cpus/cpu@102";
		cpu7 = "/cpus/cpu@103";
		CLUSTER0_L2 = "/cpus/l2-cache0";
		CLUSTER1_L2 = "/cpus/l2-cache1";
		cpu_opp_table = "/cpu_opp_table";
		gic = "/interrupt-controller@f6801000";
		sram = "/soc/sram@fff80000";
		ao_ctrl = "/soc/ao_ctrl@f7800000";
		sys_ctrl = "/soc/sys_ctrl@f7030000";
		media_ctrl = "/soc/media_ctrl@f4410000";
		pm_ctrl = "/soc/pm_ctrl@f7032000";
		acpu_sctrl = "/soc/acpu_sctrl@f6504000";
		medianoc_ade = "/soc/medianoc_ade@f4520000";
		stub_clock = "/soc/stub_clock";
		uart0 = "/soc/serial@f8015000";
		uart1 = "/soc/serial@f7111000";
		uart2 = "/soc/serial@f7112000";
		uart3 = "/soc/serial@f7113000";
		uart4 = "/soc/serial@f7114000";
		dma0 = "/soc/dma@f7370000";
		dual_timer0 = "/soc/timer@f8008000";
		rtc0 = "/soc/rtc@f8003000";
		rtc1 = "/soc/rtc@f8004000";
		pmx0 = "/soc/pinmux@f7010000";
		range = "/soc/pinmux@f7010000/gpio-range";
		boot_sel_pmx_func = "/soc/pinmux@f7010000/boot_sel_pmx_func";
		emmc_pmx_func = "/soc/pinmux@f7010000/emmc_pmx_func";
		sd_pmx_func = "/soc/pinmux@f7010000/sd_pmx_func";
		sd_pmx_idle = "/soc/pinmux@f7010000/sd_pmx_idle";
		sdio_pmx_func = "/soc/pinmux@f7010000/sdio_pmx_func";
		sdio_pmx_idle = "/soc/pinmux@f7010000/sdio_pmx_idle";
		isp_pmx_func = "/soc/pinmux@f7010000/isp_pmx_func";
		hkadc_ssi_pmx_func = "/soc/pinmux@f7010000/hkadc_ssi_pmx_func";
		codec_clk_pmx_func = "/soc/pinmux@f7010000/codec_clk_pmx_func";
		codec_pmx_func = "/soc/pinmux@f7010000/codec_pmx_func";
		fm_pmx_func = "/soc/pinmux@f7010000/fm_pmx_func";
		bt_pmx_func = "/soc/pinmux@f7010000/bt_pmx_func";
		pwm_in_pmx_func = "/soc/pinmux@f7010000/pwm_in_pmx_func";
		bl_pwm_pmx_func = "/soc/pinmux@f7010000/bl_pwm_pmx_func";
		uart0_pmx_func = "/soc/pinmux@f7010000/uart0_pmx_func";
		uart1_pmx_func = "/soc/pinmux@f7010000/uart1_pmx_func";
		uart2_pmx_func = "/soc/pinmux@f7010000/uart2_pmx_func";
		uart3_pmx_func = "/soc/pinmux@f7010000/uart3_pmx_func";
		uart4_pmx_func = "/soc/pinmux@f7010000/uart4_pmx_func";
		uart5_pmx_func = "/soc/pinmux@f7010000/uart5_pmx_func";
		i2c0_pmx_func = "/soc/pinmux@f7010000/i2c0_pmx_func";
		i2c1_pmx_func = "/soc/pinmux@f7010000/i2c1_pmx_func";
		i2c2_pmx_func = "/soc/pinmux@f7010000/i2c2_pmx_func";
		spi0_pmx_func = "/soc/pinmux@f7010000/spi0_pmx_func";
		pmx1 = "/soc/pinmux@f7010800";
		boot_sel_cfg_func = "/soc/pinmux@f7010800/boot_sel_cfg_func";
		hkadc_ssi_cfg_func = "/soc/pinmux@f7010800/hkadc_ssi_cfg_func";
		emmc_clk_cfg_func = "/soc/pinmux@f7010800/emmc_clk_cfg_func";
		emmc_cfg_func = "/soc/pinmux@f7010800/emmc_cfg_func";
		emmc_rst_cfg_func = "/soc/pinmux@f7010800/emmc_rst_cfg_func";
		sd_clk_cfg_func = "/soc/pinmux@f7010800/sd_clk_cfg_func";
		sd_clk_cfg_idle = "/soc/pinmux@f7010800/sd_clk_cfg_idle";
		sd_cfg_func = "/soc/pinmux@f7010800/sd_cfg_func";
		sd_cfg_idle = "/soc/pinmux@f7010800/sd_cfg_idle";
		sdio_clk_cfg_func = "/soc/pinmux@f7010800/sdio_clk_cfg_func";
		sdio_clk_cfg_idle = "/soc/pinmux@f7010800/sdio_clk_cfg_idle";
		sdio_cfg_func = "/soc/pinmux@f7010800/sdio_cfg_func";
		sdio_cfg_idle = "/soc/pinmux@f7010800/sdio_cfg_idle";
		isp_cfg_func1 = "/soc/pinmux@f7010800/isp_cfg_func1";
		isp_cfg_idle1 = "/soc/pinmux@f7010800/isp_cfg_idle1";
		isp_cfg_func2 = "/soc/pinmux@f7010800/isp_cfg_func2";
		codec_clk_cfg_func = "/soc/pinmux@f7010800/codec_clk_cfg_func";
		codec_clk_cfg_idle = "/soc/pinmux@f7010800/codec_clk_cfg_idle";
		codec_cfg_func1 = "/soc/pinmux@f7010800/codec_cfg_func1";
		codec_cfg_func2 = "/soc/pinmux@f7010800/codec_cfg_func2";
		codec_cfg_idle2 = "/soc/pinmux@f7010800/codec_cfg_idle2";
		fm_cfg_func = "/soc/pinmux@f7010800/fm_cfg_func";
		bt_cfg_func = "/soc/pinmux@f7010800/bt_cfg_func";
		bt_cfg_idle = "/soc/pinmux@f7010800/bt_cfg_idle";
		pwm_in_cfg_func = "/soc/pinmux@f7010800/pwm_in_cfg_func";
		bl_pwm_cfg_func = "/soc/pinmux@f7010800/bl_pwm_cfg_func";
		uart0_cfg_func1 = "/soc/pinmux@f7010800/uart0_cfg_func1";
		uart0_cfg_func2 = "/soc/pinmux@f7010800/uart0_cfg_func2";
		uart1_cfg_func1 = "/soc/pinmux@f7010800/uart1_cfg_func1";
		uart1_cfg_func2 = "/soc/pinmux@f7010800/uart1_cfg_func2";
		uart2_cfg_func = "/soc/pinmux@f7010800/uart2_cfg_func";
		uart3_cfg_func = "/soc/pinmux@f7010800/uart3_cfg_func";
		uart4_cfg_func = "/soc/pinmux@f7010800/uart4_cfg_func";
		uart5_cfg_func = "/soc/pinmux@f7010800/uart5_cfg_func";
		i2c0_cfg_func = "/soc/pinmux@f7010800/i2c0_cfg_func";
		i2c1_cfg_func = "/soc/pinmux@f7010800/i2c1_cfg_func";
		i2c2_cfg_func = "/soc/pinmux@f7010800/i2c2_cfg_func";
		spi0_cfg_func = "/soc/pinmux@f7010800/spi0_cfg_func";
		pmx2 = "/soc/pinmux@f8001800";
		rstout_n_cfg_func = "/soc/pinmux@f8001800/rstout_n_cfg_func";
		pmu_peri_en_cfg_func = "/soc/pinmux@f8001800/pmu_peri_en_cfg_func";
		sysclk0_en_cfg_func = "/soc/pinmux@f8001800/sysclk0_en_cfg_func";
		jtag_tdo_cfg_func = "/soc/pinmux@f8001800/jtag_tdo_cfg_func";
		rf_reset_cfg_func = "/soc/pinmux@f8001800/rf_reset_cfg_func";
		gpio0 = "/soc/gpio@f8011000";
		gpio1 = "/soc/gpio@f8012000";
		gpio2 = "/soc/gpio@f8013000";
		gpio3 = "/soc/gpio@f8014000";
		gpio4 = "/soc/gpio@f7020000";
		gpio5 = "/soc/gpio@f7021000";
		gpio6 = "/soc/gpio@f7022000";
		gpio7 = "/soc/gpio@f7023000";
		gpio8 = "/soc/gpio@f7024000";
		gpio9 = "/soc/gpio@f7025000";
		gpio10 = "/soc/gpio@f7026000";
		gpio11 = "/soc/gpio@f7027000";
		gpio12 = "/soc/gpio@f7028000";
		gpio13 = "/soc/gpio@f7029000";
		gpio14 = "/soc/gpio@f702a000";
		gpio15 = "/soc/gpio@f702b000";
		gpio16 = "/soc/gpio@f702c000";
		gpio17 = "/soc/gpio@f702d000";
		gpio18 = "/soc/gpio@f702e000";
		gpio19 = "/soc/gpio@f702f000";
		spi0 = "/soc/spi@f7106000";
		i2c0 = "/soc/i2c@f7100000";
		i2c1 = "/soc/i2c@f7101000";
		i2c2 = "/soc/i2c@f7102000";
		adv7533 = "/soc/i2c@f7102000/adv7533@39";
		adv7533_in = "/soc/i2c@f7102000/adv7533@39/ports/port@0/endpoint";
		codec_endpoint = "/soc/i2c@f7102000/adv7533@39/ports/port@2/endpoint";
		usb_phy = "/soc/usbphy";
		usb = "/soc/usb@f72c0000";
		mailbox = "/soc/mailbox@f7510000";
		dwmmc_0 = "/soc/dwmmc0@f723d000";
		dwmmc_1 = "/soc/dwmmc1@f723e000";
		dwmmc_2 = "/soc/dwmmc2@f723f000";
		wlcore = "/soc/dwmmc2@f723f000/wlcore@2";
		watchdog0 = "/soc/watchdog@f8005000";
		tsensor = "/soc/tsensor@0,f7030700";
		i2s0 = "/soc/i2s@f7118000";
		i2s0_port0 = "/soc/i2s@f7118000/ports/port@0";
		i2s0_cpu_endpoint = "/soc/i2s@f7118000/ports/port@0/endpoint";
		cls0 = "/soc/thermal-zones/cls0";
		threshold = "/soc/thermal-zones/cls0/trips/trip-point@0";
		target = "/soc/thermal-zones/cls0/trips/trip-point@1";
		ade = "/soc/ade@f4100000";
		ade_out = "/soc/ade@f4100000/port/endpoint";
		dsi = "/soc/dsi@f4107800";
		dsi_in = "/soc/dsi@f4107800/ports/port@0/endpoint";
		dsi_out0 = "/soc/dsi@f4107800/ports/port@1/endpoint@0";
		mali = "/soc/gpu@f4080000";
		soc_funnel_out = "/soc/funnel@f6401000/out-ports/port/endpoint";
		soc_funnel_in = "/soc/funnel@f6401000/in-ports/port/endpoint";
		etf_in = "/soc/etf@f6402000/in-ports/port/endpoint";
		etf_out = "/soc/etf@f6402000/out-ports/port/endpoint";
		replicator_in = "/soc/replicator/in-ports/port/endpoint";
		replicator_out0 = "/soc/replicator/out-ports/port@0/endpoint";
		replicator_out1 = "/soc/replicator/out-ports/port@1/endpoint";
		etr_in = "/soc/etr@f6404000/in-ports/port/endpoint";
		tpiu_in = "/soc/tpiu@f6405000/in-ports/port/endpoint";
		acpu_funnel_out = "/soc/funnel@f6501000/out-ports/port/endpoint";
		acpu_funnel_in0 = "/soc/funnel@f6501000/in-ports/port@0/endpoint";
		acpu_funnel_in1 = "/soc/funnel@f6501000/in-ports/port@1/endpoint";
		acpu_funnel_in2 = "/soc/funnel@f6501000/in-ports/port@2/endpoint";
		acpu_funnel_in3 = "/soc/funnel@f6501000/in-ports/port@3/endpoint";
		acpu_funnel_in4 = "/soc/funnel@f6501000/in-ports/port@4/endpoint";
		acpu_funnel_in5 = "/soc/funnel@f6501000/in-ports/port@5/endpoint";
		acpu_funnel_in6 = "/soc/funnel@f6501000/in-ports/port@6/endpoint";
		acpu_funnel_in7 = "/soc/funnel@f6501000/in-ports/port@7/endpoint";
		etm0 = "/soc/etm@f659c000";
		etm0_out = "/soc/etm@f659c000/out-ports/port/endpoint";
		etm1 = "/soc/etm@f659d000";
		etm1_out = "/soc/etm@f659d000/out-ports/port/endpoint";
		etm2 = "/soc/etm@f659e000";
		etm2_out = "/soc/etm@f659e000/out-ports/port/endpoint";
		etm3 = "/soc/etm@f659f000";
		etm3_out = "/soc/etm@f659f000/out-ports/port/endpoint";
		etm4 = "/soc/etm@f65dc000";
		etm4_out = "/soc/etm@f65dc000/out-ports/port/endpoint";
		etm5 = "/soc/etm@f65dd000";
		etm5_out = "/soc/etm@f65dd000/out-ports/port/endpoint";
		etm6 = "/soc/etm@f65de000";
		etm6_out = "/soc/etm@f65de000/out-ports/port/endpoint";
		etm7 = "/soc/etm@f65df000";
		etm7_out = "/soc/etm@f65df000/out-ports/port/endpoint";
		reg_sys_5v = "/regulator@0";
		reg_vdd_3v3 = "/regulator@1";
		reg_5v_hub = "/regulator@2";
		wl1835_pwrseq = "/wl1835-pwrseq";
		pmic = "/pmic@f8000000";
		ldo2 = "/pmic@f8000000/regulators/LDO2";
		ldo7 = "/pmic@f8000000/regulators/LDO7";
		ldo10 = "/pmic@f8000000/regulators/LDO10";
		ldo13 = "/pmic@f8000000/regulators/LDO13";
		ldo14 = "/pmic@f8000000/regulators/LDO14";
		ldo15 = "/pmic@f8000000/regulators/LDO15";
		ldo17 = "/pmic@f8000000/regulators/LDO17";
		ldo19 = "/pmic@f8000000/regulators/LDO19";
		ldo21 = "/pmic@f8000000/regulators/LDO21";
		ldo22 = "/pmic@f8000000/regulators/LDO22";
	};
};