250 lines
7.2 KiB
C
250 lines
7.2 KiB
C
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/****************************************************************************
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*
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* Copyright (c) 2014 - 2021 Samsung Electronics Co., Ltd. All rights reserved
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*
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****************************************************************************/
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/**
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* MIF Byte Stream (Implementation)
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*/
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/* Implements */
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#include "scsc_mx_impl.h"
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#include "mifstream.h"
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/* Uses */
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#include "mifintrbit.h"
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/* Public Functions */
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void mif_stream_config_serialise(struct mif_stream *stream, struct mxstreamconf *stream_conf)
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{
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stream_conf->read_bit_idx = stream->read_bit_idx;
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stream_conf->write_bit_idx = stream->write_bit_idx;
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cpacketbuffer_config_serialise(&stream->buffer, &stream_conf->buf_conf);
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}
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int mif_stream_init(struct mif_stream *stream, enum scsc_mif_abs_target target, enum MIF_STREAM_DIRECTION direction, uint32_t num_packets, uint32_t packet_size,
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struct scsc_mx *mx, enum MIF_STREAM_INTRBIT_TYPE intrbit, mifintrbit_handler tohost_irq_handler, void *data)
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{
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struct mifintrbit *intr;
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int r, r1, r2;
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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stream->buffer.target = target;
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#endif
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stream->mx = mx;
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r = cpacketbuffer_init(&stream->buffer, num_packets, packet_size, mx);
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if (r)
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return r;
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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/* Get the proper intr instance */
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if (target == SCSC_MIF_ABS_TARGET_WPAN)
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intr = scsc_mx_get_intrbit_wpan(mx);
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/* WLAN and Fleximac cores will use the WLAN instance */
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else
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intr = scsc_mx_get_intrbit(mx);
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stream->target = target;
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#else
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intr = scsc_mx_get_intrbit(mx);
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#endif
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r1 = mifintrbit_alloc_tohost(intr, tohost_irq_handler, data);
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if (r1 < 0) {
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cpacketbuffer_release(&stream->buffer);
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return r1;
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}
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/**
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* MIF interrupt bit 0 in both the to-wpan and to-wlan registers are reserved
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* for purpose of forcing panics from the MX Manager directly or via the
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* gdb monitor stacks.
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*
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* At stream initialization the gdb transport requests for the reserved bits
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* rather than dynamic allocation of interrupt bits.
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*
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* So if the interrupt bit type requested is Reserved, just Assign the pre-
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* reserved interrupt bits.
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*/
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if (intrbit == MIF_STREAM_INTRBIT_TYPE_RESERVED) {
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if (target == SCSC_MIF_ABS_TARGET_FXM_1)
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r2 = MIFINTRBIT_RESERVED_PANIC_WLAN;
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#ifdef CONFIG_SCSC_MX450_GDB_SUPPORT
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else if (target == SCSC_MIF_ABS_TARGET_FXM_2)
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r2 = MIFINTRBIT_RESERVED_PANIC_WLAN;
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#endif
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else
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r2 = MIFINTRBIT_RESERVED_PANIC_WLAN;
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} else
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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r2 = mifintrbit_alloc_fromhost(intr);
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#else
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r2 = mifintrbit_alloc_fromhost(intr, target);
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#endif
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if (r2 < 0) {
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cpacketbuffer_release(&stream->buffer);
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mifintrbit_free_tohost(intr, r1);
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return r2;
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}
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switch (direction) {
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case MIF_STREAM_DIRECTION_OUT:
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stream->read_bit_idx = r1;
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stream->write_bit_idx = r2;
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break;
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case MIF_STREAM_DIRECTION_IN:
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/* Default value for the shared memory region */
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memset(stream->buffer.buffer, 0xff, num_packets * packet_size);
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/* Commit */
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smp_wmb();
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stream->read_bit_idx = r2;
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stream->write_bit_idx = r1;
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break;
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default:
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cpacketbuffer_release(&stream->buffer);
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mifintrbit_free_tohost(intr, r1);
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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mifintrbit_free_fromhost(intr, r2);
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#else
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mifintrbit_free_fromhost(intr, r2, target);
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#endif
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return -EINVAL;
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}
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stream->direction = direction;
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stream->peer = (enum MIF_STREAM_PEER)target;
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return 0;
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}
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void mif_stream_release(struct mif_stream *stream)
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{
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struct mifintrbit *intr;
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if (!stream->mx)
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return;
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#if defined(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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if (stream->target == SCSC_MIF_ABS_TARGET_WPAN)
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intr = scsc_mx_get_intrbit_wpan(stream->mx);
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else
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intr = scsc_mx_get_intrbit(stream->mx);
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#else
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intr = scsc_mx_get_intrbit(stream->mx);
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#endif
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if (stream->direction == MIF_STREAM_DIRECTION_IN) {
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mifintrbit_free_tohost(intr, stream->write_bit_idx);
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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mifintrbit_free_fromhost(intr, stream->read_bit_idx);
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#else
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mifintrbit_free_fromhost(intr, stream->read_bit_idx, (enum scsc_mif_abs_target)stream->peer);
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#endif
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} else {
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mifintrbit_free_tohost(intr, stream->read_bit_idx);
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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mifintrbit_free_fromhost(intr, stream->write_bit_idx);
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#else
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mifintrbit_free_fromhost(intr, stream->write_bit_idx, (enum scsc_mif_abs_target)stream->peer);
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#endif
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}
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cpacketbuffer_release(&stream->buffer);
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stream->mx = NULL;
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}
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uint32_t mif_stream_read(struct mif_stream *stream, void *buf, uint32_t num_bytes)
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{
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struct scsc_mif_abs *mif_abs = scsc_mx_get_mif_abs(stream->mx);
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uint32_t num_bytes_read = cpacketbuffer_read(&stream->buffer, buf, num_bytes);
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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if (num_bytes_read > 0)
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mif_abs->irq_bit_set(mif_abs, stream->read_bit_idx, stream->target);
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#else
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if (num_bytes_read > 0)
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/* Signal that the read is finished to anyone interested */
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mif_abs->irq_bit_set(mif_abs, stream->read_bit_idx, (enum scsc_mif_abs_target)stream->peer);
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#endif
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return num_bytes_read;
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}
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const void *mif_stream_peek(struct mif_stream *stream, const void *current_packet)
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{
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return cpacketbuffer_peek(&stream->buffer, current_packet);
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}
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void mif_stream_peek_complete(struct mif_stream *stream, const void *packet)
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{
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struct scsc_mif_abs *mif_abs = scsc_mx_get_mif_abs(stream->mx);
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cpacketbuffer_peek_complete(&stream->buffer, packet);
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/* Signal that the read is finished to anyone interested */
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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mif_abs->irq_bit_set(mif_abs, stream->read_bit_idx, stream->target);
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#else
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mif_abs->irq_bit_set(mif_abs, stream->read_bit_idx, (enum scsc_mif_abs_target)stream->peer);
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#endif
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}
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bool mif_stream_write(struct mif_stream *stream, const void *buf, uint32_t num_bytes)
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{
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struct scsc_mif_abs *mif_abs = scsc_mx_get_mif_abs(stream->mx);
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if (!cpacketbuffer_write(&stream->buffer, buf, num_bytes))
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return false;
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/* Kick the assigned interrupt to let others know new data is available */
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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mif_abs->irq_bit_set(mif_abs, stream->write_bit_idx, stream->target);
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#else
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mif_abs->irq_bit_set(mif_abs, stream->write_bit_idx, (enum scsc_mif_abs_target)stream->peer);
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#endif
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return true;
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}
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bool mif_stream_write_gather(struct mif_stream *stream, const void **bufs, uint32_t *lengths, uint32_t num_bufs)
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{
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struct scsc_mif_abs *mif_abs = NULL;
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if (!stream->mx || !stream->buffer.mx)
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return false;
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mif_abs = scsc_mx_get_mif_abs(stream->mx);
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if (!cpacketbuffer_write_gather(&stream->buffer, bufs, lengths, num_bufs))
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return false;
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/* Kick the assigned interrupt to let others know new data is available */
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#if IS_ENABLED(CONFIG_SCSC_INDEPENDENT_SUBSYSTEM)
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mif_abs->irq_bit_set(mif_abs, stream->write_bit_idx, stream->target);
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#else
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mif_abs->irq_bit_set(mif_abs, stream->write_bit_idx, (enum scsc_mif_abs_target)stream->peer);
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#endif
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return true;
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}
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uint32_t mif_stream_block_size(struct mif_stream *stream)
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{
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return cpacketbuffer_packet_size(&stream->buffer);
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}
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uint8_t mif_stream_read_interrupt(struct mif_stream *stream)
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{
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return stream->read_bit_idx;
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}
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uint8_t mif_stream_write_interrupt(struct mif_stream *stream)
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{
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return stream->write_bit_idx;
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}
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void mif_stream_log(const struct mif_stream *stream, enum scsc_log_level log_level)
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{
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cpacketbuffer_log(&stream->buffer, log_level);
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}
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