411 lines
9.5 KiB
C
411 lines
9.5 KiB
C
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/*
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* s2mc501_charger.h - Header of S2MC501 Charger Driver
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*
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* Copyright (C) 2019 Samsung Electronics Co.Ltd
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef S2MC501_DIRECT_CHARGER_H
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#define S2MC501_DIRECT_CHARGER_H
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#include "s2m_chg_manager.h"
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/* Test debug log enable */
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#define EN_TEST_READ 1
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#define MINVAL(a, b) ((a <= b) ? a : b)
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#define MASK(width, shift) (((0x1 << (width)) - 1) << shift)
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#define ENABLE 1
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#define DISABLE 0
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#define S2MC501_DC_CHIP_SET 0x00
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#define S2MC501_DC_INT0 0x01
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#define S2MC501_DC_INT1 0x02
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#define S2MC501_DC_INT2 0x03
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#define S2MC501_DC_INT0_MASK 0x04
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#define S2MC501_DC_INT1_MASK 0x05
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#define S2MC501_DC_INT2_MASK 0x06
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#define S2MC501_DC_STATUS0 0x07
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#define S2MC501_DC_STATUS1 0x08
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#define S2MC501_DC_STATUS2 0x09
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#define S2MC501_DC_ENABLE 0x10
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#define S2MC501_CD_OTP0 0x19
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#define S2MC501_DC_TIMER_SET 0x2A
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#define S2MC501_DC_OTP7 0x57
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#define S2MC501_DC_OTP8 0x58
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#define S2MC501_DC_CTRL0 0x5A
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#define S2MC501_DC_CTRL1 0x5B
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#define S2MC501_DC_CTRL2 0x5C
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#define S2MC501_ES_NO 0xF5
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#define FAKE_BAT_LEVEL 50
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/* DC_ENABLE 0x10 Reg */
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#define DC_EN_MASK 0x01
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#define SYSCLK_EN_MASK 0x40
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/* DC_OTP7 0x57 Reg */
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#define DC_ENB_CC 0x80
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#define DC_ENB_CV 0x40
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/* DC_OTP8 0x58 Reg */
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#define DC_OTP_RCP_DEB 0x01
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/* DC_CTRL0 0x5A Reg */
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#define DC_SET_CHGIN_ICHG_MASK 0x3F
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#define DC_SET_CHGIN_ICHG_SHIFT 0
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/* DC_CTRL1 0x0B Reg */
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#define SET_CV_MASK 0x7F
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#define SET_CV_SHIFT 0
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/* DC_CTRL2 0x5C Reg */
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#define DC_RCP_MASK 0x07
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#define DC_RCP_SHIFT 0
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#define DC_CV_4400mV 0xBE
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#define DC_CV_4800mV 0xE6
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/* IRQ */
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#define DC_INT0_IN2OUTFAIL 0x01
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#define DC_INT0_DCOUTFAIL 0x02
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#define DC_INT0_CLSHORT 0x04
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#define DC_INT0_PLUGOUT 0x08
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#define DC_INT0_IN2OUTOVP 0x10
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#define DC_INT0_FC_P_UVLO 0x20
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#define DC_INT0_VOUTOVP 0x40
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#define DC_INT0_TSD 0x80
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#define DC_INT1_CHARGING 0x01
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//#define DC_INT1_BOOSTING 0x02
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#define DC_INT1_CFLYSHORT 0x04
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#define DC_INT1_DCINOVP 0x08
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#define DC_INT1_INPUTOCP 0x20
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#define DC_INT1_DET_REGULATION 0x40
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#define DC_INT2_RCP 0x01
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#define DC_INT2_CLSHORT 0x04
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#define DC_INT2_CFLY_OVP 0x08
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enum {
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DC_RCP_100mA = 0,
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DC_RCP_1000mA,
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DC_RCP_1500mA,
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DC_RCP_2000mA,
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DC_RCP_2500mA,
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DC_RCP_3000mA,
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DC_RCP_3500mA,
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DC_RCP_4000mA,
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};
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typedef enum {
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DC_STATE_OFF = 0,
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DC_STATE_CHECK_VBAT,
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DC_STATE_PRESET,
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DC_STATE_START_CC,
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DC_STATE_CC,
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DC_STATE_SLEEP_CC,
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DC_STATE_ADJUSTED_CC,
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DC_STATE_CV,
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DC_STATE_WAKEUP_CC,
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DC_STATE_DONE,
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DC_STATE_MAX_NUM,
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} s2mc501_dc_state_t;
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typedef enum {
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DC_TRANS_INVALID = 0,
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DC_TRANS_CHG_ENABLED,
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DC_TRANS_NO_COND,
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DC_TRANS_VBATT_RETRY,
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DC_TRANS_WAKEUP_DONE,
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DC_TRANS_RAMPUP,
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DC_TRANS_RAMPUP_FINISHED,
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DC_TRANS_BATTERY_OK,
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DC_TRANS_BATTERY_NG,
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DC_TRANS_CHGIN_OKB_INT,
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DC_TRANS_BAT_OKB_INT,
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DC_TRANS_NORMAL_CHG_INT,
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DC_TRANS_DC_DONE_INT,
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DC_TRANS_CC_STABLED,
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DC_TRANS_CC_WAKEUP,
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DC_TRANS_DETACH,
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DC_TRANS_FAIL_INT,
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DC_TRANS_FLOAT_VBATT,
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DC_TRANS_RAMPUP_OVER_VBATT,
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DC_TRANS_RAMPUP_OVER_CURRENT,
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DC_TRANS_SET_CURRENT_MAX,
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DC_TRANS_TOP_OFF_CURRENT,
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DC_TRANS_DC_OFF_INT,
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DC_TRANS_MAX_NUM,
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} s2mc501_dc_trans_t;
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typedef enum {
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S2MC501_DC_DISABLE = 0,
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S2MC501_DC_EN
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} s2mc501_dc_ctrl_t;
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typedef enum {
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S2MC501_DC_PPS_SIGNAL_DEC = 0,
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S2MC501_DC_PPS_SIGNAL_INC
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} s2mc501_dc_pps_signal_t;
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enum {
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TA_PWR_TYPE_25W = 0,
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TA_PWR_TYPE_45W,
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};
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typedef enum {
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S2MC501_DC_MODE_TA_CC = 0,
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S2MC501_DC_MODE_DC_CC
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} s2mc501_dc_cc_mode;
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typedef enum {
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S2MC501_DC_SC_STATUS_OFF,
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S2MC501_DC_SC_STATUS_CHARGE,
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S2MC501_DC_SC_STATUS_DUAL_BUCK
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} s2mc501_dc_sc_status_t;
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typedef enum {
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PMETER_ID_VDCIN = 0,
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PMETER_ID_VOUT,
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PMETER_ID_VCELL,
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PMETER_ID_IIN,
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PMETER_ID_IINREV,
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PMETER_ID_TDIE,
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PMETER_ID_MAX_NUM,
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} s2mc501_pmeter_id_t;
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enum s2mc501_irq {
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S2MC501_PM_ADC_INT1_TDIE,
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S2MC501_PM_ADC_INT1_IINREV,
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S2MC501_PM_ADC_INT1_IIN,
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S2MC501_PM_ADC_INT1_VCELL,
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S2MC501_PM_ADC_INT1_VOUT,
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S2MC501_PM_ADC_INT1_VDCIN,
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};
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#define SC_CHARGING_ENABLE_CHECK_VBAT 5
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#define DC_TA_MIN_PPS_CURRENT 1000
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#define DC_TA_START_PPS_CURR_45W 2000
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#define DC_TA_START_PPS_CURR_25W 1000
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#define DC_MIN_VBAT 3700
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#define DC_TA_CURR_STEP_MA 50
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#define DC_TA_VOL_STEP_MV 20
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#define DC_MAX_SOC 95
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#define DC_MAX_SHIFTING_CNT 60
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#define DC_TOPOFF_CURRENT_MA 1000
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#define DC_TA_VOL_END_MV 9000
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#define DC_MAX_INPUT_CURRENT_MA 12000
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#define CONV_STR(x, r) { case x: r = #x; break; }
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ssize_t s2mc501_dc_show_attrs(struct device *dev,
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struct device_attribute *attr, char *buf);
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ssize_t s2mc501_dc_store_attrs(struct device *dev,
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struct device_attribute *attr, const char *buf, size_t count);
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#define S2MC501_DIRECT_CHARGER_ATTR(_name) \
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{ \
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.attr = {.name = #_name, .mode = 0664}, \
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.show = s2mc501_dc_show_attrs, \
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.store = s2mc501_dc_store_attrs, \
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}
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typedef struct s2mc501_dc_platform_data {
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char *dc_name;
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char *pm_name;
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char *fg_name;
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char *sc_name;
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char *sec_dc_name;
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char *top_name;
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int irq_gpio;
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int enable_gpio;
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int input_current_limit;
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int charging_current;
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int topoff_current;
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int sense_resistance;
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int recharge_vcell;
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int chg_switching_freq;
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int temperature_source; /* 0 : chip junction, 1 : external ntc for FG */
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} s2mc501_dc_platform_data_t;
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typedef struct s2mc501_dc_pd_data {
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unsigned int pdo_pos;
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unsigned int taMaxVol;
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unsigned int taMaxCur;
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unsigned int taMaxPwr;
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} s2mc501_dc_pd_data_t;
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typedef struct s2mc501_dc_prop {
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int prop;
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union power_supply_propval value;
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} s2mc501_dc_prop_t;
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struct s2mc501_dc_data {
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struct i2c_client *i2c;
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struct i2c_client *i2c_common;
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struct device *dev;
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struct s2mc501_platform_data *s2mc501_pdata;
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struct power_supply *psy_fg;
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struct power_supply *psy_sc;
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struct power_supply *psy_sec_dc;
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struct delayed_work timer_wqueue;
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struct delayed_work check_vbat_wqueue;
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struct delayed_work start_cc_wqueue;
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struct delayed_work state_manager_wqueue;
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struct delayed_work set_prop_wqueue;
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struct delayed_work dc_monitor_work;
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struct delayed_work chk_valid_wqueue;
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struct delayed_work update_wqueue;
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struct delayed_work isr_work;
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/* step check monitor */
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struct delayed_work step_monitor_work;
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struct workqueue_struct *step_monitor_wqueue;
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struct wakeup_source *dc_mon_ws;
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struct alarm dc_monitor_alarm;
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unsigned int alarm_interval;
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int step_now;
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struct power_supply *psy_dc;
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struct power_supply_desc psy_dc_desc;
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s2mc501_dc_platform_data_t *pdata;
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s2mc501_dc_prop_t prop_data;
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int rev_id;
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int cable_type;
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bool is_charging;
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bool is_plugout_mask;
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int ta_pwr_type;
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struct mutex dc_mutex;
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struct mutex irq_lock;
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struct mutex i2c_lock;
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struct mutex timer_mutex;
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struct mutex dc_state_mutex;
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struct mutex pps_isr_mutex;
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struct mutex trans_mutex;
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struct mutex dc_mon_mutex;
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struct mutex auto_pps_mutex;
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struct mutex mode_mutex;
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struct wakeup_source *ws;
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struct wakeup_source *state_manager_ws;
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struct wakeup_source *mode_irq_ws;
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struct wakeup_source *fail_irq_ws;
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struct wakeup_source *thermal_irq_ws;
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s2mc501_dc_state_t dc_state;
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s2mc501_dc_trans_t dc_trans;
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void (*dc_state_fp[DC_STATE_MAX_NUM])(void *);
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s2mc501_dc_pd_data_t *pd_data;
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s2mc501_dc_sc_status_t dc_sc_status;
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struct power_supply *psy_pmeter;
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int pmeter[PMETER_ID_MAX_NUM];
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struct power_supply *psy_top;
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unsigned int targetIIN;
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unsigned int adjustIIN;
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unsigned int minIIN;
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unsigned int chgIIN;
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unsigned int ppsVol;
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unsigned int floatVol;
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unsigned int step_vbatt_mv;
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unsigned int step_iin_ma;
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int vchgin_okb_retry;
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unsigned int cc_count;
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unsigned int step_cv_cnt;
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unsigned int chk_vbat_margin;
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unsigned int chk_vbat_charged;
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unsigned int chk_vbat_prev;
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unsigned int chk_iin_prev;
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wait_queue_head_t wait;
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bool is_pps_ready;
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bool is_rampup_adjusted;
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bool is_autopps_disabled;
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int rise_speed_dly_ms;
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int dc_chg_status;
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int ps_health;
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int irq_gpio;
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/* DC_INT_0 */
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int irq_ramp_fail;
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int irq_normal_charging;
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int irq_wcin_okb;
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int irq_vchgin_okb;
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int irq_byp2out_ovp;
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int irq_byp_ovp;
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||
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int irq_vbat_okb;
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||
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int irq_out_ovp;
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||
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||
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/* DC_INT_1 */
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||
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/* [7] rsvd */
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||
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|
int irq_ocp;
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||
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|
int irq_wcin_rcp;
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||
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|
int irq_chgin_rcp;
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||
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|
int irq_off;
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||
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|
int irq_plug_out;
|
||
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|
int irq_wcin_diod_prot;
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||
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|
int irq_chgin_diod_prot;
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||
|
|
|
||
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|
/* DC_INT_2 */
|
||
|
|
int irq_done;
|
||
|
|
int irq_pps_fail;
|
||
|
|
int irq_long_cc;
|
||
|
|
int irq_thermal;
|
||
|
|
int irq_scp;
|
||
|
|
int irq_cv;
|
||
|
|
int irq_wcin_icl;
|
||
|
|
int irq_chgin_icl;
|
||
|
|
|
||
|
|
/* DC_INT_3 */
|
||
|
|
/* [7] rsvd */
|
||
|
|
int irq_sc_off;
|
||
|
|
int irq_pm_off;
|
||
|
|
int irq_wcin_up;
|
||
|
|
int irq_wcin_down;
|
||
|
|
int irq_tsd;
|
||
|
|
|
||
|
|
/* [1] rsvd */
|
||
|
|
int irq_tfb;
|
||
|
|
|
||
|
|
long mon_chk_time;
|
||
|
|
};
|
||
|
|
|
||
|
|
extern int sec_pd_get_apdo_max_power(unsigned int *pdo_pos, unsigned int *taMaxVol, unsigned int *taMaxCur, unsigned int *taMaxPwr);
|
||
|
|
extern int sec_pd_select_pps(int num, int ppsVol, int ppsCur);
|
||
|
|
extern int sec_pps_enable(int num, int ppsVol, int ppsCur, int enable);
|
||
|
|
extern int sec_get_pps_voltage(void);
|
||
|
|
extern int s2mc501_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
|
||
|
|
extern int s2mc501_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
|
||
|
|
extern int s2mc501_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
|
||
|
|
|
||
|
|
#endif /*S2MC501_CHARGER_H*/
|