1892 lines
45 KiB
Text
1892 lines
45 KiB
Text
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/dts-v1/;
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/ {
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interrupt-parent = <0x01>;
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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model = "Amarula A64-Relic";
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compatible = "amarula,a64-relic\0allwinner,sun50i-a64";
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chosen {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges;
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stdout-path = "serial0:115200n8";
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framebuffer-lcd {
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compatible = "allwinner,simple-framebuffer\0simple-framebuffer";
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allwinner,pipeline = "mixer0-lcd0";
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clocks = <0x02 0x64 0x03 0x06>;
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status = "disabled";
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phandle = <0x49>;
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};
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framebuffer-hdmi {
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compatible = "allwinner,simple-framebuffer\0simple-framebuffer";
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allwinner,pipeline = "mixer1-lcd1-hdmi";
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clocks = <0x03 0x07 0x02 0x65 0x02 0x6e>;
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status = "disabled";
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phandle = <0x4a>;
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};
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};
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cpus {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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cpu@0 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x00>;
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enable-method = "psci";
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next-level-cache = <0x04>;
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clocks = <0x02 0x15>;
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clock-names = "cpu";
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#cooling-cells = <0x02>;
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operating-points-v2 = <0x05>;
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cpu-supply = <0x06>;
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phandle = <0x09>;
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};
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cpu@1 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x01>;
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enable-method = "psci";
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next-level-cache = <0x04>;
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clocks = <0x02 0x15>;
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clock-names = "cpu";
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#cooling-cells = <0x02>;
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operating-points-v2 = <0x05>;
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cpu-supply = <0x06>;
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phandle = <0x0a>;
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};
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cpu@2 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x02>;
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enable-method = "psci";
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next-level-cache = <0x04>;
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clocks = <0x02 0x15>;
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clock-names = "cpu";
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#cooling-cells = <0x02>;
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operating-points-v2 = <0x05>;
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cpu-supply = <0x06>;
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phandle = <0x0b>;
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};
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cpu@3 {
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compatible = "arm,cortex-a53";
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device_type = "cpu";
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reg = <0x03>;
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enable-method = "psci";
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next-level-cache = <0x04>;
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clocks = <0x02 0x15>;
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clock-names = "cpu";
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#cooling-cells = <0x02>;
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operating-points-v2 = <0x05>;
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cpu-supply = <0x06>;
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phandle = <0x0c>;
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};
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l2-cache {
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compatible = "cache";
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cache-level = <0x02>;
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phandle = <0x04>;
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};
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};
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display-engine {
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compatible = "allwinner,sun50i-a64-display-engine";
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allwinner,pipelines = <0x07 0x08>;
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status = "disabled";
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phandle = <0x4b>;
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};
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osc24M_clk {
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#clock-cells = <0x00>;
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compatible = "fixed-clock";
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clock-frequency = <0x16e3600>;
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clock-output-names = "osc24M";
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phandle = <0x29>;
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};
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osc32k_clk {
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#clock-cells = <0x00>;
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compatible = "fixed-clock";
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clock-frequency = <0x8000>;
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clock-output-names = "ext-osc32k";
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phandle = <0x3e>;
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};
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pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04>;
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interrupt-affinity = <0x09 0x0a 0x0b 0x0c>;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "sun50i-a64-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <0x0d>;
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simple-audio-card,bitclock-master = <0x0d>;
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simple-audio-card,mclk-fs = <0x80>;
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simple-audio-card,aux-devs = <0x0e>;
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simple-audio-card,routing = "Left DAC\0DACL\0Right DAC\0DACR\0ADCL\0Left ADC\0ADCR\0Right ADC";
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status = "disabled";
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phandle = <0x4c>;
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simple-audio-card,cpu {
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sound-dai = <0x0f>;
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phandle = <0x0d>;
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};
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simple-audio-card,codec {
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sound-dai = <0x10>;
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phandle = <0x4d>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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allwinner,erratum-unknown1;
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arm,no-tick-in-suspend;
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interrupts = <0x01 0x0d 0xf04 0x01 0x0e 0xf04 0x01 0x0b 0xf04 0x01 0x0a 0xf04>;
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};
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thermal-zones {
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cpu0-thermal {
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polling-delay-passive = <0x00>;
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polling-delay = <0x00>;
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thermal-sensors = <0x11 0x00>;
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phandle = <0x4e>;
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cooling-maps {
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map0 {
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trip = <0x12>;
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cooling-device = <0x09 0xffffffff 0xffffffff 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff>;
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};
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map1 {
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trip = <0x13>;
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cooling-device = <0x09 0xffffffff 0xffffffff 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff 0x0c 0xffffffff 0xffffffff>;
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};
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};
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trips {
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cpu_alert0 {
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temperature = <0x124f8>;
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hysteresis = <0x7d0>;
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type = "passive";
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phandle = <0x12>;
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};
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cpu_alert1 {
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temperature = <0x15f90>;
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hysteresis = <0x7d0>;
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type = "hot";
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phandle = <0x13>;
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};
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cpu_crit {
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temperature = <0x1adb0>;
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hysteresis = <0x7d0>;
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type = "critical";
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phandle = <0x4f>;
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};
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};
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};
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gpu0-thermal {
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polling-delay-passive = <0x00>;
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polling-delay = <0x00>;
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thermal-sensors = <0x11 0x01>;
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phandle = <0x50>;
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};
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gpu1-thermal {
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polling-delay-passive = <0x00>;
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polling-delay = <0x00>;
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thermal-sensors = <0x11 0x02>;
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phandle = <0x51>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges;
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bus@1000000 {
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compatible = "allwinner,sun50i-a64-de2";
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reg = <0x1000000 0x400000>;
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allwinner,sram = <0x14 0x01>;
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges = <0x00 0x1000000 0x400000>;
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clock@0 {
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compatible = "allwinner,sun50i-a64-de2-clk";
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reg = <0x00 0x10000>;
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clocks = <0x02 0x34 0x02 0x63>;
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clock-names = "bus\0mod";
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resets = <0x02 0x1e>;
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#clock-cells = <0x01>;
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#reset-cells = <0x01>;
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phandle = <0x03>;
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};
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rotate@20000 {
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compatible = "allwinner,sun50i-a64-de2-rotate\0allwinner,sun8i-a83t-de2-rotate";
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reg = <0x20000 0x10000>;
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interrupts = <0x00 0x60 0x04>;
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clocks = <0x03 0x09 0x03 0x0a>;
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clock-names = "bus\0mod";
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resets = <0x03 0x03>;
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phandle = <0x52>;
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};
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mixer@100000 {
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compatible = "allwinner,sun50i-a64-de2-mixer-0";
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reg = <0x100000 0x100000>;
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clocks = <0x03 0x00 0x03 0x06>;
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clock-names = "bus\0mod";
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resets = <0x03 0x00>;
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phandle = <0x07>;
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ports {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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port@1 {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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reg = <0x01>;
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phandle = <0x53>;
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endpoint@0 {
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reg = <0x00>;
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remote-endpoint = <0x15>;
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phandle = <0x19>;
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};
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endpoint@1 {
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reg = <0x01>;
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remote-endpoint = <0x16>;
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phandle = <0x1c>;
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};
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};
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};
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};
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mixer@200000 {
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compatible = "allwinner,sun50i-a64-de2-mixer-1";
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reg = <0x200000 0x100000>;
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clocks = <0x03 0x01 0x03 0x07>;
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clock-names = "bus\0mod";
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resets = <0x03 0x01>;
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phandle = <0x08>;
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ports {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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port@1 {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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reg = <0x01>;
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phandle = <0x54>;
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endpoint@0 {
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reg = <0x00>;
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remote-endpoint = <0x17>;
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phandle = <0x1a>;
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};
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endpoint@1 {
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reg = <0x01>;
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remote-endpoint = <0x18>;
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phandle = <0x1d>;
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};
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};
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};
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};
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};
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syscon@1c00000 {
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compatible = "allwinner,sun50i-a64-system-control";
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reg = <0x1c00000 0x1000>;
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges;
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phandle = <0x35>;
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sram@18000 {
|
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compatible = "mmio-sram";
|
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reg = <0x18000 0x28000>;
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges = <0x00 0x18000 0x28000>;
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phandle = <0x55>;
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sram-section@0 {
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compatible = "allwinner,sun50i-a64-sram-c";
|
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reg = <0x00 0x28000>;
|
||
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phandle = <0x14>;
|
||
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};
|
||
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};
|
||
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||
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sram@1d00000 {
|
||
|
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compatible = "mmio-sram";
|
||
|
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reg = <0x1d00000 0x40000>;
|
||
|
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#address-cells = <0x01>;
|
||
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#size-cells = <0x01>;
|
||
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ranges = <0x00 0x1d00000 0x40000>;
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||
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phandle = <0x56>;
|
||
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sram-section@0 {
|
||
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compatible = "allwinner,sun50i-a64-sram-c1\0allwinner,sun4i-a10-sram-c1";
|
||
|
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reg = <0x00 0x40000>;
|
||
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phandle = <0x1f>;
|
||
|
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};
|
||
|
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};
|
||
|
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};
|
||
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|
||
|
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dma-controller@1c02000 {
|
||
|
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compatible = "allwinner,sun50i-a64-dma";
|
||
|
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reg = <0x1c02000 0x1000>;
|
||
|
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interrupts = <0x00 0x32 0x04>;
|
||
|
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clocks = <0x02 0x1e>;
|
||
|
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dma-channels = <0x08>;
|
||
|
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dma-requests = <0x1b>;
|
||
|
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resets = <0x02 0x07>;
|
||
|
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#dma-cells = <0x01>;
|
||
|
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phandle = <0x2b>;
|
||
|
|
};
|
||
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|
||
|
|
lcd-controller@1c0c000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-tcon-lcd\0allwinner,sun8i-a83t-tcon-lcd";
|
||
|
|
reg = <0x1c0c000 0x1000>;
|
||
|
|
interrupts = <0x00 0x56 0x04>;
|
||
|
|
clocks = <0x02 0x2f 0x02 0x64>;
|
||
|
|
clock-names = "ahb\0tcon-ch0";
|
||
|
|
clock-output-names = "tcon-pixel-clock";
|
||
|
|
#clock-cells = <0x00>;
|
||
|
|
resets = <0x02 0x18 0x02 0x23>;
|
||
|
|
reset-names = "lcd\0lvds";
|
||
|
|
phandle = <0x57>;
|
||
|
|
|
||
|
|
ports {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
reg = <0x00>;
|
||
|
|
phandle = <0x58>;
|
||
|
|
|
||
|
|
endpoint@0 {
|
||
|
|
reg = <0x00>;
|
||
|
|
remote-endpoint = <0x19>;
|
||
|
|
phandle = <0x15>;
|
||
|
|
};
|
||
|
|
|
||
|
|
endpoint@1 {
|
||
|
|
reg = <0x01>;
|
||
|
|
remote-endpoint = <0x1a>;
|
||
|
|
phandle = <0x17>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
reg = <0x01>;
|
||
|
|
phandle = <0x59>;
|
||
|
|
|
||
|
|
endpoint@1 {
|
||
|
|
reg = <0x01>;
|
||
|
|
remote-endpoint = <0x1b>;
|
||
|
|
allwinner,tcon-channel = <0x01>;
|
||
|
|
phandle = <0x3a>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
lcd-controller@1c0d000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-tcon-tv\0allwinner,sun8i-a83t-tcon-tv";
|
||
|
|
reg = <0x1c0d000 0x1000>;
|
||
|
|
interrupts = <0x00 0x57 0x04>;
|
||
|
|
clocks = <0x02 0x30 0x02 0x65>;
|
||
|
|
clock-names = "ahb\0tcon-ch1";
|
||
|
|
resets = <0x02 0x19>;
|
||
|
|
reset-names = "lcd";
|
||
|
|
phandle = <0x5a>;
|
||
|
|
|
||
|
|
ports {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
reg = <0x00>;
|
||
|
|
phandle = <0x5b>;
|
||
|
|
|
||
|
|
endpoint@0 {
|
||
|
|
reg = <0x00>;
|
||
|
|
remote-endpoint = <0x1c>;
|
||
|
|
phandle = <0x16>;
|
||
|
|
};
|
||
|
|
|
||
|
|
endpoint@1 {
|
||
|
|
reg = <0x01>;
|
||
|
|
remote-endpoint = <0x1d>;
|
||
|
|
phandle = <0x18>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
reg = <0x01>;
|
||
|
|
phandle = <0x5c>;
|
||
|
|
|
||
|
|
endpoint@1 {
|
||
|
|
reg = <0x01>;
|
||
|
|
remote-endpoint = <0x1e>;
|
||
|
|
phandle = <0x3d>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
video-codec@1c0e000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-video-engine";
|
||
|
|
reg = <0x1c0e000 0x1000>;
|
||
|
|
clocks = <0x02 0x2e 0x02 0x6a 0x02 0x5f>;
|
||
|
|
clock-names = "ahb\0mod\0ram";
|
||
|
|
resets = <0x02 0x17>;
|
||
|
|
interrupts = <0x00 0x3a 0x04>;
|
||
|
|
allwinner,sram = <0x1f 0x01>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc@1c0f000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-mmc";
|
||
|
|
reg = <0x1c0f000 0x1000>;
|
||
|
|
clocks = <0x02 0x1f 0x02 0x4b>;
|
||
|
|
clock-names = "ahb\0mmc";
|
||
|
|
resets = <0x02 0x08>;
|
||
|
|
reset-names = "ahb";
|
||
|
|
interrupts = <0x00 0x3c 0x04>;
|
||
|
|
max-frequency = <0x8f0d180>;
|
||
|
|
status = "disabled";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x5d>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc@1c10000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-mmc";
|
||
|
|
reg = <0x1c10000 0x1000>;
|
||
|
|
clocks = <0x02 0x20 0x02 0x4c>;
|
||
|
|
clock-names = "ahb\0mmc";
|
||
|
|
resets = <0x02 0x09>;
|
||
|
|
reset-names = "ahb";
|
||
|
|
interrupts = <0x00 0x3d 0x04>;
|
||
|
|
max-frequency = <0x8f0d180>;
|
||
|
|
status = "okay";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x20>;
|
||
|
|
vmmc-supply = <0x21>;
|
||
|
|
vqmmc-supply = <0x22>;
|
||
|
|
mmc-pwrseq = <0x23>;
|
||
|
|
bus-width = <0x04>;
|
||
|
|
non-removable;
|
||
|
|
phandle = <0x5e>;
|
||
|
|
|
||
|
|
wifi@1 {
|
||
|
|
reg = <0x01>;
|
||
|
|
compatible = "brcm,bcm4329-fmac";
|
||
|
|
interrupt-parent = <0x24>;
|
||
|
|
interrupts = <0x00 0x03 0x08>;
|
||
|
|
interrupt-names = "host-wake";
|
||
|
|
phandle = <0x5f>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc@1c11000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-emmc";
|
||
|
|
reg = <0x1c11000 0x1000>;
|
||
|
|
clocks = <0x02 0x21 0x02 0x4d>;
|
||
|
|
clock-names = "ahb\0mmc";
|
||
|
|
resets = <0x02 0x0a>;
|
||
|
|
reset-names = "ahb";
|
||
|
|
interrupts = <0x00 0x3e 0x04>;
|
||
|
|
max-frequency = <0x8f0d180>;
|
||
|
|
status = "okay";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x25>;
|
||
|
|
vmmc-supply = <0x21>;
|
||
|
|
bus-width = <0x08>;
|
||
|
|
non-removable;
|
||
|
|
cap-mmc-hw-reset;
|
||
|
|
phandle = <0x60>;
|
||
|
|
};
|
||
|
|
|
||
|
|
eeprom@1c14000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-sid";
|
||
|
|
reg = <0x1c14000 0x400>;
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x01>;
|
||
|
|
phandle = <0x61>;
|
||
|
|
|
||
|
|
thermal-sensor-calibration@34 {
|
||
|
|
reg = <0x34 0x08>;
|
||
|
|
phandle = <0x2d>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
crypto@1c15000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-crypto";
|
||
|
|
reg = <0x1c15000 0x1000>;
|
||
|
|
interrupts = <0x00 0x5e 0x04>;
|
||
|
|
clocks = <0x02 0x1d 0x02 0x4f>;
|
||
|
|
clock-names = "bus\0mod";
|
||
|
|
resets = <0x02 0x06>;
|
||
|
|
phandle = <0x62>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mailbox@1c17000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-msgbox\0allwinner,sun6i-a31-msgbox";
|
||
|
|
reg = <0x1c17000 0x1000>;
|
||
|
|
clocks = <0x02 0x36>;
|
||
|
|
resets = <0x02 0x20>;
|
||
|
|
interrupts = <0x00 0x31 0x04>;
|
||
|
|
#mbox-cells = <0x01>;
|
||
|
|
phandle = <0x63>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb@1c19000 {
|
||
|
|
compatible = "allwinner,sun8i-a33-musb";
|
||
|
|
reg = <0x1c19000 0x400>;
|
||
|
|
clocks = <0x02 0x29>;
|
||
|
|
resets = <0x02 0x12>;
|
||
|
|
interrupts = <0x00 0x47 0x04>;
|
||
|
|
interrupt-names = "mc";
|
||
|
|
phys = <0x26 0x00>;
|
||
|
|
phy-names = "usb";
|
||
|
|
extcon = <0x26 0x00>;
|
||
|
|
dr_mode = "otg";
|
||
|
|
status = "okay";
|
||
|
|
phandle = <0x64>;
|
||
|
|
};
|
||
|
|
|
||
|
|
phy@1c19400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-usb-phy";
|
||
|
|
reg = <0x1c19400 0x14 0x1c1a800 0x04 0x1c1b800 0x04>;
|
||
|
|
reg-names = "phy_ctrl\0pmu0\0pmu1";
|
||
|
|
clocks = <0x02 0x56 0x02 0x57>;
|
||
|
|
clock-names = "usb0_phy\0usb1_phy";
|
||
|
|
resets = <0x02 0x00 0x02 0x01>;
|
||
|
|
reset-names = "usb0_reset\0usb1_reset";
|
||
|
|
status = "okay";
|
||
|
|
#phy-cells = <0x01>;
|
||
|
|
usb0_id_det-gpios = <0x27 0x07 0x09 0x00>;
|
||
|
|
usb0_vbus-supply = <0x28>;
|
||
|
|
phandle = <0x26>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb@1c1a000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ehci\0generic-ehci";
|
||
|
|
reg = <0x1c1a000 0x100>;
|
||
|
|
interrupts = <0x00 0x48 0x04>;
|
||
|
|
clocks = <0x02 0x2c 0x02 0x2a 0x02 0x5b>;
|
||
|
|
resets = <0x02 0x15 0x02 0x13>;
|
||
|
|
phys = <0x26 0x00>;
|
||
|
|
phy-names = "usb";
|
||
|
|
status = "okay";
|
||
|
|
phandle = <0x65>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb@1c1a400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ohci\0generic-ohci";
|
||
|
|
reg = <0x1c1a400 0x100>;
|
||
|
|
interrupts = <0x00 0x49 0x04>;
|
||
|
|
clocks = <0x02 0x2c 0x02 0x5b>;
|
||
|
|
resets = <0x02 0x15>;
|
||
|
|
phys = <0x26 0x00>;
|
||
|
|
phy-names = "usb";
|
||
|
|
status = "okay";
|
||
|
|
phandle = <0x66>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb@1c1b000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ehci\0generic-ehci";
|
||
|
|
reg = <0x1c1b000 0x100>;
|
||
|
|
interrupts = <0x00 0x4a 0x04>;
|
||
|
|
clocks = <0x02 0x2d 0x02 0x2b 0x02 0x5d>;
|
||
|
|
resets = <0x02 0x16 0x02 0x14>;
|
||
|
|
phys = <0x26 0x01>;
|
||
|
|
phy-names = "usb";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x67>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb@1c1b400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ohci\0generic-ohci";
|
||
|
|
reg = <0x1c1b400 0x100>;
|
||
|
|
interrupts = <0x00 0x4b 0x04>;
|
||
|
|
clocks = <0x02 0x2d 0x02 0x5d>;
|
||
|
|
resets = <0x02 0x16>;
|
||
|
|
phys = <0x26 0x01>;
|
||
|
|
phy-names = "usb";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x68>;
|
||
|
|
};
|
||
|
|
|
||
|
|
clock@1c20000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ccu";
|
||
|
|
reg = <0x1c20000 0x400>;
|
||
|
|
clocks = <0x29 0x2a 0x00>;
|
||
|
|
clock-names = "hosc\0losc";
|
||
|
|
#clock-cells = <0x01>;
|
||
|
|
#reset-cells = <0x01>;
|
||
|
|
phandle = <0x02>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl@1c20800 {
|
||
|
|
compatible = "allwinner,sun50i-a64-pinctrl";
|
||
|
|
reg = <0x1c20800 0x400>;
|
||
|
|
interrupts = <0x00 0x0b 0x04 0x00 0x11 0x04 0x00 0x15 0x04>;
|
||
|
|
clocks = <0x02 0x3a 0x29 0x2a 0x00>;
|
||
|
|
clock-names = "apb\0hosc\0losc";
|
||
|
|
gpio-controller;
|
||
|
|
#gpio-cells = <0x03>;
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <0x03>;
|
||
|
|
phandle = <0x27>;
|
||
|
|
|
||
|
|
csi-pins {
|
||
|
|
pins = "PE0\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE10\0PE11";
|
||
|
|
function = "csi";
|
||
|
|
phandle = <0x37>;
|
||
|
|
};
|
||
|
|
|
||
|
|
csi-mclk-pin {
|
||
|
|
pins = "PE1";
|
||
|
|
function = "csi";
|
||
|
|
phandle = <0x44>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c0-pins {
|
||
|
|
pins = "PH0\0PH1";
|
||
|
|
function = "i2c0";
|
||
|
|
bias-pull-up;
|
||
|
|
phandle = <0x2f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c1-pins {
|
||
|
|
pins = "PH2\0PH3";
|
||
|
|
function = "i2c1";
|
||
|
|
phandle = <0x30>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c2-pins {
|
||
|
|
pins = "PE14\0PE15";
|
||
|
|
function = "i2c2";
|
||
|
|
phandle = <0x32>;
|
||
|
|
};
|
||
|
|
|
||
|
|
lcd-rgb666-pins {
|
||
|
|
pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21";
|
||
|
|
function = "lcd0";
|
||
|
|
phandle = <0x69>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc0-pins {
|
||
|
|
pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
|
||
|
|
function = "mmc0";
|
||
|
|
drive-strength = <0x1e>;
|
||
|
|
bias-pull-up;
|
||
|
|
phandle = <0x6a>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc1-pins {
|
||
|
|
pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5";
|
||
|
|
function = "mmc1";
|
||
|
|
drive-strength = <0x1e>;
|
||
|
|
bias-pull-up;
|
||
|
|
phandle = <0x20>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc2-pins {
|
||
|
|
pins = "PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC12\0PC13\0PC14\0PC15\0PC16";
|
||
|
|
function = "mmc2";
|
||
|
|
drive-strength = <0x1e>;
|
||
|
|
bias-pull-up;
|
||
|
|
phandle = <0x25>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc2-ds-pin {
|
||
|
|
pins = "PC1";
|
||
|
|
function = "mmc2";
|
||
|
|
drive-strength = <0x1e>;
|
||
|
|
bias-pull-up;
|
||
|
|
phandle = <0x6b>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pwm-pin {
|
||
|
|
pins = "PD22";
|
||
|
|
function = "pwm";
|
||
|
|
phandle = <0x36>;
|
||
|
|
};
|
||
|
|
|
||
|
|
rmii-pins {
|
||
|
|
pins = "PD10\0PD11\0PD13\0PD14\0PD17\0PD18\0PD19\0PD20\0PD22\0PD23";
|
||
|
|
function = "emac";
|
||
|
|
drive-strength = <0x28>;
|
||
|
|
phandle = <0x6c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
rgmii-pins {
|
||
|
|
pins = "PD8\0PD9\0PD10\0PD11\0PD12\0PD13\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21\0PD22\0PD23";
|
||
|
|
function = "emac";
|
||
|
|
drive-strength = <0x28>;
|
||
|
|
phandle = <0x6d>;
|
||
|
|
};
|
||
|
|
|
||
|
|
spdif-tx-pin {
|
||
|
|
pins = "PH8";
|
||
|
|
function = "spdif";
|
||
|
|
phandle = <0x2c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
spi0-pins {
|
||
|
|
pins = "PC0\0PC1\0PC2\0PC3";
|
||
|
|
function = "spi0";
|
||
|
|
phandle = <0x33>;
|
||
|
|
};
|
||
|
|
|
||
|
|
spi1-pins {
|
||
|
|
pins = "PD0\0PD1\0PD2\0PD3";
|
||
|
|
function = "spi1";
|
||
|
|
phandle = <0x34>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart0-pb-pins {
|
||
|
|
pins = "PB8\0PB9";
|
||
|
|
function = "uart0";
|
||
|
|
phandle = <0x2e>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart1-pins {
|
||
|
|
pins = "PG6\0PG7";
|
||
|
|
function = "uart1";
|
||
|
|
phandle = <0x6e>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart1-rts-cts-pins {
|
||
|
|
pins = "PG8\0PG9";
|
||
|
|
function = "uart1";
|
||
|
|
phandle = <0x6f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart2-pins {
|
||
|
|
pins = "PB0\0PB1";
|
||
|
|
function = "uart2";
|
||
|
|
phandle = <0x70>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart3-pins {
|
||
|
|
pins = "PD0\0PD1";
|
||
|
|
function = "uart3";
|
||
|
|
phandle = <0x71>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart4-pins {
|
||
|
|
pins = "PD2\0PD3";
|
||
|
|
function = "uart4";
|
||
|
|
phandle = <0x72>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart4-rts-cts-pins {
|
||
|
|
pins = "PD4\0PD5";
|
||
|
|
function = "uart4";
|
||
|
|
phandle = <0x73>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
spdif@1c21000 {
|
||
|
|
#sound-dai-cells = <0x00>;
|
||
|
|
compatible = "allwinner,sun50i-a64-spdif\0allwinner,sun8i-h3-spdif";
|
||
|
|
reg = <0x1c21000 0x400>;
|
||
|
|
interrupts = <0x00 0x0c 0x04>;
|
||
|
|
clocks = <0x02 0x39 0x02 0x55>;
|
||
|
|
resets = <0x02 0x25>;
|
||
|
|
clock-names = "apb\0spdif";
|
||
|
|
dmas = <0x2b 0x02>;
|
||
|
|
dma-names = "tx";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x2c>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x74>;
|
||
|
|
};
|
||
|
|
|
||
|
|
lradc@1c21800 {
|
||
|
|
compatible = "allwinner,sun50i-a64-lradc\0allwinner,sun8i-a83t-r-lradc";
|
||
|
|
reg = <0x1c21800 0x400>;
|
||
|
|
interrupts = <0x00 0x1e 0x04>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x75>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s@1c22000 {
|
||
|
|
#sound-dai-cells = <0x00>;
|
||
|
|
compatible = "allwinner,sun50i-a64-i2s\0allwinner,sun8i-h3-i2s";
|
||
|
|
reg = <0x1c22000 0x400>;
|
||
|
|
interrupts = <0x00 0x0d 0x04>;
|
||
|
|
clocks = <0x02 0x3c 0x02 0x52>;
|
||
|
|
clock-names = "apb\0mod";
|
||
|
|
resets = <0x02 0x27>;
|
||
|
|
dma-names = "rx\0tx";
|
||
|
|
dmas = <0x2b 0x03 0x2b 0x03>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x76>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2s@1c22400 {
|
||
|
|
#sound-dai-cells = <0x00>;
|
||
|
|
compatible = "allwinner,sun50i-a64-i2s\0allwinner,sun8i-h3-i2s";
|
||
|
|
reg = <0x1c22400 0x400>;
|
||
|
|
interrupts = <0x00 0x0e 0x04>;
|
||
|
|
clocks = <0x02 0x3d 0x02 0x53>;
|
||
|
|
clock-names = "apb\0mod";
|
||
|
|
resets = <0x02 0x28>;
|
||
|
|
dma-names = "rx\0tx";
|
||
|
|
dmas = <0x2b 0x04 0x2b 0x04>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x77>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dai@1c22c00 {
|
||
|
|
#sound-dai-cells = <0x00>;
|
||
|
|
compatible = "allwinner,sun50i-a64-codec-i2s";
|
||
|
|
reg = <0x1c22c00 0x200>;
|
||
|
|
interrupts = <0x00 0x1d 0x04>;
|
||
|
|
clocks = <0x02 0x38 0x02 0x6b>;
|
||
|
|
clock-names = "apb\0mod";
|
||
|
|
resets = <0x02 0x24>;
|
||
|
|
dmas = <0x2b 0x0f 0x2b 0x0f>;
|
||
|
|
dma-names = "rx\0tx";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x0f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
codec@1c22e00 {
|
||
|
|
#sound-dai-cells = <0x00>;
|
||
|
|
compatible = "allwinner,sun50i-a64-codec\0allwinner,sun8i-a33-codec";
|
||
|
|
reg = <0x1c22e00 0x600>;
|
||
|
|
interrupts = <0x00 0x1c 0x04>;
|
||
|
|
clocks = <0x02 0x38 0x02 0x6b>;
|
||
|
|
clock-names = "bus\0mod";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x10>;
|
||
|
|
};
|
||
|
|
|
||
|
|
thermal-sensor@1c25000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ths";
|
||
|
|
reg = <0x1c25000 0x100>;
|
||
|
|
clocks = <0x02 0x3b 0x02 0x49>;
|
||
|
|
clock-names = "bus\0mod";
|
||
|
|
interrupts = <0x00 0x1f 0x04>;
|
||
|
|
resets = <0x02 0x26>;
|
||
|
|
nvmem-cells = <0x2d>;
|
||
|
|
nvmem-cell-names = "calibration";
|
||
|
|
#thermal-sensor-cells = <0x01>;
|
||
|
|
phandle = <0x11>;
|
||
|
|
};
|
||
|
|
|
||
|
|
serial@1c28000 {
|
||
|
|
compatible = "snps,dw-apb-uart";
|
||
|
|
reg = <0x1c28000 0x400>;
|
||
|
|
interrupts = <0x00 0x00 0x04>;
|
||
|
|
reg-shift = <0x02>;
|
||
|
|
reg-io-width = <0x04>;
|
||
|
|
clocks = <0x02 0x43>;
|
||
|
|
resets = <0x02 0x2e>;
|
||
|
|
status = "okay";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x2e>;
|
||
|
|
phandle = <0x78>;
|
||
|
|
};
|
||
|
|
|
||
|
|
serial@1c28400 {
|
||
|
|
compatible = "snps,dw-apb-uart";
|
||
|
|
reg = <0x1c28400 0x400>;
|
||
|
|
interrupts = <0x00 0x01 0x04>;
|
||
|
|
reg-shift = <0x02>;
|
||
|
|
reg-io-width = <0x04>;
|
||
|
|
clocks = <0x02 0x44>;
|
||
|
|
resets = <0x02 0x2f>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x79>;
|
||
|
|
};
|
||
|
|
|
||
|
|
serial@1c28800 {
|
||
|
|
compatible = "snps,dw-apb-uart";
|
||
|
|
reg = <0x1c28800 0x400>;
|
||
|
|
interrupts = <0x00 0x02 0x04>;
|
||
|
|
reg-shift = <0x02>;
|
||
|
|
reg-io-width = <0x04>;
|
||
|
|
clocks = <0x02 0x45>;
|
||
|
|
resets = <0x02 0x30>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x7a>;
|
||
|
|
};
|
||
|
|
|
||
|
|
serial@1c28c00 {
|
||
|
|
compatible = "snps,dw-apb-uart";
|
||
|
|
reg = <0x1c28c00 0x400>;
|
||
|
|
interrupts = <0x00 0x03 0x04>;
|
||
|
|
reg-shift = <0x02>;
|
||
|
|
reg-io-width = <0x04>;
|
||
|
|
clocks = <0x02 0x46>;
|
||
|
|
resets = <0x02 0x31>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x7b>;
|
||
|
|
};
|
||
|
|
|
||
|
|
serial@1c29000 {
|
||
|
|
compatible = "snps,dw-apb-uart";
|
||
|
|
reg = <0x1c29000 0x400>;
|
||
|
|
interrupts = <0x00 0x04 0x04>;
|
||
|
|
reg-shift = <0x02>;
|
||
|
|
reg-io-width = <0x04>;
|
||
|
|
clocks = <0x02 0x47>;
|
||
|
|
resets = <0x02 0x32>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x7c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c@1c2ac00 {
|
||
|
|
compatible = "allwinner,sun6i-a31-i2c";
|
||
|
|
reg = <0x1c2ac00 0x400>;
|
||
|
|
interrupts = <0x00 0x06 0x04>;
|
||
|
|
clocks = <0x02 0x3f>;
|
||
|
|
resets = <0x02 0x2a>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x2f>;
|
||
|
|
status = "okay";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x7d>;
|
||
|
|
|
||
|
|
sensor@48 {
|
||
|
|
compatible = "st,stlm75";
|
||
|
|
reg = <0x48>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c@1c2b000 {
|
||
|
|
compatible = "allwinner,sun6i-a31-i2c";
|
||
|
|
reg = <0x1c2b000 0x400>;
|
||
|
|
interrupts = <0x00 0x07 0x04>;
|
||
|
|
clocks = <0x02 0x40>;
|
||
|
|
resets = <0x02 0x2b>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x30>;
|
||
|
|
status = "okay";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x7e>;
|
||
|
|
|
||
|
|
touchscreen@5d {
|
||
|
|
compatible = "goodix,gt5663";
|
||
|
|
reg = <0x5d>;
|
||
|
|
AVDD28-supply = <0x31>;
|
||
|
|
interrupt-parent = <0x27>;
|
||
|
|
interrupts = <0x07 0x04 0x02>;
|
||
|
|
irq-gpios = <0x27 0x07 0x04 0x00>;
|
||
|
|
reset-gpios = <0x27 0x07 0x08 0x00>;
|
||
|
|
touchscreen-inverted-x;
|
||
|
|
touchscreen-inverted-y;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c@1c2b400 {
|
||
|
|
compatible = "allwinner,sun6i-a31-i2c";
|
||
|
|
reg = <0x1c2b400 0x400>;
|
||
|
|
interrupts = <0x00 0x08 0x04>;
|
||
|
|
clocks = <0x02 0x41>;
|
||
|
|
resets = <0x02 0x2c>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x32>;
|
||
|
|
status = "disabled";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x7f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
spi@1c68000 {
|
||
|
|
compatible = "allwinner,sun8i-h3-spi";
|
||
|
|
reg = <0x1c68000 0x1000>;
|
||
|
|
interrupts = <0x00 0x41 0x04>;
|
||
|
|
clocks = <0x02 0x27 0x02 0x50>;
|
||
|
|
clock-names = "ahb\0mod";
|
||
|
|
dmas = <0x2b 0x17 0x2b 0x17>;
|
||
|
|
dma-names = "rx\0tx";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x33>;
|
||
|
|
resets = <0x02 0x10>;
|
||
|
|
status = "disabled";
|
||
|
|
num-cs = <0x01>;
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x80>;
|
||
|
|
};
|
||
|
|
|
||
|
|
spi@1c69000 {
|
||
|
|
compatible = "allwinner,sun8i-h3-spi";
|
||
|
|
reg = <0x1c69000 0x1000>;
|
||
|
|
interrupts = <0x00 0x42 0x04>;
|
||
|
|
clocks = <0x02 0x28 0x02 0x51>;
|
||
|
|
clock-names = "ahb\0mod";
|
||
|
|
dmas = <0x2b 0x18 0x2b 0x18>;
|
||
|
|
dma-names = "rx\0tx";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x34>;
|
||
|
|
resets = <0x02 0x11>;
|
||
|
|
status = "disabled";
|
||
|
|
num-cs = <0x01>;
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x81>;
|
||
|
|
};
|
||
|
|
|
||
|
|
ethernet@1c30000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-emac";
|
||
|
|
syscon = <0x35>;
|
||
|
|
reg = <0x1c30000 0x10000>;
|
||
|
|
interrupts = <0x00 0x52 0x04>;
|
||
|
|
interrupt-names = "macirq";
|
||
|
|
resets = <0x02 0x0d>;
|
||
|
|
reset-names = "stmmaceth";
|
||
|
|
clocks = <0x02 0x24>;
|
||
|
|
clock-names = "stmmaceth";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x82>;
|
||
|
|
|
||
|
|
mdio {
|
||
|
|
compatible = "snps,dwmac-mdio";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x83>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
gpu@1c40000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-mali\0arm,mali-400";
|
||
|
|
reg = <0x1c40000 0x10000>;
|
||
|
|
interrupts = <0x00 0x61 0x04 0x00 0x62 0x04 0x00 0x63 0x04 0x00 0x64 0x04 0x00 0x66 0x04 0x00 0x67 0x04 0x00 0x65 0x04>;
|
||
|
|
interrupt-names = "gp\0gpmmu\0pp0\0ppmmu0\0pp1\0ppmmu1\0pmu";
|
||
|
|
clocks = <0x02 0x35 0x02 0x72>;
|
||
|
|
clock-names = "bus\0core";
|
||
|
|
resets = <0x02 0x1f>;
|
||
|
|
phandle = <0x84>;
|
||
|
|
};
|
||
|
|
|
||
|
|
interrupt-controller@1c81000 {
|
||
|
|
compatible = "arm,gic-400";
|
||
|
|
reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
|
||
|
|
interrupts = <0x01 0x09 0xf04>;
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <0x03>;
|
||
|
|
phandle = <0x01>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pwm@1c21400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-pwm\0allwinner,sun5i-a13-pwm";
|
||
|
|
reg = <0x1c21400 0x400>;
|
||
|
|
clocks = <0x29>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x36>;
|
||
|
|
#pwm-cells = <0x03>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x85>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dram-controller@1c62000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-mbus";
|
||
|
|
reg = <0x1c62000 0x1000>;
|
||
|
|
clocks = <0x02 0x70>;
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x01>;
|
||
|
|
dma-ranges = <0x00 0x40000000 0xc0000000>;
|
||
|
|
#interconnect-cells = <0x01>;
|
||
|
|
phandle = <0x3b>;
|
||
|
|
};
|
||
|
|
|
||
|
|
csi@1cb0000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-csi";
|
||
|
|
reg = <0x1cb0000 0x1000>;
|
||
|
|
interrupts = <0x00 0x54 0x04>;
|
||
|
|
clocks = <0x02 0x32 0x02 0x68 0x02 0x60>;
|
||
|
|
clock-names = "bus\0mod\0ram";
|
||
|
|
resets = <0x02 0x1b>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x37>;
|
||
|
|
status = "okay";
|
||
|
|
phandle = <0x86>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
|
||
|
|
endpoint {
|
||
|
|
remote-endpoint = <0x38>;
|
||
|
|
bus-width = <0x08>;
|
||
|
|
hsync-active = <0x01>;
|
||
|
|
vsync-active = <0x00>;
|
||
|
|
data-active = <0x01>;
|
||
|
|
pclk-sample = <0x01>;
|
||
|
|
phandle = <0x48>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
dsi@1ca0000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-mipi-dsi";
|
||
|
|
reg = <0x1ca0000 0x1000>;
|
||
|
|
interrupts = <0x00 0x59 0x04>;
|
||
|
|
clocks = <0x02 0x1c>;
|
||
|
|
resets = <0x02 0x05>;
|
||
|
|
phys = <0x39>;
|
||
|
|
phy-names = "dphy";
|
||
|
|
status = "disabled";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x87>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
|
||
|
|
endpoint {
|
||
|
|
remote-endpoint = <0x3a>;
|
||
|
|
phandle = <0x1b>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
d-phy@1ca1000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-mipi-dphy\0allwinner,sun6i-a31-mipi-dphy";
|
||
|
|
reg = <0x1ca1000 0x1000>;
|
||
|
|
clocks = <0x02 0x1c 0x02 0x71>;
|
||
|
|
clock-names = "bus\0mod";
|
||
|
|
resets = <0x02 0x05>;
|
||
|
|
status = "disabled";
|
||
|
|
#phy-cells = <0x00>;
|
||
|
|
phandle = <0x39>;
|
||
|
|
};
|
||
|
|
|
||
|
|
deinterlace@1e00000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-deinterlace\0allwinner,sun8i-h3-deinterlace";
|
||
|
|
reg = <0x1e00000 0x20000>;
|
||
|
|
clocks = <0x02 0x31 0x02 0x66 0x02 0x61>;
|
||
|
|
clock-names = "bus\0mod\0ram";
|
||
|
|
resets = <0x02 0x1a>;
|
||
|
|
interrupts = <0x00 0x5d 0x04>;
|
||
|
|
interconnects = <0x3b 0x09>;
|
||
|
|
interconnect-names = "dma-mem";
|
||
|
|
phandle = <0x88>;
|
||
|
|
};
|
||
|
|
|
||
|
|
hdmi@1ee0000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-dw-hdmi\0allwinner,sun8i-a83t-dw-hdmi";
|
||
|
|
reg = <0x1ee0000 0x10000>;
|
||
|
|
reg-io-width = <0x01>;
|
||
|
|
interrupts = <0x00 0x58 0x04>;
|
||
|
|
clocks = <0x02 0x33 0x02 0x6f 0x02 0x6e>;
|
||
|
|
clock-names = "iahb\0isfr\0tmds";
|
||
|
|
resets = <0x02 0x1d>;
|
||
|
|
reset-names = "ctrl";
|
||
|
|
phys = <0x3c>;
|
||
|
|
phy-names = "phy";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x89>;
|
||
|
|
|
||
|
|
ports {
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
|
||
|
|
port@0 {
|
||
|
|
reg = <0x00>;
|
||
|
|
phandle = <0x8a>;
|
||
|
|
|
||
|
|
endpoint {
|
||
|
|
remote-endpoint = <0x3d>;
|
||
|
|
phandle = <0x1e>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
port@1 {
|
||
|
|
reg = <0x01>;
|
||
|
|
phandle = <0x8b>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
hdmi-phy@1ef0000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-hdmi-phy";
|
||
|
|
reg = <0x1ef0000 0x10000>;
|
||
|
|
clocks = <0x02 0x33 0x02 0x6f 0x02 0x07>;
|
||
|
|
clock-names = "bus\0mod\0pll-0";
|
||
|
|
resets = <0x02 0x1c>;
|
||
|
|
reset-names = "phy";
|
||
|
|
#phy-cells = <0x00>;
|
||
|
|
phandle = <0x3c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
rtc@1f00000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-rtc\0allwinner,sun8i-h3-rtc";
|
||
|
|
reg = <0x1f00000 0x400>;
|
||
|
|
interrupts = <0x00 0x28 0x04 0x00 0x29 0x04>;
|
||
|
|
clock-output-names = "osc32k\0osc32k-out\0iosc";
|
||
|
|
clocks = <0x3e>;
|
||
|
|
#clock-cells = <0x01>;
|
||
|
|
phandle = <0x2a>;
|
||
|
|
};
|
||
|
|
|
||
|
|
interrupt-controller@1f00c00 {
|
||
|
|
compatible = "allwinner,sun50i-a64-r-intc\0allwinner,sun6i-a31-r-intc";
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <0x02>;
|
||
|
|
reg = <0x1f00c00 0x400>;
|
||
|
|
interrupts = <0x00 0x20 0x04>;
|
||
|
|
phandle = <0x43>;
|
||
|
|
};
|
||
|
|
|
||
|
|
clock@1f01400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-r-ccu";
|
||
|
|
reg = <0x1f01400 0x100>;
|
||
|
|
clocks = <0x29 0x2a 0x00 0x2a 0x02 0x02 0x0b>;
|
||
|
|
clock-names = "hosc\0losc\0iosc\0pll-periph";
|
||
|
|
#clock-cells = <0x01>;
|
||
|
|
#reset-cells = <0x01>;
|
||
|
|
phandle = <0x3f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
codec-analog@1f015c0 {
|
||
|
|
compatible = "allwinner,sun50i-a64-codec-analog";
|
||
|
|
reg = <0x1f015c0 0x04>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x0e>;
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c@1f02400 {
|
||
|
|
compatible = "allwinner,sun50i-a64-i2c\0allwinner,sun6i-a31-i2c";
|
||
|
|
reg = <0x1f02400 0x400>;
|
||
|
|
interrupts = <0x00 0x2c 0x04>;
|
||
|
|
clocks = <0x3f 0x09>;
|
||
|
|
resets = <0x3f 0x05>;
|
||
|
|
status = "disabled";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x8c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
ir@1f02000 {
|
||
|
|
compatible = "allwinner,sun50i-a64-ir\0allwinner,sun6i-a31-ir";
|
||
|
|
reg = <0x1f02000 0x400>;
|
||
|
|
clocks = <0x3f 0x04 0x3f 0x0b>;
|
||
|
|
clock-names = "apb\0ir";
|
||
|
|
resets = <0x3f 0x00>;
|
||
|
|
interrupts = <0x00 0x25 0x04>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x40>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x8d>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pwm@1f03800 {
|
||
|
|
compatible = "allwinner,sun50i-a64-pwm\0allwinner,sun5i-a13-pwm";
|
||
|
|
reg = <0x1f03800 0x400>;
|
||
|
|
clocks = <0x29>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x41>;
|
||
|
|
#pwm-cells = <0x03>;
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x8e>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl@1f02c00 {
|
||
|
|
compatible = "allwinner,sun50i-a64-r-pinctrl";
|
||
|
|
reg = <0x1f02c00 0x400>;
|
||
|
|
interrupts = <0x00 0x2d 0x04>;
|
||
|
|
clocks = <0x3f 0x03 0x29 0x3e>;
|
||
|
|
clock-names = "apb\0hosc\0losc";
|
||
|
|
gpio-controller;
|
||
|
|
#gpio-cells = <0x03>;
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <0x03>;
|
||
|
|
phandle = <0x24>;
|
||
|
|
|
||
|
|
r-i2c-pl89-pins {
|
||
|
|
pins = "PL8\0PL9";
|
||
|
|
function = "s_i2c";
|
||
|
|
phandle = <0x8f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
r-ir-rx-pin {
|
||
|
|
pins = "PL11";
|
||
|
|
function = "s_cir_rx";
|
||
|
|
phandle = <0x40>;
|
||
|
|
};
|
||
|
|
|
||
|
|
r-pwm-pin {
|
||
|
|
pins = "PL10";
|
||
|
|
function = "s_pwm";
|
||
|
|
phandle = <0x41>;
|
||
|
|
};
|
||
|
|
|
||
|
|
r-rsb-pins {
|
||
|
|
pins = "PL0\0PL1";
|
||
|
|
function = "s_rsb";
|
||
|
|
phandle = <0x42>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
rsb@1f03400 {
|
||
|
|
compatible = "allwinner,sun8i-a23-rsb";
|
||
|
|
reg = <0x1f03400 0x400>;
|
||
|
|
interrupts = <0x00 0x27 0x04>;
|
||
|
|
clocks = <0x3f 0x06>;
|
||
|
|
clock-frequency = <0x2dc6c0>;
|
||
|
|
resets = <0x3f 0x02>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x42>;
|
||
|
|
status = "okay";
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
phandle = <0x90>;
|
||
|
|
|
||
|
|
pmic@3a3 {
|
||
|
|
compatible = "x-powers,axp803";
|
||
|
|
reg = <0x3a3>;
|
||
|
|
interrupt-parent = <0x43>;
|
||
|
|
interrupts = <0x00 0x08>;
|
||
|
|
x-powers,drive-vbus-en;
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <0x01>;
|
||
|
|
phandle = <0x91>;
|
||
|
|
|
||
|
|
ac-power-supply {
|
||
|
|
compatible = "x-powers,axp803-ac-power-supply\0x-powers,axp813-ac-power-supply";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x92>;
|
||
|
|
};
|
||
|
|
|
||
|
|
adc {
|
||
|
|
compatible = "x-powers,axp803-adc\0x-powers,axp813-adc";
|
||
|
|
#io-channel-cells = <0x01>;
|
||
|
|
phandle = <0x93>;
|
||
|
|
};
|
||
|
|
|
||
|
|
gpio {
|
||
|
|
compatible = "x-powers,axp803-gpio\0x-powers,axp813-gpio";
|
||
|
|
gpio-controller;
|
||
|
|
#gpio-cells = <0x02>;
|
||
|
|
phandle = <0x94>;
|
||
|
|
|
||
|
|
gpio0-ldo {
|
||
|
|
pins = "GPIO0";
|
||
|
|
function = "ldo";
|
||
|
|
phandle = <0x95>;
|
||
|
|
};
|
||
|
|
|
||
|
|
gpio1-ldo {
|
||
|
|
pins = "GPIO1";
|
||
|
|
function = "ldo";
|
||
|
|
phandle = <0x96>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
battery-power-supply {
|
||
|
|
compatible = "x-powers,axp803-battery-power-supply\0x-powers,axp813-battery-power-supply";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0x97>;
|
||
|
|
};
|
||
|
|
|
||
|
|
regulators {
|
||
|
|
x-powers,dcdc-freq = <0xbb8>;
|
||
|
|
|
||
|
|
aldo1 {
|
||
|
|
regulator-name = "avdd-csi";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x2ab980>;
|
||
|
|
regulator-max-microvolt = <0x2ab980>;
|
||
|
|
phandle = <0x45>;
|
||
|
|
};
|
||
|
|
|
||
|
|
aldo2 {
|
||
|
|
regulator-name = "vcc-pl";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x1b7740>;
|
||
|
|
regulator-max-microvolt = <0x325aa0>;
|
||
|
|
phandle = <0x98>;
|
||
|
|
};
|
||
|
|
|
||
|
|
aldo3 {
|
||
|
|
regulator-name = "vcc-pll-avcc";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x2dc6c0>;
|
||
|
|
regulator-max-microvolt = <0x2dc6c0>;
|
||
|
|
phandle = <0x99>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dc1sw {
|
||
|
|
regulator-name = "dc1sw";
|
||
|
|
phandle = <0x9a>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dcdc1 {
|
||
|
|
regulator-name = "vcc-3v3";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x325aa0>;
|
||
|
|
regulator-max-microvolt = <0x325aa0>;
|
||
|
|
phandle = <0x21>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dcdc2 {
|
||
|
|
regulator-name = "vdd-cpux";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0xfde80>;
|
||
|
|
regulator-max-microvolt = <0x13d620>;
|
||
|
|
phandle = <0x06>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dcdc3 {
|
||
|
|
regulator-name = "dcdc3";
|
||
|
|
phandle = <0x9b>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dcdc4 {
|
||
|
|
regulator-name = "dcdc4";
|
||
|
|
phandle = <0x9c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dcdc5 {
|
||
|
|
regulator-name = "vcc-dram";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x16e360>;
|
||
|
|
regulator-max-microvolt = <0x16e360>;
|
||
|
|
phandle = <0x9d>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dcdc6 {
|
||
|
|
regulator-name = "vdd-sys";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x10c8e0>;
|
||
|
|
regulator-max-microvolt = <0x10c8e0>;
|
||
|
|
phandle = <0x9e>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dldo1 {
|
||
|
|
regulator-name = "vcc-hdmi-dsi-sensor";
|
||
|
|
regulator-min-microvolt = <0x325aa0>;
|
||
|
|
regulator-max-microvolt = <0x325aa0>;
|
||
|
|
phandle = <0x9f>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dldo2 {
|
||
|
|
regulator-name = "vcc-mipi";
|
||
|
|
regulator-min-microvolt = <0x325aa0>;
|
||
|
|
regulator-max-microvolt = <0x325aa0>;
|
||
|
|
phandle = <0xa0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dldo3 {
|
||
|
|
regulator-name = "dovdd-csi";
|
||
|
|
regulator-min-microvolt = <0x2ab980>;
|
||
|
|
regulator-max-microvolt = <0x2ab980>;
|
||
|
|
phandle = <0x46>;
|
||
|
|
};
|
||
|
|
|
||
|
|
dldo4 {
|
||
|
|
regulator-name = "vcc-wifi-io";
|
||
|
|
regulator-min-microvolt = <0x325aa0>;
|
||
|
|
regulator-max-microvolt = <0x325aa0>;
|
||
|
|
phandle = <0xa1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
eldo1 {
|
||
|
|
regulator-name = "cpvdd";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x1b7740>;
|
||
|
|
regulator-max-microvolt = <0x1b7740>;
|
||
|
|
phandle = <0x22>;
|
||
|
|
};
|
||
|
|
|
||
|
|
eldo2 {
|
||
|
|
regulator-name = "eldo2";
|
||
|
|
phandle = <0xa2>;
|
||
|
|
};
|
||
|
|
|
||
|
|
eldo3 {
|
||
|
|
regulator-name = "dvdd-csi";
|
||
|
|
regulator-min-microvolt = <0x1b7740>;
|
||
|
|
regulator-max-microvolt = <0x1b7740>;
|
||
|
|
phandle = <0x47>;
|
||
|
|
};
|
||
|
|
|
||
|
|
fldo1 {
|
||
|
|
regulator-name = "vcc-1v2-hsic";
|
||
|
|
regulator-min-microvolt = <0x124f80>;
|
||
|
|
regulator-max-microvolt = <0x124f80>;
|
||
|
|
phandle = <0xa3>;
|
||
|
|
};
|
||
|
|
|
||
|
|
fldo2 {
|
||
|
|
regulator-name = "vdd-cpus";
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x10c8e0>;
|
||
|
|
regulator-max-microvolt = <0x10c8e0>;
|
||
|
|
phandle = <0xa4>;
|
||
|
|
};
|
||
|
|
|
||
|
|
ldo-io0 {
|
||
|
|
regulator-name = "vcc-ctp";
|
||
|
|
status = "okay";
|
||
|
|
regulator-min-microvolt = <0x2ab980>;
|
||
|
|
regulator-max-microvolt = <0x2ab980>;
|
||
|
|
phandle = <0x31>;
|
||
|
|
};
|
||
|
|
|
||
|
|
ldo-io1 {
|
||
|
|
regulator-name = "ldo-io1";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0xa5>;
|
||
|
|
};
|
||
|
|
|
||
|
|
rtc-ldo {
|
||
|
|
regulator-always-on;
|
||
|
|
regulator-min-microvolt = <0x2dc6c0>;
|
||
|
|
regulator-max-microvolt = <0x2dc6c0>;
|
||
|
|
regulator-name = "vcc-rtc";
|
||
|
|
phandle = <0xa6>;
|
||
|
|
};
|
||
|
|
|
||
|
|
drivevbus {
|
||
|
|
regulator-name = "usb0-vbus";
|
||
|
|
status = "okay";
|
||
|
|
phandle = <0x28>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
usb-power-supply {
|
||
|
|
compatible = "x-powers,axp803-usb-power-supply\0x-powers,axp813-usb-power-supply";
|
||
|
|
status = "disabled";
|
||
|
|
phandle = <0xa7>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
watchdog@1c20ca0 {
|
||
|
|
compatible = "allwinner,sun50i-a64-wdt\0allwinner,sun6i-a31-wdt";
|
||
|
|
reg = <0x1c20ca0 0x20>;
|
||
|
|
interrupts = <0x00 0x19 0x04>;
|
||
|
|
clocks = <0x29>;
|
||
|
|
phandle = <0xa8>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-table-cpu {
|
||
|
|
compatible = "operating-points-v2";
|
||
|
|
opp-shared;
|
||
|
|
phandle = <0x05>;
|
||
|
|
|
||
|
|
opp-648000000 {
|
||
|
|
opp-hz = <0x00 0x269fb200>;
|
||
|
|
opp-microvolt = <0xfde80>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-816000000 {
|
||
|
|
opp-hz = <0x00 0x30a32c00>;
|
||
|
|
opp-microvolt = <0x10c8e0>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-912000000 {
|
||
|
|
opp-hz = <0x00 0x365c0400>;
|
||
|
|
opp-microvolt = <0x111700>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-960000000 {
|
||
|
|
opp-hz = <0x00 0x39387000>;
|
||
|
|
opp-microvolt = <0x11b340>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-1008000000 {
|
||
|
|
opp-hz = <0x00 0x3c14dc00>;
|
||
|
|
opp-microvolt = <0x124f80>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-1056000000 {
|
||
|
|
opp-hz = <0x00 0x3ef14800>;
|
||
|
|
opp-microvolt = <0x12ebc0>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-1104000000 {
|
||
|
|
opp-hz = <0x00 0x41cdb400>;
|
||
|
|
opp-microvolt = <0x1339e0>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
opp-1152000000 {
|
||
|
|
opp-hz = <0x00 0x44aa2000>;
|
||
|
|
opp-microvolt = <0x13d620>;
|
||
|
|
clock-latency-ns = <0x3b9b0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
aliases {
|
||
|
|
serial0 = "/soc/serial@1c28000";
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c {
|
||
|
|
compatible = "i2c-gpio";
|
||
|
|
sda-gpios = <0x27 0x04 0x0d 0x00>;
|
||
|
|
scl-gpios = <0x27 0x04 0x0c 0x00>;
|
||
|
|
i2c-gpio,delay-us = <0x05>;
|
||
|
|
#address-cells = <0x01>;
|
||
|
|
#size-cells = <0x00>;
|
||
|
|
|
||
|
|
camera@3c {
|
||
|
|
compatible = "ovti,ov5640";
|
||
|
|
reg = <0x3c>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <0x44>;
|
||
|
|
clocks = <0x02 0x69>;
|
||
|
|
clock-names = "xclk";
|
||
|
|
AVDD-supply = <0x45>;
|
||
|
|
DOVDD-supply = <0x46>;
|
||
|
|
DVDD-supply = <0x47>;
|
||
|
|
reset-gpios = <0x27 0x04 0x0e 0x01>;
|
||
|
|
powerdown-gpios = <0x27 0x04 0x0f 0x00>;
|
||
|
|
phandle = <0xa9>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
|
||
|
|
endpoint {
|
||
|
|
remote-endpoint = <0x48>;
|
||
|
|
bus-width = <0x08>;
|
||
|
|
hsync-active = <0x01>;
|
||
|
|
vsync-active = <0x00>;
|
||
|
|
data-active = <0x01>;
|
||
|
|
pclk-sample = <0x01>;
|
||
|
|
phandle = <0x38>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
wifi-pwrseq {
|
||
|
|
compatible = "mmc-pwrseq-simple";
|
||
|
|
clocks = <0x2a 0x01>;
|
||
|
|
clock-names = "ext_clock";
|
||
|
|
reset-gpios = <0x24 0x00 0x02 0x01>;
|
||
|
|
phandle = <0x23>;
|
||
|
|
};
|
||
|
|
|
||
|
|
__symbols__ {
|
||
|
|
simplefb_lcd = "/chosen/framebuffer-lcd";
|
||
|
|
simplefb_hdmi = "/chosen/framebuffer-hdmi";
|
||
|
|
cpu0 = "/cpus/cpu@0";
|
||
|
|
cpu1 = "/cpus/cpu@1";
|
||
|
|
cpu2 = "/cpus/cpu@2";
|
||
|
|
cpu3 = "/cpus/cpu@3";
|
||
|
|
L2 = "/cpus/l2-cache";
|
||
|
|
de = "/display-engine";
|
||
|
|
osc24M = "/osc24M_clk";
|
||
|
|
osc32k = "/osc32k_clk";
|
||
|
|
sound = "/sound";
|
||
|
|
cpudai = "/sound/simple-audio-card,cpu";
|
||
|
|
link_codec = "/sound/simple-audio-card,codec";
|
||
|
|
cpu_thermal = "/thermal-zones/cpu0-thermal";
|
||
|
|
cpu_alert0 = "/thermal-zones/cpu0-thermal/trips/cpu_alert0";
|
||
|
|
cpu_alert1 = "/thermal-zones/cpu0-thermal/trips/cpu_alert1";
|
||
|
|
cpu_crit = "/thermal-zones/cpu0-thermal/trips/cpu_crit";
|
||
|
|
gpu0_thermal = "/thermal-zones/gpu0-thermal";
|
||
|
|
gpu1_thermal = "/thermal-zones/gpu1-thermal";
|
||
|
|
display_clocks = "/soc/bus@1000000/clock@0";
|
||
|
|
rotate = "/soc/bus@1000000/rotate@20000";
|
||
|
|
mixer0 = "/soc/bus@1000000/mixer@100000";
|
||
|
|
mixer0_out = "/soc/bus@1000000/mixer@100000/ports/port@1";
|
||
|
|
mixer0_out_tcon0 = "/soc/bus@1000000/mixer@100000/ports/port@1/endpoint@0";
|
||
|
|
mixer0_out_tcon1 = "/soc/bus@1000000/mixer@100000/ports/port@1/endpoint@1";
|
||
|
|
mixer1 = "/soc/bus@1000000/mixer@200000";
|
||
|
|
mixer1_out = "/soc/bus@1000000/mixer@200000/ports/port@1";
|
||
|
|
mixer1_out_tcon0 = "/soc/bus@1000000/mixer@200000/ports/port@1/endpoint@0";
|
||
|
|
mixer1_out_tcon1 = "/soc/bus@1000000/mixer@200000/ports/port@1/endpoint@1";
|
||
|
|
syscon = "/soc/syscon@1c00000";
|
||
|
|
sram_c = "/soc/syscon@1c00000/sram@18000";
|
||
|
|
de2_sram = "/soc/syscon@1c00000/sram@18000/sram-section@0";
|
||
|
|
sram_c1 = "/soc/syscon@1c00000/sram@1d00000";
|
||
|
|
ve_sram = "/soc/syscon@1c00000/sram@1d00000/sram-section@0";
|
||
|
|
dma = "/soc/dma-controller@1c02000";
|
||
|
|
tcon0 = "/soc/lcd-controller@1c0c000";
|
||
|
|
tcon0_in = "/soc/lcd-controller@1c0c000/ports/port@0";
|
||
|
|
tcon0_in_mixer0 = "/soc/lcd-controller@1c0c000/ports/port@0/endpoint@0";
|
||
|
|
tcon0_in_mixer1 = "/soc/lcd-controller@1c0c000/ports/port@0/endpoint@1";
|
||
|
|
tcon0_out = "/soc/lcd-controller@1c0c000/ports/port@1";
|
||
|
|
tcon0_out_dsi = "/soc/lcd-controller@1c0c000/ports/port@1/endpoint@1";
|
||
|
|
tcon1 = "/soc/lcd-controller@1c0d000";
|
||
|
|
tcon1_in = "/soc/lcd-controller@1c0d000/ports/port@0";
|
||
|
|
tcon1_in_mixer0 = "/soc/lcd-controller@1c0d000/ports/port@0/endpoint@0";
|
||
|
|
tcon1_in_mixer1 = "/soc/lcd-controller@1c0d000/ports/port@0/endpoint@1";
|
||
|
|
tcon1_out = "/soc/lcd-controller@1c0d000/ports/port@1";
|
||
|
|
tcon1_out_hdmi = "/soc/lcd-controller@1c0d000/ports/port@1/endpoint@1";
|
||
|
|
mmc0 = "/soc/mmc@1c0f000";
|
||
|
|
mmc1 = "/soc/mmc@1c10000";
|
||
|
|
brcmf = "/soc/mmc@1c10000/wifi@1";
|
||
|
|
mmc2 = "/soc/mmc@1c11000";
|
||
|
|
sid = "/soc/eeprom@1c14000";
|
||
|
|
ths_calibration = "/soc/eeprom@1c14000/thermal-sensor-calibration@34";
|
||
|
|
crypto = "/soc/crypto@1c15000";
|
||
|
|
msgbox = "/soc/mailbox@1c17000";
|
||
|
|
usb_otg = "/soc/usb@1c19000";
|
||
|
|
usbphy = "/soc/phy@1c19400";
|
||
|
|
ehci0 = "/soc/usb@1c1a000";
|
||
|
|
ohci0 = "/soc/usb@1c1a400";
|
||
|
|
ehci1 = "/soc/usb@1c1b000";
|
||
|
|
ohci1 = "/soc/usb@1c1b400";
|
||
|
|
ccu = "/soc/clock@1c20000";
|
||
|
|
pio = "/soc/pinctrl@1c20800";
|
||
|
|
csi_pins = "/soc/pinctrl@1c20800/csi-pins";
|
||
|
|
csi_mclk_pin = "/soc/pinctrl@1c20800/csi-mclk-pin";
|
||
|
|
i2c0_pins = "/soc/pinctrl@1c20800/i2c0-pins";
|
||
|
|
i2c1_pins = "/soc/pinctrl@1c20800/i2c1-pins";
|
||
|
|
i2c2_pins = "/soc/pinctrl@1c20800/i2c2-pins";
|
||
|
|
lcd_rgb666_pins = "/soc/pinctrl@1c20800/lcd-rgb666-pins";
|
||
|
|
mmc0_pins = "/soc/pinctrl@1c20800/mmc0-pins";
|
||
|
|
mmc1_pins = "/soc/pinctrl@1c20800/mmc1-pins";
|
||
|
|
mmc2_pins = "/soc/pinctrl@1c20800/mmc2-pins";
|
||
|
|
mmc2_ds_pin = "/soc/pinctrl@1c20800/mmc2-ds-pin";
|
||
|
|
pwm_pin = "/soc/pinctrl@1c20800/pwm-pin";
|
||
|
|
rmii_pins = "/soc/pinctrl@1c20800/rmii-pins";
|
||
|
|
rgmii_pins = "/soc/pinctrl@1c20800/rgmii-pins";
|
||
|
|
spdif_tx_pin = "/soc/pinctrl@1c20800/spdif-tx-pin";
|
||
|
|
spi0_pins = "/soc/pinctrl@1c20800/spi0-pins";
|
||
|
|
spi1_pins = "/soc/pinctrl@1c20800/spi1-pins";
|
||
|
|
uart0_pb_pins = "/soc/pinctrl@1c20800/uart0-pb-pins";
|
||
|
|
uart1_pins = "/soc/pinctrl@1c20800/uart1-pins";
|
||
|
|
uart1_rts_cts_pins = "/soc/pinctrl@1c20800/uart1-rts-cts-pins";
|
||
|
|
uart2_pins = "/soc/pinctrl@1c20800/uart2-pins";
|
||
|
|
uart3_pins = "/soc/pinctrl@1c20800/uart3-pins";
|
||
|
|
uart4_pins = "/soc/pinctrl@1c20800/uart4-pins";
|
||
|
|
uart4_rts_cts_pins = "/soc/pinctrl@1c20800/uart4-rts-cts-pins";
|
||
|
|
spdif = "/soc/spdif@1c21000";
|
||
|
|
lradc = "/soc/lradc@1c21800";
|
||
|
|
i2s0 = "/soc/i2s@1c22000";
|
||
|
|
i2s1 = "/soc/i2s@1c22400";
|
||
|
|
dai = "/soc/dai@1c22c00";
|
||
|
|
codec = "/soc/codec@1c22e00";
|
||
|
|
ths = "/soc/thermal-sensor@1c25000";
|
||
|
|
uart0 = "/soc/serial@1c28000";
|
||
|
|
uart1 = "/soc/serial@1c28400";
|
||
|
|
uart2 = "/soc/serial@1c28800";
|
||
|
|
uart3 = "/soc/serial@1c28c00";
|
||
|
|
uart4 = "/soc/serial@1c29000";
|
||
|
|
i2c0 = "/soc/i2c@1c2ac00";
|
||
|
|
i2c1 = "/soc/i2c@1c2b000";
|
||
|
|
i2c2 = "/soc/i2c@1c2b400";
|
||
|
|
spi0 = "/soc/spi@1c68000";
|
||
|
|
spi1 = "/soc/spi@1c69000";
|
||
|
|
emac = "/soc/ethernet@1c30000";
|
||
|
|
mdio = "/soc/ethernet@1c30000/mdio";
|
||
|
|
mali = "/soc/gpu@1c40000";
|
||
|
|
gic = "/soc/interrupt-controller@1c81000";
|
||
|
|
pwm = "/soc/pwm@1c21400";
|
||
|
|
mbus = "/soc/dram-controller@1c62000";
|
||
|
|
csi = "/soc/csi@1cb0000";
|
||
|
|
csi_ep = "/soc/csi@1cb0000/port/endpoint";
|
||
|
|
dsi = "/soc/dsi@1ca0000";
|
||
|
|
dsi_in_tcon0 = "/soc/dsi@1ca0000/port/endpoint";
|
||
|
|
dphy = "/soc/d-phy@1ca1000";
|
||
|
|
deinterlace = "/soc/deinterlace@1e00000";
|
||
|
|
hdmi = "/soc/hdmi@1ee0000";
|
||
|
|
hdmi_in = "/soc/hdmi@1ee0000/ports/port@0";
|
||
|
|
hdmi_in_tcon1 = "/soc/hdmi@1ee0000/ports/port@0/endpoint";
|
||
|
|
hdmi_out = "/soc/hdmi@1ee0000/ports/port@1";
|
||
|
|
hdmi_phy = "/soc/hdmi-phy@1ef0000";
|
||
|
|
rtc = "/soc/rtc@1f00000";
|
||
|
|
r_intc = "/soc/interrupt-controller@1f00c00";
|
||
|
|
r_ccu = "/soc/clock@1f01400";
|
||
|
|
codec_analog = "/soc/codec-analog@1f015c0";
|
||
|
|
r_i2c = "/soc/i2c@1f02400";
|
||
|
|
r_ir = "/soc/ir@1f02000";
|
||
|
|
r_pwm = "/soc/pwm@1f03800";
|
||
|
|
r_pio = "/soc/pinctrl@1f02c00";
|
||
|
|
r_i2c_pl89_pins = "/soc/pinctrl@1f02c00/r-i2c-pl89-pins";
|
||
|
|
r_ir_rx_pin = "/soc/pinctrl@1f02c00/r-ir-rx-pin";
|
||
|
|
r_pwm_pin = "/soc/pinctrl@1f02c00/r-pwm-pin";
|
||
|
|
r_rsb_pins = "/soc/pinctrl@1f02c00/r-rsb-pins";
|
||
|
|
r_rsb = "/soc/rsb@1f03400";
|
||
|
|
axp803 = "/soc/rsb@1f03400/pmic@3a3";
|
||
|
|
ac_power_supply = "/soc/rsb@1f03400/pmic@3a3/ac-power-supply";
|
||
|
|
axp_adc = "/soc/rsb@1f03400/pmic@3a3/adc";
|
||
|
|
axp_gpio = "/soc/rsb@1f03400/pmic@3a3/gpio";
|
||
|
|
gpio0_ldo = "/soc/rsb@1f03400/pmic@3a3/gpio/gpio0-ldo";
|
||
|
|
gpio1_ldo = "/soc/rsb@1f03400/pmic@3a3/gpio/gpio1-ldo";
|
||
|
|
battery_power_supply = "/soc/rsb@1f03400/pmic@3a3/battery-power-supply";
|
||
|
|
reg_aldo1 = "/soc/rsb@1f03400/pmic@3a3/regulators/aldo1";
|
||
|
|
reg_aldo2 = "/soc/rsb@1f03400/pmic@3a3/regulators/aldo2";
|
||
|
|
reg_aldo3 = "/soc/rsb@1f03400/pmic@3a3/regulators/aldo3";
|
||
|
|
reg_dc1sw = "/soc/rsb@1f03400/pmic@3a3/regulators/dc1sw";
|
||
|
|
reg_dcdc1 = "/soc/rsb@1f03400/pmic@3a3/regulators/dcdc1";
|
||
|
|
reg_dcdc2 = "/soc/rsb@1f03400/pmic@3a3/regulators/dcdc2";
|
||
|
|
reg_dcdc3 = "/soc/rsb@1f03400/pmic@3a3/regulators/dcdc3";
|
||
|
|
reg_dcdc4 = "/soc/rsb@1f03400/pmic@3a3/regulators/dcdc4";
|
||
|
|
reg_dcdc5 = "/soc/rsb@1f03400/pmic@3a3/regulators/dcdc5";
|
||
|
|
reg_dcdc6 = "/soc/rsb@1f03400/pmic@3a3/regulators/dcdc6";
|
||
|
|
reg_dldo1 = "/soc/rsb@1f03400/pmic@3a3/regulators/dldo1";
|
||
|
|
reg_dldo2 = "/soc/rsb@1f03400/pmic@3a3/regulators/dldo2";
|
||
|
|
reg_dldo3 = "/soc/rsb@1f03400/pmic@3a3/regulators/dldo3";
|
||
|
|
reg_dldo4 = "/soc/rsb@1f03400/pmic@3a3/regulators/dldo4";
|
||
|
|
reg_eldo1 = "/soc/rsb@1f03400/pmic@3a3/regulators/eldo1";
|
||
|
|
reg_eldo2 = "/soc/rsb@1f03400/pmic@3a3/regulators/eldo2";
|
||
|
|
reg_eldo3 = "/soc/rsb@1f03400/pmic@3a3/regulators/eldo3";
|
||
|
|
reg_fldo1 = "/soc/rsb@1f03400/pmic@3a3/regulators/fldo1";
|
||
|
|
reg_fldo2 = "/soc/rsb@1f03400/pmic@3a3/regulators/fldo2";
|
||
|
|
reg_ldo_io0 = "/soc/rsb@1f03400/pmic@3a3/regulators/ldo-io0";
|
||
|
|
reg_ldo_io1 = "/soc/rsb@1f03400/pmic@3a3/regulators/ldo-io1";
|
||
|
|
reg_rtc_ldo = "/soc/rsb@1f03400/pmic@3a3/regulators/rtc-ldo";
|
||
|
|
reg_drivevbus = "/soc/rsb@1f03400/pmic@3a3/regulators/drivevbus";
|
||
|
|
usb_power_supply = "/soc/rsb@1f03400/pmic@3a3/usb-power-supply";
|
||
|
|
wdt0 = "/soc/watchdog@1c20ca0";
|
||
|
|
cpu0_opp_table = "/opp-table-cpu";
|
||
|
|
ov5640 = "/i2c/camera@3c";
|
||
|
|
ov5640_ep = "/i2c/camera@3c/port/endpoint";
|
||
|
|
wifi_pwrseq = "/wifi-pwrseq";
|
||
|
|
};
|
||
|
|
};
|